X-Git-Url: https://gerrit.fd.io/r/gitweb?p=csit.git;a=blobdiff_plain;f=docs%2Freport%2Fintroduction%2Ftest_environment_intro.rst;h=da817f269dda9d5bde715259990e9fb2b782164c;hp=4f645713aab23ebcc83e441ee11469d0a8930c93;hb=HEAD;hpb=f82f4fdc96cfc3c1891deb4b1afb49b7746f041c diff --git a/docs/report/introduction/test_environment_intro.rst b/docs/report/introduction/test_environment_intro.rst deleted file mode 100644 index 4f645713aa..0000000000 --- a/docs/report/introduction/test_environment_intro.rst +++ /dev/null @@ -1,110 +0,0 @@ -Test Environment -================ - -.. _test_environment_versioning: - -Environment Versioning ----------------------- - -CSIT test environment versioning has been introduced to track -modifications of the test environment. - -Any benchmark anomalies (progressions, regressions) between releases of -a DUT application (e.g. VPP, DPDK), are determined by testing it in the -same test environment, to avoid test environment changes clouding the -picture. - -A mirror approach is introduced to determine benchmarking anomalies due -to the test environment change. This is achieved by testing the same DUT -application version between releases of CSIT test system. This works -under the assumption that the behaviour of the DUT is deterministic -under the test conditions. - -CSIT test environment versioning scheme ensures integrity of all the -test system components, including their HW revisions, compiled SW code -versions and SW source code, within a specific CSIT version. Components -included in the CSIT environment versioning include: - -- **HW** Server hardware firmware and BIOS (motherboard, processsor, - NIC(s), accelerator card(s)), tracked in CSIT branch in - :file:`./docs/lab/_hw_bios_cfg.md`, e.g. `Xeon - Skylake servers - `_. -- **Linux** Server Linux OS version and configuration, tracked in CSIT - Reports in `SUT Settings - `_ - and `Pre-Test Server Calibration - `_. -- **TRex** TRex Traffic Generator version, drivers and configuration - tracked in `TG Settings - `_. -- **CSIT** CSIT framework code tracked in CSIT release branches. - -Following is the list of CSIT versions to date: - -- Ver. 1 associated with CSIT rls1908 branch (`HW - `_, `Linux - `_, - `TRex - `_, - `CSIT `_). -- Ver. 2 associated with CSIT rls2001 branch (`HW - `_, `Linux - `_, - `TRex - `_, - `CSIT `_). -- Ver. 4 associated with CSIT rls2005 branch (`HW - `_, `Linux - `_, - `TRex - `_, - `CSIT `_). -- Ver. 5 associated with CSIT rls2009 branch (`HW - `_, `Linux - `_, - `TRex - `_, - `CSIT `_). - - - The main change is TRex data-plane core resource adjustments: - `increase from 7 to 8 cores and pinning cores to interfaces `_ - for better TRex performance with symmetric traffic profiles. - - -To identify performance changes due to VPP code development from -v20.05.0 to v20.09.0, both have been tested in CSIT environment ver. 5 -and compared against each other. All substantial progressions and -regressions have been marked up with RCA analysis. See -:ref:`vpp_throughput_comparisons` and :ref:`vpp_known_issues`. - -CSIT environment ver. 5 has been evaluated against the ver. 4 by -benchmarking VPP v20.05.0 in both environment versions. - -Physical Testbeds ------------------ - -FD.io CSIT performance tests are executed in physical testbeds hosted by -:abbr:`LF (Linux Foundation)` for FD.io project. Two physical testbed -topology types are used: - -- **3-Node Topology**: Consisting of two servers acting as SUTs - (Systems Under Test) and one server as TG (Traffic Generator), all - connected in ring topology. -- **2-Node Topology**: Consisting of one server acting as SUTs and one - server as TG both connected in ring topology. - -Tested SUT servers are based on a range of processors including Intel -Xeon Haswell-SP, Intel Xeon Skylake-SP, Intel Xeon Cascade Lake-SP, Arm, -Intel Atom. More detailed description is provided in -:ref:`tested_physical_topologies`. Tested logical topologies are -described in :ref:`tested_logical_topologies`. - -Server Specifications ---------------------- - -Complete technical specifications of compute servers used in CSIT -physical testbeds are maintained in FD.io CSIT repository: -`FD.io CSIT testbeds - Xeon Cascade Lake`_, -`FD.io CSIT testbeds - Xeon Skylake, Arm, Atom`_ and -`FD.io CSIT Testbeds - Xeon Haswell`_.