X-Git-Url: https://gerrit.fd.io/r/gitweb?p=csit.git;a=blobdiff_plain;f=docs%2Freport%2Fintroduction%2Ftest_environment_intro.rst;h=ddb14ce9a8494a834eb32c4b6c3c25e3364254a5;hp=3b7793f64499d8adbd4c879b16d3f603d91954e2;hb=07dc2213e6c0e95147e7025b02e91ed89ea07209;hpb=30a988b35c6d66a11b5ec2f2c77c741dc942594e diff --git a/docs/report/introduction/test_environment_intro.rst b/docs/report/introduction/test_environment_intro.rst index 3b7793f644..ddb14ce9a8 100644 --- a/docs/report/introduction/test_environment_intro.rst +++ b/docs/report/introduction/test_environment_intro.rst @@ -1,46 +1,110 @@ Test Environment ================ +.. _test_environment_versioning: + Environment Versioning ---------------------- -In order to determine any benchmark anomalies (progressions, -regressions) between releases of a specific data-plane DUT application -(e.g. VPP, DPDK), the DUT needs to be tested in the same test -environment, to avoid test environment changes impacting the results and -clouding the picture. +CSIT test environment versioning has been introduced to track +modifications of the test environment. + +Any benchmark anomalies (progressions, regressions) between releases of +a DUT application (e.g. VPP, DPDK), are determined by testing it in the +same test environment, to avoid test environment changes clouding the +picture. -In order to enable test system evolution, a mirror scheme is required to -determine benchmarking anomalies between releases of specific test -system like CSIT. This is achieved by testing the same DUT application -version between releases of CSIT test system. +A mirror approach is introduced to determine benchmarking anomalies due +to the test environment change. This is achieved by testing the same DUT +application version between releases of CSIT test system. This works +under the assumption that the behaviour of the DUT is deterministic +under the test conditions. CSIT test environment versioning scheme ensures integrity of all the test system components, including their HW revisions, compiled SW code versions and SW source code, within a specific CSIT version. Components included in the CSIT environment versioning include: -- Server hosts hardware firmware and BIOS (motherboard, processsor, - NIC(s), accelerator card(s)). -- Server host Linux operating system versions. -- Server host Linux configuration. -- TRex Traffic Generator version, drivers and configuration. -- CSIT framework code. +- **HW** Server hardware firmware and BIOS (motherboard, processsor, + NIC(s), accelerator card(s)), tracked in CSIT branch in + :file:`./docs/lab/_hw_bios_cfg.md`, e.g. `Xeon + Skylake servers + `_. +- **Linux** Server Linux OS version and configuration, tracked in CSIT + Reports in `SUT Settings + `_ + and `Pre-Test Server Calibration + `_. +- **TRex** TRex Traffic Generator version, drivers and configuration + tracked in `TG Settings + `_. +- **CSIT** CSIT framework code tracked in CSIT release branches. Following is the list of CSIT versions to date: -- Ver. 1 associated with CSIT rls1908 git branch as of 2019-08-21. -- Ver. 2 associated with CSIT rls2001 git branch as of 2020-03-27. -- Ver. 3 interim associated with master branch as of 2020-xx-xx. -- Ver. 4 associated with CSIT rls2005 git branch as of 2020-06-24. +- Ver. 1 associated with CSIT rls1908 branch (`HW + `_, `Linux + `_, + `TRex + `_, + `CSIT `_). +- Ver. 2 associated with CSIT rls2001 branch (`HW + `_, `Linux + `_, + `TRex + `_, + `CSIT `_). +- Ver. 4 associated with CSIT rls2005 branch (`HW + `_, `Linux + `_, + `TRex + `_, + `CSIT `_). +- Ver. 5 associated with CSIT rls2009 branch (`HW + `_, `Linux + `_, + `TRex + `_, + `CSIT `_). + + - The main change is TRex data-plane core resource adjustments: + `increase from 7 to 8 cores and pinning cores to interfaces `_ + for better TRex performance with symmetric traffic profiles. +- Ver. 6 associated with CSIT rls2101 branch (`HW + `_, `Linux + `_, + `TRex + `_, + `CSIT `_). + + - The main change is TRex version upgrade: + `increase from 2.82 to 2.86 `_. +- Ver. 7 associated with CSIT rls2106 branch (`HW + `_, `Linux + `_, + `TRex + `_, + `CSIT `_). + + - TRex version upgrade: + `increase from 2.86 to 2.88 `_. + - Ubuntu upgrade: + `upgrade from 18.04 LTS to 20.04.2 LTS `_. +- Ver. 8 associated with CSIT rls2110 branch (`HW + `_, `Linux + `_, + `TRex + `_, + `CSIT `_). -To identify performance changes due to VPP code changes from v20.01.0 to -v20.05.0, both have been tested in CSIT environment ver. 4 and compared -against each other. All substantial progressions has been marked up with -RCA analysis. See Current vs Previous Release and Known Issues. + - Intel NIC 700/800 series firmware upgrade based on DPDK compatibility + matrix: `depends on testbed type `_. -CSIT environment ver. 4 has been evaluated against the ver. 2 by -benchmarking VPP v20.01.0 in both environment versions. +To identify performance changes due to VPP code development between previous +and current VPP release version, both have been tested in CSIT environment of +latest version and compared against each other. All substantial progressions and +regressions have been marked up with RCA analysis. See +:ref:`vpp_throughput_comparisons` and :ref:`vpp_known_issues`. Physical Testbeds ----------------- @@ -56,7 +120,7 @@ topology types are used: server as TG both connected in ring topology. Tested SUT servers are based on a range of processors including Intel -Xeon Haswell-SP, Intel Xeon Skylake-SP, Intel Xeon Cascade Lake-SP, Arm, +Intel Xeon Skylake-SP, Intel Xeon Cascade Lake-SP, Arm, Intel Atom. More detailed description is provided in :ref:`tested_physical_topologies`. Tested logical topologies are described in :ref:`tested_logical_topologies`. @@ -67,5 +131,4 @@ Server Specifications Complete technical specifications of compute servers used in CSIT physical testbeds are maintained in FD.io CSIT repository: `FD.io CSIT testbeds - Xeon Cascade Lake`_, -`FD.io CSIT testbeds - Xeon Skylake, Arm, Atom`_ and -`FD.io CSIT Testbeds - Xeon Haswell`_. +`FD.io CSIT testbeds - Xeon Skylake, Arm, Atom`_.