X-Git-Url: https://gerrit.fd.io/r/gitweb?p=csit.git;a=blobdiff_plain;f=docs%2Freport%2Fvpp_performance_tests%2Fpacket_latency_graphs%2Fcontainer_memif.rst;h=e770848a30b887a1e96a477c7efbafb9dcbe9a72;hp=e604605ffcf55ed2f8e3b9034441ee2437778439;hb=dfff0ee80f3912a6db3f4356254f4cb3e3a9450d;hpb=4fbf1ec2d535d322725d395c369b6c9f7222c8dd

diff --git a/docs/report/vpp_performance_tests/packet_latency_graphs/container_memif.rst b/docs/report/vpp_performance_tests/packet_latency_graphs/container_memif.rst
index e604605ffc..e770848a30 100644
--- a/docs/report/vpp_performance_tests/packet_latency_graphs/container_memif.rst
+++ b/docs/report/vpp_performance_tests/packet_latency_graphs/container_memif.rst
@@ -1,50 +1,25 @@
-Container memif Connections
-===========================
-
-This section includes summary graphs of VPP Phy-to-Phy packet latency
-with Container memif Connections measured at 50% of discovered NDR throughput
-rate. Latency is reported for VPP running in multiple configurations of
-VPP worker thread(s), a.k.a. VPP data plane thread(s), and their
-physical CPU core(s) placement.
-
-VPP packet latency in 1t1c setup (1thread, 1core) is presented in the graph below.
-
-.. raw:: html
-
-    <iframe width="700" height="1000" frameborder="0" scrolling="no" src="../../_static/vpp/64B-1t1c-container-memif-ndrdisc-lat50.html"></iframe>
 
 .. raw:: latex
 
-    \begin{figure}[H]
-        \centering
-            \graphicspath{{../_build/_static/vpp/}}
-            \includegraphics[clip, trim=0cm 8cm 5cm 0cm, width=0.70\textwidth]{64B-1t1c-container-memif-ndrdisc-lat50}
-            \label{fig:64B-1t1c-container-memif-ndrdisc-lat50}
-    \end{figure}
-
-*Figure 1. VPP 1thread 1core - packet latency for Phy-to-Phy L2 Ethernet
-Switching (base).*
+    \clearpage
 
-CSIT source code for the test cases used for above plots can be found in
-`CSIT git repository <https://git.fd.io/csit/tree/tests/vpp/perf/container_memif?h=rls1804>`_.
+LXC/DRC Container Memif
+=======================
 
-VPP packet latency in 2t2c setup (2thread, 2core) is presented in the graph below.
-
-.. raw:: html
-
-    <iframe width="700" height="1000" frameborder="0" scrolling="no" src="../../_static/vpp/64B-2t2c-container-memif-ndrdisc-lat50.html"></iframe>
-
-.. raw:: latex
+This section includes summary graphs of VPP Phy-to-Phy packet latency
+with Container memif Connections measured at 100% of discovered NDR throughput
+rate. Latency is reported for VPP running in multiple configurations of
+VPP worker thread(s), a.k.a. VPP data plane thread(s), and their
+physical CPU core(s) placement.
 
-    \begin{figure}[H]
-        \centering
-            \graphicspath{{../_build/_static/vpp/}}
-            \includegraphics[clip, trim=0cm 8cm 5cm 0cm, width=0.70\textwidth]{64B-2t2c-container-memif-ndrdisc-lat50}
-            \label{fig:64B-2t2c-container-memif-ndrdisc-lat50}
-    \end{figure}
+CSIT source code for the test cases used for plots can be found in
+`CSIT git repository <https://git.fd.io/csit/tree/tests/vpp/perf/container_memif?h=rls1810>`_.
 
-*Figure 2. VPP 2threads 2cores - packet latency for Phy-to-Phy L2 Ethernet
-Switching (base).*
+.. toctree::
 
-CSIT source code for the test cases used for above plots can be found in
-`CSIT git repository <https://git.fd.io/csit/tree/tests/vpp/perf/container_memif?h=rls1804>`_.
+    container_memif-3n-hsw-x520
+    container_memif-3n-hsw-x710
+    container_memif-3n-hsw-xl710
+    container_memif-3n-skx-x710
+    container_memif-2n-skx-x710
+    container_memif-2n-skx-xxv710