X-Git-Url: https://gerrit.fd.io/r/gitweb?p=csit.git;a=blobdiff_plain;f=docs%2Freport%2Fvpp_performance_tests%2Fpacket_latency_graphs%2Fip4.rst;fp=docs%2Freport%2Fvpp_performance_tests%2Fpacket_latency_graphs%2Fip4.rst;h=a3902e6d92a85030508fee4572f61cb87dbcd10b;hp=b523cfde75186a8b12774d49db2217960c5b9add;hb=33cfe1217cb2d6bc9655b01f200b0ec8d5ccb466;hpb=ff820e3d53434889aacde2373314c3be8d00f765

diff --git a/docs/report/vpp_performance_tests/packet_latency_graphs/ip4.rst b/docs/report/vpp_performance_tests/packet_latency_graphs/ip4.rst
index b523cfde75..a3902e6d92 100644
--- a/docs/report/vpp_performance_tests/packet_latency_graphs/ip4.rst
+++ b/docs/report/vpp_performance_tests/packet_latency_graphs/ip4.rst
@@ -13,13 +13,12 @@ VPP worker thread(s), a.k.a. VPP data plane thread(s), and their
 physical CPU core(s) placement.
 
 CSIT source code for the test cases used for plots can be found in
-`CSIT git repository <https://git.fd.io/csit/tree/tests/vpp/perf/ip4?h=rls1901>`_.
+`CSIT git repository <https://git.fd.io/csit/tree/tests/vpp/perf/ip4?h=rls1908>`_.
 
 .. toctree::
 
-    ip4-3n-hsw-x520
-    ip4-3n-hsw-x710
-    ip4-3n-hsw-xl710
-    ip4-3n-skx-x710
-    ip4-2n-skx-x710
     ip4-2n-skx-xxv710
+    ip4-2n-skx-x710
+    ip4-3n-skx-xxv710
+    ip4-3n-skx-x710
+    ip4-3n-hsw-xl710