X-Git-Url: https://gerrit.fd.io/r/gitweb?p=csit.git;a=blobdiff_plain;f=docs%2Freport%2Fvpp_performance_tests%2Fpacket_latency_graphs%2Fl2.rst;fp=docs%2Freport%2Fvpp_performance_tests%2Fpacket_latency_graphs%2Fl2.rst;h=0000000000000000000000000000000000000000;hp=8f8d058eb5e8ad04b40b555b5e4037e561742c9b;hb=3b30ef03f582fb72c271a157ba3dde6226ad880d;hpb=7b890eb5e4fda01ea1147033f86824247f1a6cf5

diff --git a/docs/report/vpp_performance_tests/packet_latency_graphs/l2.rst b/docs/report/vpp_performance_tests/packet_latency_graphs/l2.rst
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-
-.. raw:: latex
-
-    \clearpage
-
-L2 Ethernet Switching
-=====================
-
-This section includes summary graphs of VPP Phy-to-Phy packet latency
-with L2 Ethernet switching measured at 100% of discovered NDR throughput
-rate. Latency is reported for VPP running in multiple configurations of
-VPP worker thread(s), a.k.a. VPP data plane thread(s), and their
-physical CPU core(s) placement.
-
-CSIT source code for the test cases used for plots can be found in
-`CSIT git repository <https://git.fd.io/csit/tree/tests/vpp/perf/l2?h=rls2001>`_.
-
-.. toctree::
-
-    l2-2n-skx-xxv710
-    l2-2n-skx-x710
-    l2-3n-skx-xxv710
-    l2-3n-skx-x710
-    l2-2n-clx-xxv710
-    l2-2n-clx-x710
-    l2-2n-clx-cx556a
-    l2-3n-hsw-xl710
-    l2-3n-tsh-x520