X-Git-Url: https://gerrit.fd.io/r/gitweb?p=csit.git;a=blobdiff_plain;f=docs%2Freport%2Fvpp_performance_tests%2Fpacket_latency_graphs%2Fl2.rst;fp=docs%2Freport%2Fvpp_performance_tests%2Fpacket_latency_graphs%2Fl2.rst;h=65b1983000fe1a97d5ae388e0e64fe3692d8488a;hp=642f995ccb10a74d338dca52b5a15b6aaf9a400a;hb=33cfe1217cb2d6bc9655b01f200b0ec8d5ccb466;hpb=ff820e3d53434889aacde2373314c3be8d00f765 diff --git a/docs/report/vpp_performance_tests/packet_latency_graphs/l2.rst b/docs/report/vpp_performance_tests/packet_latency_graphs/l2.rst index 642f995ccb..65b1983000 100644 --- a/docs/report/vpp_performance_tests/packet_latency_graphs/l2.rst +++ b/docs/report/vpp_performance_tests/packet_latency_graphs/l2.rst @@ -1,34 +1,8 @@ - .. raw:: latex \clearpage -.. raw:: html - - - L2 Ethernet Switching ===================== @@ -39,14 +13,12 @@ VPP worker thread(s), a.k.a. VPP data plane thread(s), and their physical CPU core(s) placement. CSIT source code for the test cases used for plots can be found in -`CSIT git repository `_. +`CSIT git repository `_. .. toctree:: - l2-3n-hsw-x520 - l2-3n-hsw-x710 - l2-3n-hsw-xl710 - l2-3n-skx-x710 - l2-3n-skx-xxv710 - l2-2n-skx-x710 l2-2n-skx-xxv710 + l2-2n-skx-x710 + l2-3n-skx-xxv710 + l2-3n-skx-x710 + l2-3n-hsw-xl710