X-Git-Url: https://gerrit.fd.io/r/gitweb?p=csit.git;a=blobdiff_plain;f=docs%2Freport%2Fvpp_performance_tests%2Fpacket_latency_graphs%2Fvts.rst;h=7697db546c682e224cf0f93ecc4ef65956ee3435;hp=15d5309dddfec62722d1420fde0eb7ade1893e68;hb=7b890eb5e4fda01ea1147033f86824247f1a6cf5;hpb=feb1b3034bff4498bb23267523b8443ac76ffb6f diff --git a/docs/report/vpp_performance_tests/packet_latency_graphs/vts.rst b/docs/report/vpp_performance_tests/packet_latency_graphs/vts.rst index 15d5309ddd..7697db546c 100644 --- a/docs/report/vpp_performance_tests/packet_latency_graphs/vts.rst +++ b/docs/report/vpp_performance_tests/packet_latency_graphs/vts.rst @@ -1,5 +1,10 @@ -VTS -=== + +.. raw:: latex + + \clearpage + +Virtual Topology System +======================= This section includes summary graphs of VPP Phy-to-VM(s)-to-Phy packet latency with with VM virtio and VPP vhost-user virtual interfaces @@ -9,57 +14,9 @@ a.k.a. VPP data plane thread(s), and their physical CPU core(s) placement. CSIT source code for the test cases used for plots can be found in -`CSIT git repository `_. - -3n-hsw-x520 -~~~~~~~~~~~ - -64b-1t1c --------- - -.. raw:: html - -
- -:index:`Latency: vts-3n-hsw-x520-64b-1t1c-ndr` - -.. raw:: html - - - -



-
+`CSIT git repository `_. -.. raw:: latex - - \begin{figure}[H] - \centering - \graphicspath{{../_build/_static/vpp/}} - \includegraphics[clip, trim=0cm 8cm 5cm 0cm, width=0.70\textwidth]{vts-3n-hsw-x520-64b-1t1c-ndr-lat} - \label{fig:vts-3n-hsw-x520-64b-1t1c-ndr-lat} - \end{figure} - -64b-2t2c --------- - -.. raw:: html - -
- -:index:`Latency: vts-3n-hsw-x520-64b-2t2c-ndr` - -.. raw:: html - - - -



-
- -.. raw:: latex +.. toctree:: - \begin{figure}[H] - \centering - \graphicspath{{../_build/_static/vpp/}} - \includegraphics[clip, trim=0cm 8cm 5cm 0cm, width=0.70\textwidth]{vts-3n-hsw-x520-64b-2t2c-ndr-lat} - \label{fig:vts-3n-hsw-x520-64b-2t2c-ndr-lat} - \end{figure} + vts-2n-skx-xxv710 + vts-2n-clx-xxv710