X-Git-Url: https://gerrit.fd.io/r/gitweb?p=csit.git;a=blobdiff_plain;f=docs%2Freport%2Fvpp_performance_tests%2Fpacket_latency_graphs%2Fvts.rst;h=7697db546c682e224cf0f93ecc4ef65956ee3435;hp=8a4c27e2d102ca5680e6081dc5abc9fff19f59a9;hb=7b890eb5e4fda01ea1147033f86824247f1a6cf5;hpb=a7886e481f492d996643fad5ab48944f1cd4f725

diff --git a/docs/report/vpp_performance_tests/packet_latency_graphs/vts.rst b/docs/report/vpp_performance_tests/packet_latency_graphs/vts.rst
index 8a4c27e2d1..7697db546c 100644
--- a/docs/report/vpp_performance_tests/packet_latency_graphs/vts.rst
+++ b/docs/report/vpp_performance_tests/packet_latency_graphs/vts.rst
@@ -14,10 +14,9 @@ a.k.a. VPP data plane thread(s), and their physical CPU core(s)
 placement.
 
 CSIT source code for the test cases used for plots can be found in
-`CSIT git repository <https://git.fd.io/csit/tree/tests/vpp/perf/vts?h=rls1908>`_.
+`CSIT git repository <https://git.fd.io/csit/tree/tests/vpp/perf/vts?h=rls2001>`_.
 
 .. toctree::
 
-    vts-3n-skx-xxv710
-    vts-3n-hsw-xl710
-    vts-3n-tsh-x520
+    vts-2n-skx-xxv710
+    vts-2n-clx-xxv710