X-Git-Url: https://gerrit.fd.io/r/gitweb?p=csit.git;a=blobdiff_plain;f=docs%2Freport%2Fvpp_performance_tests%2Fthroughput_speedup_multi_core%2Fip4_tunnels.rst;h=326ac1dc5ed5c8c8802e64fe86490e8faecf01e5;hp=001584b8567692694384361ff70b33d98a8a6d20;hb=5c2d02b6cd08e03b00ed8ec1bfc5289000e4da0a;hpb=4fbf1ec2d535d322725d395c369b6c9f7222c8dd diff --git a/docs/report/vpp_performance_tests/throughput_speedup_multi_core/ip4_tunnels.rst b/docs/report/vpp_performance_tests/throughput_speedup_multi_core/ip4_tunnels.rst index 001584b856..326ac1dc5e 100644 --- a/docs/report/vpp_performance_tests/throughput_speedup_multi_core/ip4_tunnels.rst +++ b/docs/report/vpp_performance_tests/throughput_speedup_multi_core/ip4_tunnels.rst @@ -1,5 +1,10 @@ -IPv4 Overlay Tunnels -==================== + +.. raw:: latex + + \clearpage + +IPv4 Tunnels +============ Following sections include Throughput Speedup Analysis for VPP multi- core multi-thread configurations with no Hyper-Threading, specifically @@ -9,58 +14,17 @@ Performance is reported for VPP running in multiple configurations of VPP worker thread(s), a.k.a. VPP data plane thread(s), and their physical CPU core(s) placement. -NDR Throughput --------------- - -VPP NDR 64B packet throughput speedup ratio is presented in the graphs -below for 10ge2p1x520 network interface card. - -NIC 10ge2p1x520 -~~~~~~~~~~~~~~~ - -.. raw:: html - - - -.. raw:: latex - - \begin{figure}[H] - \centering - \graphicspath{{../_build/_static/vpp/}} - \includegraphics[clip, trim=0cm 8cm 5cm 0cm, width=0.70\textwidth]{10ge2p1x520-64B-ethip4-tsa-ndrdisc} - \label{fig:10ge2p1x520-64B-ethip4-tsa-ndrdisc} - \end{figure} - -*Figure 1. Throughput Speedup Analysis - Multi-Core Speedup Ratio - Normalized -NDR Throughput for Phy-to-Phy IPv4 Overlay Tunnels.* - -CSIT source code for the test cases used for above plots can be found in -`CSIT git repository `_. - -PDR Throughput --------------- - -VPP PDR 64B packet throughput speedup ratio is presented in the graphs -below for 10ge2p1x520 network interface card. - -NIC 10ge2p1x520 -~~~~~~~~~~~~~~~ - -.. raw:: html - - - -.. raw:: latex - - \begin{figure}[H] - \centering - \graphicspath{{../_build/_static/vpp/}} - \includegraphics[clip, trim=0cm 8cm 5cm 0cm, width=0.70\textwidth]{10ge2p1x520-64B-ethip4-tsa-pdrdisc} - \label{fig:10ge2p1x520-64B-ethip4-tsa-pdrdisc} - \end{figure} +CSIT source code for the test cases used for plots can be found in +`CSIT git repository `_. -*Figure 2. Throughput Speedup Analysis - Multi-Core Speedup Ratio - Normalized -PDR Throughput for Phy-to-Phy IPv4 Overlay Tunnels.* +.. toctree:: -CSIT source code for the test cases used for above plots can be found in -`CSIT git repository `_. + ip4_tunnels-2n-icx-xxv710 + ip4_tunnels-3n-icx-xxv710 + ip4_tunnels-2n-skx-xxv710 + ip4_tunnels-2n-clx-xxv710 + ip4_tunnels-2n-zn2-xxv710 + ip4_tunnels-3n-skx-xxv710 + ip4_tunnels-3n-alt-xl710 + ip4_tunnels-3n-tsh-x520 + ip4_tunnels-3n-dnv-x553