X-Git-Url: https://gerrit.fd.io/r/gitweb?p=csit.git;a=blobdiff_plain;f=docs%2Freport%2Fvpp_performance_tests%2Fthroughput_speedup_multi_core%2Fl2.rst;h=f1aad3520bbd554c123a3241897c152edf3e85d3;hp=5db8eba3074605dc710f6909318c1721fa949cc3;hb=a245e007adcb3d6c28a2cb6aa8233038cbbcebd2;hpb=4fbf1ec2d535d322725d395c369b6c9f7222c8dd
diff --git a/docs/report/vpp_performance_tests/throughput_speedup_multi_core/l2.rst b/docs/report/vpp_performance_tests/throughput_speedup_multi_core/l2.rst
index 5db8eba307..f1aad3520b 100644
--- a/docs/report/vpp_performance_tests/throughput_speedup_multi_core/l2.rst
+++ b/docs/report/vpp_performance_tests/throughput_speedup_multi_core/l2.rst
@@ -1,3 +1,8 @@
+
+.. raw:: latex
+
+ \clearpage
+
L2 Ethernet Switching
=====================
@@ -9,81 +14,24 @@ used for the graphs comes from Phy-to-Phy 64B performance tests with VPP
L2 Ethernet switching, including NDR throughput (zero packet loss) and
PDR throughput (<0.5% packet loss).
-NDR Throughput
---------------
-
-VPP NDR 64B packet throughput speedup ratio is presented in the graphs
-below for 10ge2p1x520 and 40ge2p1xl710 network interface cards.
-
-NIC 10ge2p1x520
-~~~~~~~~~~~~~~~
-
-.. raw:: html
-
-
-
-.. raw:: latex
-
- \begin{figure}[H]
- \centering
- \graphicspath{{../_build/_static/vpp/}}
- \includegraphics[clip, trim=0cm 8cm 5cm 0cm, width=0.70\textwidth]{10ge2p1x520-64B-l2-tsa-ndrdisc}
- \label{fig:10ge2p1x520-64B-l2-tsa-ndrdisc}
- \end{figure}
-
-*Figure 1. Throughput Speedup Analysis - Multi-Core Speedup Ratio - Normalized
-NDR Throughput for Phy-to-Phy L2 Ethernet Switching.*
-
-CSIT source code for the test cases used for above plots can be found in
-`CSIT git repository `_.
-
-NIC 40ge2p1xl710
-~~~~~~~~~~~~~~~~
-
-.. raw:: html
-
-
-
-.. raw:: latex
-
- \begin{figure}[H]
- \centering
- \graphicspath{{../_build/_static/vpp/}}
- \includegraphics[clip, trim=0cm 8cm 5cm 0cm, width=0.70\textwidth]{40ge2p1xl710-64B-l2-tsa-ndrdisc}
- \label{fig:40ge2p1xl710-64B-l2-tsa-ndrdisc}
- \end{figure}
-
-*Figure 2. Throughput Speedup Analysis - Multi-Core Speedup Ratio - Normalized
-NDR Throughput for Phy-to-Phy L2 Ethernet Switching.*
-
-CSIT source code for the test cases used for above plots can be found in
-`CSIT git repository `_.
-
-PDR Throughput
---------------
-
-VPP PDR 64B packet throughput speedup ratio is presented in the graphs
-below for 10ge2p1x520 and 40ge2p1xl710 network interface cards. PDR
-measured for 0.5% packet loss ratio.
-
-NIC 10ge2p1x520
-~~~~~~~~~~~~~~~
-
-.. raw:: html
-
-
-
-.. raw:: latex
-
- \begin{figure}[H]
- \centering
- \graphicspath{{../_build/_static/vpp/}}
- \includegraphics[clip, trim=0cm 8cm 5cm 0cm, width=0.70\textwidth]{10ge2p1x520-64B-l2-tsa-pdrdisc}
- \label{fig:10ge2p1x520-64B-l2-tsa-pdrdisc}
- \end{figure}
-
-*Figure 3. Throughput Speedup Analysis - Multi-Core Speedup Ratio - Normalized
-PDR Throughput for Phy-to-Phy L2 Ethernet Switching.*
-
-CSIT source code for the test cases used for above plots can be found in
-`CSIT git repository `_.
+CSIT source code for the test cases used for plots can be found in
+`CSIT git repository `_.
+
+.. toctree::
+
+ l2-2n-skx-xxv710
+ l2-2n-skx-x710
+ l2-3n-skx-xxv710
+ l2-3n-skx-x710
+ l2-2n-clx-xxv710
+ l2-2n-clx-x710
+ l2-2n-clx-cx556a
+ l2-2n-icx-e810cq
+ l2-3n-icx-e810cq
+ l2-2n-zn2-xxv710
+ l2-2n-zn2-x710
+ l2-2n-zn2-cx556a
+ l2-3n-tsh-x520
+ l2-2n-tx2-xl710
+ l2-2n-dnv-x553
+ l2-3n-dnv-x553