--- /dev/null
+Calibration Data - TaiShan
+--------------------------
+
+Following sections include sample calibration data measured on
+s17-t33-sut1 server running in one of the Cortex-A72 testbeds.
+
+Calibration data obtained from all other servers in TaiShan testbeds shows the
+same or similar values.
+
+
+Linux cmdline
+~~~~~~~~~~~~~
+
+::
+
+ $ cat /proc/cmdline
+ BOOT_IMAGE=/boot/vmlinuz-4.15.0-54-generic root=/dev/mapper/huawei--1--vg-root ro isolcpus=1-15,17-31,33-47,49-63 nohz_full=1-15 17-31,33-47,49-63 rcu_nocbs=1-15 17-31,33-47,49-63 intel_iommu=on nmi_watchdog=0 audit=0 nosoftlockup processor.max_cstate=1 console=ttyAMA0,115200n8
+
+Linux uname
+~~~~~~~~~~~
+
+::
+
+ $ uname -a
+ Linux s17-t33-sut1 4.15.0-54-generic #58-Ubuntu SMP Mon Jun 24 10:56:40 UTC 2019 aarch64 aarch64 aarch64 GNU/Linux
+
+
+System-level Core Jitter
+~~~~~~~~~~~~~~~~~~~~~~~~
+
+::
+
+ $ sudo taskset -c 3 /home/testuser/pma_tools/jitter/jitter -i 20
+ Linux Jitter testing program version 1.9
+ Iterations=30
+ The pragram will execute a dummy function 80000 times
+ Display is updated every 20000 displayUpdate intervals
+ Thread affinity will be set to core_id:7
+ Timings are in CPU Core cycles
+ Inst_Min: Minimum Excution time during the display update interval(default is ~1 second)
+ Inst_Max: Maximum Excution time during the display update interval(default is ~1 second)
+ Inst_jitter: Jitter in the Excution time during rhe display update interval. This is the value of interest
+ last_Exec: The Excution time of last iteration just before the display update
+ Abs_Min: Absolute Minimum Excution time since the program started or statistics were reset
+ Abs_Max: Absolute Maximum Excution time since the program started or statistics were reset
+ tmp: Cumulative value calcualted by the dummy function
+ Interval: Time interval between the display updates in Core Cycles
+ Sample No: Sample number
+
+ Inst_Min Inst_Max Inst_jitter last_Exec Abs_min Abs_max tmp Interval Sample No
+ 160022 172254 12232 160042 160022 172254 1903230976 3204401362 1
+ 160022 173148 13126 160044 160022 173148 814809088 3204619316 2
+ 160022 169460 9438 160044 160022 173148 4021354496 3204391306 3
+ 160024 170270 10246 160044 160022 173148 2932932608 3204385830 4
+ 160022 169660 9638 160044 160022 173148 1844510720 3204387290 5
+ 160022 169410 9388 160040 160022 173148 756088832 3204375832 6
+ 160022 169012 8990 160042 160022 173148 3962634240 3204378924 7
+ 160022 169556 9534 160044 160022 173148 2874212352 3204374882 8
+ 160022 171684 11662 160042 160022 173148 1785790464 3204394596 9
+ 160022 171546 11524 160024 160022 173148 697368576 3204602774 10
+ 160022 169248 9226 160042 160022 173148 3903913984 3204401676 11
+ 160022 168458 8436 160042 160022 173148 2815492096 3204256350 12
+ 160022 169574 9552 160044 160022 173148 1727070208 3204278116 13
+ 160022 169352 9330 160044 160022 173148 638648320 3204327234 14
+ 160022 169100 9078 160044 160022 173148 3845193728 3204388132 15
+ 160022 169338 9316 160042 160022 173148 2756771840 3204380724 16
+ 160022 170828 10806 160046 160022 173148 1668349952 3204430452 17
+ 160022 173162 13140 160026 160022 173162 579928064 3204611318 18
+ 160022 170482 10460 160042 160022 173162 3786473472 3204389896 19
+ 160024 170704 10680 160044 160022 173162 2698051584 3204422126 20
+ 160024 169302 9278 160044 160022 173162 1609629696 3204397334 21
+ 160022 171848 11826 160044 160022 173162 521207808 3204389818 22
+ 160022 169438 9416 160042 160022 173162 3727753216 3204395382 23
+ 160022 169312 9290 160042 160022 173162 2639331328 3204371202 24
+ 160022 171368 11346 160044 160022 173162 1550909440 3204440464 25
+ 160022 171998 11976 160042 160022 173162 462487552 3204609440 26
+ 160022 169740 9718 160046 160022 173162 3669032960 3204405826 27
+ 160022 169610 9588 160044 160022 173162 2580611072 3204390608 28
+ 160022 169254 9232 160044 160022 173162 1492189184 3204399760 29
+ 160022 169386 9364 160046 160022 173162 403767296 3204417762 30
--- /dev/null
+Spectre and Meltdown Checks
+~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+Following section displays the output of a running shell script to tell if
+system is vulnerable against the several "speculative execution" CVEs that were
+made public in 2018. Script is available on `Spectre & Meltdown Checker Github
+<https://github.com/speed47/spectre-meltdown-checker>`_.
+
+::
+
+ Spectre and Meltdown mitigation detection tool v0.43
+
+ awk: cannot open bash (No such file or directory)
+ Checking for vulnerabilities on current system
+ Kernel is Linux 4.15.0-23-generic #25-Ubuntu SMP Wed May 23 18:02:16 UTC 2018 x86_64
+ CPU is Intel(R) Xeon(R) Platinum 8180 CPU @ 2.50GHz
+
+ Hardware check
+ * Hardware support (CPU microcode) for mitigation techniques
+ * Indirect Branch Restricted Speculation (IBRS)
+ * SPEC_CTRL MSR is available: YES
+ * CPU indicates IBRS capability: YES (SPEC_CTRL feature bit)
+ * Indirect Branch Prediction Barrier (IBPB)
+ * PRED_CMD MSR is available: YES
+ * CPU indicates IBPB capability: YES (SPEC_CTRL feature bit)
+ * Single Thread Indirect Branch Predictors (STIBP)
+ * SPEC_CTRL MSR is available: YES
+ * CPU indicates STIBP capability: YES (Intel STIBP feature bit)
+ * Speculative Store Bypass Disable (SSBD)
+ * CPU indicates SSBD capability: NO
+ * L1 data cache invalidation
+ * FLUSH_CMD MSR is available: NO
+ * CPU indicates L1D flush capability: NO
+ * Microarchitectural Data Sampling
+ * VERW instruction is available: NO
+ * Enhanced IBRS (IBRS_ALL)
+ * CPU indicates ARCH_CAPABILITIES MSR availability: NO
+ * ARCH_CAPABILITIES MSR advertises IBRS_ALL capability: NO
+ * CPU explicitly indicates not being vulnerable to Meltdown/L1TF (RDCL_NO): NO
+ * CPU explicitly indicates not being vulnerable to Variant 4 (SSB_NO): NO
+ * CPU/Hypervisor indicates L1D flushing is not necessary on this system: NO
+ * Hypervisor indicates host CPU might be vulnerable to RSB underflow (RSBA): NO
+ * CPU explicitly indicates not being vulnerable to Microarchitectural Data Sampling (MDS_NO): NO
+ * CPU explicitly indicates not being vulnerable to TSX Asynchronous Abort (TAA_NO): NO
+ * CPU explicitly indicates not being vulnerable to iTLB Multihit (PSCHANGE_MSC_NO): NO
+ * CPU explicitly indicates having MSR for TSX control (TSX_CTRL_MSR): NO
+ * CPU supports Transactional Synchronization Extensions (TSX): YES (RTM feature bit)
+ * CPU supports Software Guard Extensions (SGX): NO
+ * CPU microcode is known to cause stability problems: NO (model 0x55 family 0x6 stepping 0x4 ucode 0x2000043 cpuid 0x50654)
+ * CPU microcode is the latest known available version: awk: cannot open bash (No such file or directory)
+ UNKNOWN (latest microcode version for your CPU model is unknown)
+ * CPU vulnerability to the speculative execution attack variants
+ * Vulnerable to CVE-2017-5753 (Spectre Variant 1, bounds check bypass): YES
+ * Vulnerable to CVE-2017-5715 (Spectre Variant 2, branch target injection): YES
+ * Vulnerable to CVE-2017-5754 (Variant 3, Meltdown, rogue data cache load): YES
+ * Vulnerable to CVE-2018-3640 (Variant 3a, rogue system register read): YES
+ * Vulnerable to CVE-2018-3639 (Variant 4, speculative store bypass): YES
+ * Vulnerable to CVE-2018-3615 (Foreshadow (SGX), L1 terminal fault): NO
+ * Vulnerable to CVE-2018-3620 (Foreshadow-NG (OS), L1 terminal fault): YES
+ * Vulnerable to CVE-2018-3646 (Foreshadow-NG (VMM), L1 terminal fault): YES
+ * Vulnerable to CVE-2018-12126 (Fallout, microarchitectural store buffer data sampling (MSBDS)): YES
+ * Vulnerable to CVE-2018-12130 (ZombieLoad, microarchitectural fill buffer data sampling (MFBDS)): YES
+ * Vulnerable to CVE-2018-12127 (RIDL, microarchitectural load port data sampling (MLPDS)): YES
+ * Vulnerable to CVE-2019-11091 (RIDL, microarchitectural data sampling uncacheable memory (MDSUM)): YES
+ * Vulnerable to CVE-2019-11135 (ZombieLoad V2, TSX Asynchronous Abort (TAA)): YES
+ * Vulnerable to CVE-2018-12207 (No eXcuses, iTLB Multihit, machine check exception on page size changes (MCEPSC)): YES
+
+ CVE-2017-5753 aka Spectre Variant 1, bounds check bypass
+ * Mitigated according to the /sys interface: YES (Mitigation: __user pointer sanitization)
+ * Kernel has array_index_mask_nospec: YES (1 occurrence(s) found of x86 64 bits array_index_mask_nospec())
+ * Kernel has the Red Hat/Ubuntu patch: NO
+ * Kernel has mask_nospec64 (arm64): NO
+ > STATUS: NOT VULNERABLE (Mitigation: __user pointer sanitization)
+
+ CVE-2017-5715 aka Spectre Variant 2, branch target injection
+ * Mitigated according to the /sys interface: YES (Mitigation: Full generic retpoline, IBPB, IBRS_FW)
+ * Mitigation 1
+ * Kernel is compiled with IBRS support: YES
+ * IBRS enabled and active: YES (for firmware code only)
+ * Kernel is compiled with IBPB support: YES
+ * IBPB enabled and active: YES
+ * Mitigation 2
+ * Kernel has branch predictor hardening (arm): NO
+ * Kernel compiled with retpoline option: YES
+ * Kernel compiled with a retpoline-aware compiler: YES (kernel reports full retpoline compilation)
+ * Kernel supports RSB filling: YES
+ > STATUS: NOT VULNERABLE (Full retpoline + IBPB are mitigating the vulnerability)
+
+ CVE-2017-5754 aka Variant 3, Meltdown, rogue data cache load
+ * Mitigated according to the /sys interface: YES (Mitigation: PTI)
+ * Kernel supports Page Table Isolation (PTI): YES
+ * PTI enabled and active: YES
+ * Reduced performance impact of PTI: YES (CPU supports INVPCID, performance impact of PTI will be greatly reduced)
+ * Running as a Xen PV DomU: NO
+ > STATUS: NOT VULNERABLE (Mitigation: PTI)
+
+ CVE-2018-3640 aka Variant 3a, rogue system register read
+ * CPU microcode mitigates the vulnerability: NO
+ > STATUS: VULNERABLE (an up-to-date CPU microcode is needed to mitigate this vulnerability)
+
+ CVE-2018-3639 aka Variant 4, speculative store bypass
+ * Mitigated according to the /sys interface: NO (Vulnerable)
+ * Kernel supports disabling speculative store bypass (SSB): YES (found in /proc/self/status)
+ * SSB mitigation is enabled and active: NO
+ > STATUS: VULNERABLE (Your CPU doesnt support SSBD)
+
+ CVE-2018-3615 aka Foreshadow (SGX), L1 terminal fault
+ * CPU microcode mitigates the vulnerability: N/A
+ > STATUS: NOT VULNERABLE (your CPU vendor reported your CPU model as not vulnerable)
+
+ CVE-2018-3620 aka Foreshadow-NG (OS), L1 terminal fault
+ * Kernel supports PTE inversion: NO
+ * PTE inversion enabled and active: UNKNOWN (sysfs interface not available)
+ > STATUS: VULNERABLE (Your kernel doesnt support PTE inversion, update it)
+
+ CVE-2018-3646 aka Foreshadow-NG (VMM), L1 terminal fault
+ * This system is a host running a hypervisor: NO
+ * Mitigation 1 (KVM)
+ * EPT is disabled: NO
+ * Mitigation 2
+ * L1D flush is supported by kernel: NO
+ * L1D flush enabled: UNKNOWN (cant find or read /sys/devices/system/cpu/vulnerabilities/l1tf)
+ * Hardware-backed L1D flush supported: NO (flush will be done in software, this is slower)
+ * Hyper-Threading (SMT) is enabled: YES
+ > STATUS: NOT VULNERABLE (this system is not running a hypervisor)
+
+ CVE-2018-12126 aka Fallout, microarchitectural store buffer data sampling (MSBDS)
+ * Kernel supports using MD_CLEAR mitigation: NO
+ > STATUS: VULNERABLE (Neither your kernel or your microcode support mitigation, upgrade both to mitigate the vulnerability)
+
+ CVE-2018-12130 aka ZombieLoad, microarchitectural fill buffer data sampling (MFBDS)
+ * Kernel supports using MD_CLEAR mitigation: NO
+ > STATUS: VULNERABLE (Neither your kernel or your microcode support mitigation, upgrade both to mitigate the vulnerability)
+
+ CVE-2018-12127 aka RIDL, microarchitectural load port data sampling (MLPDS)
+ * Kernel supports using MD_CLEAR mitigation: NO
+ > STATUS: VULNERABLE (Neither your kernel or your microcode support mitigation, upgrade both to mitigate the vulnerability)
+
+ CVE-2019-11091 aka RIDL, microarchitectural data sampling uncacheable memory (MDSUM)
+ * Kernel supports using MD_CLEAR mitigation: NO
+ > STATUS: VULNERABLE (Neither your kernel or your microcode support mitigation, upgrade both to mitigate the vulnerability)
+
+ CVE-2019-11135 aka ZombieLoad V2, TSX Asynchronous Abort (TAA)
+ * TAA mitigation is supported by kernel: NO
+ * TAA mitigation enabled and active: NO (tsx_async_abort not found in sysfs hierarchy)
+ > STATUS: VULNERABLE (Your kernel doesnt support TAA mitigation, update it)
+
+ CVE-2018-12207 aka No eXcuses, iTLB Multihit, machine check exception on page size changes (MCEPSC)
+ * This system is a host running a hypervisor: NO
+ * iTLB Multihit mitigation is supported by kernel: NO
+ * iTLB Multihit mitigation enabled and active: NO (itlb_multihit not found in sysfs hierarchy)
+ > STATUS: NOT VULNERABLE (this system is not running a hypervisor)
+
+ > SUMMARY: CVE-2017-5753:OK CVE-2017-5715:OK CVE-2017-5754:OK CVE-2018-3640:KO CVE-2018-3639:KO CVE-2018-3615:OK CVE-2018-3620:KO CVE-2018-3646:OK CVE-2018-12126:KO CVE-2018-12130:KO CVE-2018-12127:KO CVE-2019-11091:KO CVE-2019-11135:KO CVE-2018-12207:OK
Code Review / csit.git / commitdiff