From: Juraj Linkeš Date: Thu, 7 Jul 2022 13:43:17 +0000 (+0200) Subject: Report: update 3n-alt TG NICs and add picture X-Git-Url: https://gerrit.fd.io/r/gitweb?p=csit.git;a=commitdiff_plain;h=38c3ff73f5cbc0124782c7c7d235ba36f57872ae;ds=sidebyside Report: update 3n-alt TG NICs and add picture Change-Id: I69f48c7c3e74d272da5b784e2cf82e5e4971b705 Signed-off-by: Juraj Linkeš --- diff --git a/docs/report/introduction/physical_testbeds.rst b/docs/report/introduction/physical_testbeds.rst index 30a4698f8b..d265efda03 100644 --- a/docs/report/introduction/physical_testbeds.rst +++ b/docs/report/introduction/physical_testbeds.rst @@ -437,8 +437,9 @@ SUT1 and SUT2 NICs: TG NICs: #. NIC-1: xxv710-DA2-2p25GE Intel. -#. NIC-2: e810-XXVDA4-4p25GE Intel. -#. NIC-3: e810-2CQDA2-2p100GE Intel. +#. NIC-2: xl710-QDA2-2p40GE Intel. +#. NIC-3: e810-XXVDA4-4p25GE Intel. +#. NIC-4: e810-2CQDA2-2p100GE Intel. 3-Node ARM TaiShan (3n-tsh) --------------------------- diff --git a/docs/report/introduction/testbed-3n-alt.svg b/docs/report/introduction/testbed-3n-alt.svg new file mode 100644 index 0000000000..596a7bb5d1 --- /dev/null +++ b/docs/report/introduction/testbed-3n-alt.svg @@ -0,0 +1,1134 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + Q80-3080* ARM Neoverse N1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + 3-Node ARM Altra (3n-alt) + + + + + + + + + + + + + + + Socket 1Intel XeonPlatinum 8358 + + + + + + + + + + + + + + x16 + + + + + + + + + Socket 0Intel XeonPlatinum 8358 + + + + + + + + + + + + + + x16 + + + + + + + x86Server + + + + + + Traffic Generator (TG) + + + + + + DDR4 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + PCIeGen4 + + + + + + + + Ampere AltraServer + + + + + + + + Socket 1Q80-30; 80* ARM Neoverse N1 + + + + + + + + + NIC1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + Socket 0Q80-30; 80* ARM Neoverse N1 + + + + + + + + + + + + + + x16 + + + + + + + DDR4 + + + + + + System Under Test 1 (SUT1) + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + PCIeGen4 + + + + + + + + Ampere AltraServer + + + + + + + + + NIC1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + x16 + + + + + + + DDR4 + + + + + + System Under Test 2 (SUT2) + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + PCIeGen4 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + UPI + + + + + + + + + Socket 1Q80-30; 80* ARM Neoverse N1 + + + + + + + + Socket 0Q80-30; 80* ARM Neoverse N1 + + + + + + + + + + + + + + + + + + + + + + + + + + + NIC3 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + NIC4 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + NIC2 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + NIC1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + \ No newline at end of file