#include <rte_lcore.h>
#include <rte_atomic.h>
#include <rte_branch_prediction.h>
-#include <rte_ring.h>
#include <rte_mempool.h>
#include <rte_malloc.h>
#include <rte_mbuf.h>
#endif
-/* default period is 1 second */
-static uint64_t timer_period = 1;
-
/*
* Ethernet device configuration.
*/
.hw_vlan_strip = 1, /**< VLAN strip enabled. */
.hw_vlan_extend = 0, /**< Extended VLAN disabled. */
.jumbo_frame = 0, /**< Jumbo Frame Support disabled. */
- .hw_strip_crc = 0, /**< CRC stripping by hardware disabled. */
+ .hw_strip_crc = 1, /**< CRC stripping by hardware enabled. */
};
struct rte_fdir_conf fdir_conf = {
mb_size, (unsigned) mb_mempool_cache,
sizeof(struct rte_pktmbuf_pool_private),
socket_id, 0);
+ if (rte_mp == NULL)
+ goto err;
if (rte_mempool_populate_anon(rte_mp) == 0) {
rte_mempool_free(rte_mp);
rte_mp = NULL;
+ goto err;
}
rte_pktmbuf_pool_init(rte_mp, NULL);
rte_mempool_obj_iter(rte_mp, rte_pktmbuf_init, NULL);
}
}
+err:
if (rte_mp == NULL) {
rte_exit(EXIT_FAILURE,
"Creation of mbuf pool for socket %u failed: %s\n",
fwd_lcores[lc_id]->cpuid_idx = lc_id;
}
- /*
- * Create pools of mbuf.
- * If NUMA support is disabled, create a single pool of mbuf in
- * socket 0 memory by default.
- * Otherwise, create a pool of mbuf in the memory of sockets 0 and 1.
- *
- * Use the maximum value of nb_rxd and nb_txd here, then nb_rxd and
- * nb_txd can be configured at run time.
- */
- if (param_total_num_mbufs)
- nb_mbuf_per_pool = param_total_num_mbufs;
- else {
- nb_mbuf_per_pool = RTE_TEST_RX_DESC_MAX + (nb_lcores * mb_mempool_cache)
- + RTE_TEST_TX_DESC_MAX + MAX_PKT_BURST;
-
- if (!numa_support)
- nb_mbuf_per_pool =
- (nb_mbuf_per_pool * RTE_MAX_ETHPORTS);
- }
-
- if (!numa_support) {
- if (socket_num == UMA_NO_CONFIG)
- mbuf_pool_create(mbuf_data_size, nb_mbuf_per_pool, 0);
- else
- mbuf_pool_create(mbuf_data_size, nb_mbuf_per_pool,
- socket_num);
- }
-
FOREACH_PORT(pid, ports) {
port = &ports[pid];
rte_eth_dev_info_get(pid, &port->dev_info);
port->need_reconfig_queues = 1;
}
+ /*
+ * Create pools of mbuf.
+ * If NUMA support is disabled, create a single pool of mbuf in
+ * socket 0 memory by default.
+ * Otherwise, create a pool of mbuf in the memory of sockets 0 and 1.
+ *
+ * Use the maximum value of nb_rxd and nb_txd here, then nb_rxd and
+ * nb_txd can be configured at run time.
+ */
+ if (param_total_num_mbufs)
+ nb_mbuf_per_pool = param_total_num_mbufs;
+ else {
+ nb_mbuf_per_pool = RTE_TEST_RX_DESC_MAX +
+ (nb_lcores * mb_mempool_cache) +
+ RTE_TEST_TX_DESC_MAX + MAX_PKT_BURST;
+ nb_mbuf_per_pool *= RTE_MAX_ETHPORTS;
+ }
+
if (numa_support) {
uint8_t i;
- unsigned int nb_mbuf;
- if (param_total_num_mbufs)
- nb_mbuf_per_pool = nb_mbuf_per_pool/nb_ports;
-
- for (i = 0; i < max_socket; i++) {
- nb_mbuf = (nb_mbuf_per_pool * RTE_MAX_ETHPORTS);
- if (nb_mbuf)
- mbuf_pool_create(mbuf_data_size,
- nb_mbuf,i);
- }
+ for (i = 0; i < max_socket; i++)
+ mbuf_pool_create(mbuf_data_size, nb_mbuf_per_pool, i);
+ } else {
+ if (socket_num == UMA_NO_CONFIG)
+ mbuf_pool_create(mbuf_data_size, nb_mbuf_per_pool, 0);
+ else
+ mbuf_pool_create(mbuf_data_size, nb_mbuf_per_pool,
+ socket_num);
}
+
init_port_config();
/*
uint16_t i;
uint8_t j;
uint64_t prev_tsc = 0, diff_tsc, cur_tsc, timer_tsc = 0;
+ uint64_t timer_period;
/* convert to number of cycles */
- timer_period *= rte_get_timer_hz();
+ timer_period = rte_get_timer_hz(); /* 1 second timeout */
for (j = 0; j < 2; j++) {
for (rxp = 0; rxp < cur_fwd_config.nb_fwd_ports; rxp++) {
port->dev_conf.rx_adv_conf.rss_conf.rss_hf = 0;
}
- if (port->dcb_flag == 0 && port->dev_info.max_vfs == 0) {
+ if (port->dcb_flag == 0) {
if( port->dev_conf.rx_adv_conf.rss_conf.rss_hf != 0)
port->dev_conf.rxmode.mq_mode = ETH_MQ_RX_RSS;
else
port->dev_conf.rxmode.mq_mode = ETH_MQ_RX_NONE;
}
- if (port->dev_info.max_vfs != 0) {
- if (port->dev_conf.rx_adv_conf.rss_conf.rss_hf != 0)
- port->dev_conf.rxmode.mq_mode =
- ETH_MQ_RX_VMDQ_RSS;
- else
- port->dev_conf.rxmode.mq_mode =
- ETH_MQ_RX_NONE;
-
- port->dev_conf.txmode.mq_mode = ETH_MQ_TX_NONE;
- }
-
rxtx_port_config(port);
rte_eth_macaddr_get(pid, &port->eth_addr);
1 << (i % vmdq_rx_conf->nb_queue_pools);
}
for (i = 0; i < ETH_DCB_NUM_USER_PRIORITIES; i++) {
- vmdq_rx_conf->dcb_tc[i] = i;
- vmdq_tx_conf->dcb_tc[i] = i;
+ vmdq_rx_conf->dcb_tc[i] = i % num_tcs;
+ vmdq_tx_conf->dcb_tc[i] = i % num_tcs;
}
/* set DCB mode of RX and TX of multiple queues */
rx_conf->nb_tcs = num_tcs;
tx_conf->nb_tcs = num_tcs;
- for (i = 0; i < num_tcs; i++) {
- rx_conf->dcb_tc[i] = i;
- tx_conf->dcb_tc[i] = i;
+ for (i = 0; i < ETH_DCB_NUM_USER_PRIORITIES; i++) {
+ rx_conf->dcb_tc[i] = i % num_tcs;
+ tx_conf->dcb_tc[i] = i % num_tcs;
}
eth_conf->rxmode.mq_mode = ETH_MQ_RX_DCB_RSS;
eth_conf->rx_adv_conf.rss_conf.rss_hf = rss_hf;
uint8_t pfc_en)
{
struct rte_eth_conf port_conf;
- struct rte_eth_dev_info dev_info;
struct rte_port *rte_port;
int retval;
uint16_t i;
- rte_eth_dev_info_get(pid, &dev_info);
+ rte_port = &ports[pid];
+
+ memset(&port_conf, 0, sizeof(struct rte_eth_conf));
+ /* Enter DCB configuration status */
+ dcb_config = 1;
+
+ /*set configuration of DCB in vt mode and DCB in non-vt mode*/
+ retval = get_eth_dcb_conf(&port_conf, dcb_mode, num_tcs, pfc_en);
+ if (retval < 0)
+ return retval;
+ port_conf.rxmode.hw_vlan_filter = 1;
+
+ /**
+ * Write the configuration into the device.
+ * Set the numbers of RX & TX queues to 0, so
+ * the RX & TX queues will not be setup.
+ */
+ (void)rte_eth_dev_configure(pid, 0, 0, &port_conf);
+
+ rte_eth_dev_info_get(pid, &rte_port->dev_info);
/* If dev_info.vmdq_pool_base is greater than 0,
* the queue id of vmdq pools is started after pf queues.
*/
- if (dcb_mode == DCB_VT_ENABLED && dev_info.vmdq_pool_base > 0) {
+ if (dcb_mode == DCB_VT_ENABLED &&
+ rte_port->dev_info.vmdq_pool_base > 0) {
printf("VMDQ_DCB multi-queue mode is nonsensical"
" for port %d.", pid);
return -1;
* and has the same number of rxq and txq in dcb mode
*/
if (dcb_mode == DCB_VT_ENABLED) {
- nb_rxq = dev_info.max_rx_queues;
- nb_txq = dev_info.max_tx_queues;
+ if (rte_port->dev_info.max_vfs > 0) {
+ nb_rxq = rte_port->dev_info.nb_rx_queues;
+ nb_txq = rte_port->dev_info.nb_tx_queues;
+ } else {
+ nb_rxq = rte_port->dev_info.max_rx_queues;
+ nb_txq = rte_port->dev_info.max_tx_queues;
+ }
} else {
/*if vt is disabled, use all pf queues */
- if (dev_info.vmdq_pool_base == 0) {
- nb_rxq = dev_info.max_rx_queues;
- nb_txq = dev_info.max_tx_queues;
+ if (rte_port->dev_info.vmdq_pool_base == 0) {
+ nb_rxq = rte_port->dev_info.max_rx_queues;
+ nb_txq = rte_port->dev_info.max_tx_queues;
} else {
nb_rxq = (queueid_t)num_tcs;
nb_txq = (queueid_t)num_tcs;
}
rx_free_thresh = 64;
- memset(&port_conf, 0, sizeof(struct rte_eth_conf));
- /* Enter DCB configuration status */
- dcb_config = 1;
-
- /*set configuration of DCB in vt mode and DCB in non-vt mode*/
- retval = get_eth_dcb_conf(&port_conf, dcb_mode, num_tcs, pfc_en);
- if (retval < 0)
- return retval;
-
- rte_port = &ports[pid];
memcpy(&rte_port->dev_conf, &port_conf, sizeof(struct rte_eth_conf));
rxtx_port_config(rte_port);
start_packet_forwarding(0);
}
prompt();
+ pmd_test_exit();
} else
#endif
{
Code Review / deb_dpdk.git / blobdiff