New upstream version 18.08

[deb_dpdk.git] / drivers / bus / dpaa / include / compat.h

diff --git a/drivers/bus/dpaa/include/compat.h b/drivers/bus/dpaa/include/compat.h
index 53707bb..92241d2 100644 (file)
--- a/drivers/bus/dpaa/include/compat.h
+++ b/drivers/bus/dpaa/include/compat.h
@@ -39,6 +39,7 @@
 #include <rte_spinlock.h>
 #include <rte_common.h>
 #include <rte_debug.h>
+#include <rte_cycles.h>
 
 /* The following definitions are primarily to allow the single-source driver
  * interfaces to be included by arbitrary program code. Ie. for interfaces that
@@ -47,9 +48,15 @@
  */
 
 /* Required compiler attributes */
+#ifndef __maybe_unused
 #define __maybe_unused __rte_unused
+#endif
+#ifndef __always_unused
 #define __always_unused        __rte_unused
+#endif
+#ifndef __packed
 #define __packed       __rte_packed
+#endif
 #define noinline       __attribute__((noinline))
 
 #define L1_CACHE_BYTES 64
@@ -127,13 +134,15 @@ static inline void out_be32(volatile void *__p, u32 val)
        *p = rte_cpu_to_be_32(val);
 }
 
+#define hwsync() rte_rmb()
+#define lwsync() rte_wmb()
+
 #define dcbt_ro(p) __builtin_prefetch(p, 0)
 #define dcbt_rw(p) __builtin_prefetch(p, 1)
 
+#if defined(RTE_ARCH_ARM64)
 #define dcbz(p) { asm volatile("dc zva, %0" : : "r" (p) : "memory"); }
 #define dcbz_64(p) dcbz(p)
-#define hwsync() rte_rmb()
-#define lwsync() rte_wmb()
 #define dcbf(p) { asm volatile("dc cvac, %0" : : "r"(p) : "memory"); }
 #define dcbf_64(p) dcbf(p)
 #define dccivac(p) { asm volatile("dc civac, %0" : : "r"(p) : "memory"); }
@@ -144,9 +153,27 @@ static inline void out_be32(volatile void *__p, u32 val)
                asm volatile("prfm pldl1keep, [%0, #64]" : : "r" (p));  \
        } while (0)
 
+#elif defined(RTE_ARCH_ARM)
+#define dcbz(p) memset((p), 0, 32)
+#define dcbz_64(p) memset((p), 0, 64)
+#define dcbf(p)        RTE_SET_USED(p)
+#define dcbf_64(p) dcbf(p)
+#define dccivac(p)     RTE_SET_USED(p)
+#define dcbit_ro(p)    RTE_SET_USED(p)
+
+#else
+#define dcbz(p)        RTE_SET_USED(p)
+#define dcbz_64(p) dcbz(p)
+#define dcbf(p)        RTE_SET_USED(p)
+#define dcbf_64(p) dcbf(p)
+#define dccivac(p)     RTE_SET_USED(p)
+#define dcbit_ro(p)    RTE_SET_USED(p)
+#endif
+
 #define barrier() { asm volatile ("" : : : "memory"); }
 #define cpu_relax barrier
 
+#if defined(RTE_ARCH_ARM64)
 static inline uint64_t mfatb(void)
 {
        uint64_t ret, ret_new, timeout = 200;
@@ -160,6 +187,11 @@ static inline uint64_t mfatb(void)
        DPAA_BUG_ON(!timeout && (ret != ret_new));
        return ret * 64;
 }
+#else
+
+#define mfatb rte_rdtsc
+
+#endif
 
 /* Spin for a few cycles without bothering the bus */
 static inline void cpu_spin(int cycles)