New upstream version 17.11-rc3

[deb_dpdk.git] / drivers / crypto / qat / qat_crypto.h

diff --git a/drivers/crypto/qat/qat_crypto.h b/drivers/crypto/qat/qat_crypto.h
index 6b84488..c64d775 100644 (file)
--- a/drivers/crypto/qat/qat_crypto.h
+++ b/drivers/crypto/qat/qat_crypto.h
@@ -37,6 +37,11 @@
 #include <rte_cryptodev_pmd.h>
 #include <rte_memzone.h>
 
+#include "qat_crypto_capabilities.h"
+
+#define CRYPTODEV_NAME_QAT_SYM_PMD     crypto_qat
+/**< Intel QAT Symmetric Crypto PMD device name */
+
 /*
  * This macro rounds up a number to a be a multiple of
  * the alignment when the alignment is a power of 2
@@ -45,13 +50,27 @@
        (((num) + (align) - 1) & ~((align) - 1))
 #define QAT_64_BTYE_ALIGN_MASK (~0x3f)
 
+#define QAT_CSR_HEAD_WRITE_THRESH 32U
+/* number of requests to accumulate before writing head CSR */
+#define QAT_CSR_TAIL_WRITE_THRESH 32U
+/* number of requests to accumulate before writing tail CSR */
+#define QAT_CSR_TAIL_FORCE_WRITE_THRESH 256U
+/* number of inflights below which no tail write coalescing should occur */
+
+struct qat_session;
+
+enum qat_device_gen {
+       QAT_GEN1 = 1,
+       QAT_GEN2,
+};
+
 /**
  * Structure associated with each queue.
  */
 struct qat_queue {
        char            memz_name[RTE_MEMZONE_NAMESIZE];
        void            *base_addr;             /* Base address */
-       phys_addr_t     base_phys_addr;         /* Queue physical address */
+       rte_iova_t      base_phys_addr;         /* Queue physical address */
        uint32_t        head;                   /* Shadow copy of the head */
        uint32_t        tail;                   /* Shadow copy of the tail */
        uint32_t        modulo;
@@ -61,28 +80,41 @@ struct qat_queue {
        uint8_t         hw_bundle_number;
        uint8_t         hw_queue_number;
        /* HW queue aka ring offset on bundle */
+       uint32_t        csr_head;               /* last written head value */
+       uint32_t        csr_tail;               /* last written tail value */
+       uint16_t        nb_processed_responses;
+       /* number of responses processed since last CSR head write */
+       uint16_t        nb_pending_requests;
+       /* number of requests pending since last CSR tail write */
 };
 
 struct qat_qp {
        void                    *mmap_bar_addr;
-       rte_atomic16_t          inflights16;
+       uint16_t                inflights16;
        struct  qat_queue       tx_q;
        struct  qat_queue       rx_q;
        struct  rte_cryptodev_stats stats;
+       struct rte_mempool *op_cookie_pool;
+       void **op_cookies;
+       uint32_t nb_descriptors;
+       enum qat_device_gen qat_dev_gen;
 } __rte_cache_aligned;
 
 /** private data structure for each QAT device */
 struct qat_pmd_private {
-       char sess_mp_name[RTE_MEMPOOL_NAMESIZE];
-       struct rte_mempool *sess_mp;
-
        unsigned max_nb_queue_pairs;
        /**< Max number of queue pairs supported by device */
        unsigned max_nb_sessions;
        /**< Max number of sessions supported by device */
+       enum qat_device_gen qat_dev_gen;
+       /**< QAT device generation */
+       const struct rte_cryptodev_capabilities *qat_dev_capabilities;
 };
 
-int qat_dev_config(struct rte_cryptodev *dev);
+extern uint8_t cryptodev_qat_driver_id;
+
+int qat_dev_config(struct rte_cryptodev *dev,
+               struct rte_cryptodev_config *config);
 int qat_dev_start(struct rte_cryptodev *dev);
 void qat_dev_stop(struct rte_cryptodev *dev);
 int qat_dev_close(struct rte_cryptodev *dev);
@@ -94,7 +126,8 @@ void qat_crypto_sym_stats_get(struct rte_cryptodev *dev,
 void qat_crypto_sym_stats_reset(struct rte_cryptodev *dev);
 
 int qat_crypto_sym_qp_setup(struct rte_cryptodev *dev, uint16_t queue_pair_id,
-       const struct rte_cryptodev_qp_conf *rx_conf, int socket_id);
+       const struct rte_cryptodev_qp_conf *rx_conf, int socket_id,
+       struct rte_mempool *session_pool);
 int qat_crypto_sym_qp_release(struct rte_cryptodev *dev,
        uint16_t queue_pair_id);
 
@@ -105,26 +138,35 @@ qat_pmd_session_mempool_create(struct rte_cryptodev *dev,
 extern unsigned
 qat_crypto_sym_get_session_private_size(struct rte_cryptodev *dev);
 
-extern void
-qat_crypto_sym_session_init(struct rte_mempool *mempool, void *priv_sess);
-
-extern void *
+extern int
 qat_crypto_sym_configure_session(struct rte_cryptodev *dev,
+               struct rte_crypto_sym_xform *xform,
+               struct rte_cryptodev_sym_session *sess,
+               struct rte_mempool *mempool);
+
+
+int
+qat_crypto_set_session_parameters(struct rte_cryptodev *dev,
                struct rte_crypto_sym_xform *xform, void *session_private);
 
-struct qat_session *
+int
+qat_crypto_sym_configure_session_aead(struct rte_crypto_sym_xform *xform,
+                               struct qat_session *session);
+
+int
 qat_crypto_sym_configure_session_auth(struct rte_cryptodev *dev,
                                struct rte_crypto_sym_xform *xform,
-                               struct qat_session *session_private);
+                               struct qat_session *session);
 
-void *
+int
 qat_crypto_sym_configure_session_cipher(struct rte_cryptodev *dev,
-               struct rte_crypto_sym_xform *xform, void *session_private);
+               struct rte_crypto_sym_xform *xform,
+               struct qat_session *session);
 
 
 extern void
-qat_crypto_sym_clear_session(struct rte_cryptodev *dev, void *session);
-
+qat_crypto_sym_clear_session(struct rte_cryptodev *dev,
+               struct rte_cryptodev_sym_session *session);
 
 extern uint16_t
 qat_pmd_enqueue_op_burst(void *qp, struct rte_crypto_op **ops,