Imported Upstream version 17.05

[deb_dpdk.git] / drivers / crypto / qat / qat_qp.c

diff --git a/drivers/crypto/qat/qat_qp.c b/drivers/crypto/qat/qat_qp.c
index 2e7188b..a358ccd 100644 (file)
--- a/drivers/crypto/qat/qat_qp.c
+++ b/drivers/crypto/qat/qat_qp.c
@@ -41,6 +41,7 @@
 
 #include "qat_logs.h"
 #include "qat_crypto.h"
+#include "qat_algs.h"
 #include "adf_transport_access_macros.h"
 
 #define ADF_MAX_SYM_DESC                       4096
@@ -135,7 +136,10 @@ int qat_crypto_sym_qp_setup(struct rte_cryptodev *dev, uint16_t queue_pair_id,
        int socket_id)
 {
        struct qat_qp *qp;
+       struct rte_pci_device *pci_dev;
        int ret;
+       char op_cookie_pool_name[RTE_RING_NAMESIZE];
+       uint32_t i;
 
        PMD_INIT_FUNC_TRACE();
 
@@ -153,7 +157,9 @@ int qat_crypto_sym_qp_setup(struct rte_cryptodev *dev, uint16_t queue_pair_id,
                return -EINVAL;
        }
 
-       if (dev->pci_dev->mem_resource[0].addr == NULL) {
+       pci_dev = RTE_DEV_TO_PCI(dev->device);
+
+       if (pci_dev->mem_resource[0].addr == NULL) {
                PMD_DRV_LOG(ERR, "Could not find VF config space "
                                "(UIO driver attached?).");
                return -EINVAL;
@@ -166,7 +172,6 @@ int qat_crypto_sym_qp_setup(struct rte_cryptodev *dev, uint16_t queue_pair_id,
                                queue_pair_id);
                return -EINVAL;
        }
-
        /* Allocate the queue pair data structure. */
        qp = rte_zmalloc("qat PMD qp metadata",
                        sizeof(*qp), RTE_CACHE_LINE_SIZE);
@@ -174,7 +179,12 @@ int qat_crypto_sym_qp_setup(struct rte_cryptodev *dev, uint16_t queue_pair_id,
                PMD_DRV_LOG(ERR, "Failed to alloc mem for qp struct");
                return -ENOMEM;
        }
-       qp->mmap_bar_addr = dev->pci_dev->mem_resource[0].addr;
+       qp->nb_descriptors = qp_conf->nb_descriptors;
+       qp->op_cookies = rte_zmalloc("qat PMD op cookie pointer",
+                       qp_conf->nb_descriptors * sizeof(*qp->op_cookies),
+                       RTE_CACHE_LINE_SIZE);
+
+       qp->mmap_bar_addr = pci_dev->mem_resource[0].addr;
        rte_atomic16_init(&qp->inflights16);
 
        if (qat_tx_queue_create(dev, &(qp->tx_q),
@@ -191,8 +201,47 @@ int qat_crypto_sym_qp_setup(struct rte_cryptodev *dev, uint16_t queue_pair_id,
                qat_queue_delete(&(qp->tx_q));
                goto create_err;
        }
+
        adf_configure_queues(qp);
        adf_queue_arb_enable(&qp->tx_q, qp->mmap_bar_addr);
+       snprintf(op_cookie_pool_name, RTE_RING_NAMESIZE, "%s_qp_op_%d_%hu",
+               dev->driver->pci_drv.driver.name, dev->data->dev_id,
+               queue_pair_id);
+
+       qp->op_cookie_pool = rte_mempool_lookup(op_cookie_pool_name);
+       if (qp->op_cookie_pool == NULL)
+               qp->op_cookie_pool = rte_mempool_create(op_cookie_pool_name,
+                               qp->nb_descriptors,
+                               sizeof(struct qat_crypto_op_cookie), 64, 0,
+                               NULL, NULL, NULL, NULL, socket_id,
+                               0);
+       if (!qp->op_cookie_pool) {
+               PMD_DRV_LOG(ERR, "QAT PMD Cannot create"
+                               " op mempool");
+               goto create_err;
+       }
+
+       for (i = 0; i < qp->nb_descriptors; i++) {
+               if (rte_mempool_get(qp->op_cookie_pool, &qp->op_cookies[i])) {
+                       PMD_DRV_LOG(ERR, "QAT PMD Cannot get op_cookie");
+                       return -EFAULT;
+               }
+
+               struct qat_crypto_op_cookie *sql_cookie =
+                               qp->op_cookies[i];
+
+               sql_cookie->qat_sgl_src_phys_addr =
+                               rte_mempool_virt2phy(qp->op_cookie_pool,
+                               sql_cookie) +
+                               offsetof(struct qat_crypto_op_cookie,
+                               qat_sgl_list_src);
+
+               sql_cookie->qat_sgl_dst_phys_addr =
+                               rte_mempool_virt2phy(qp->op_cookie_pool,
+                               sql_cookie) +
+                               offsetof(struct qat_crypto_op_cookie,
+                               qat_sgl_list_dst);
+       }
        dev->data->queue_pairs[queue_pair_id] = qp;
        return 0;
 
@@ -205,6 +254,7 @@ int qat_crypto_sym_qp_release(struct rte_cryptodev *dev, uint16_t queue_pair_id)
 {
        struct qat_qp *qp =
                        (struct qat_qp *)dev->data->queue_pairs[queue_pair_id];
+       uint32_t i;
 
        PMD_INIT_FUNC_TRACE();
        if (qp == NULL) {
@@ -221,6 +271,14 @@ int qat_crypto_sym_qp_release(struct rte_cryptodev *dev, uint16_t queue_pair_id)
        }
 
        adf_queue_arb_disable(&(qp->tx_q), qp->mmap_bar_addr);
+
+       for (i = 0; i < qp->nb_descriptors; i++)
+               rte_mempool_put(qp->op_cookie_pool, qp->op_cookies[i]);
+
+       if (qp->op_cookie_pool)
+               rte_mempool_free(qp->op_cookie_pool);
+
+       rte_free(qp->op_cookies);
        rte_free(qp);
        dev->data->queue_pairs[queue_pair_id] = NULL;
        return 0;
@@ -289,6 +347,7 @@ qat_queue_create(struct rte_cryptodev *dev, struct qat_queue *queue,
        void *io_addr;
        const struct rte_memzone *qp_mz;
        uint32_t queue_size_bytes = nb_desc*desc_size;
+       struct rte_pci_device *pci_dev;
 
        PMD_INIT_FUNC_TRACE();
        if (desc_size > ADF_MSG_SIZE_TO_BYTES(ADF_MAX_MSG_SIZE)) {
@@ -349,7 +408,9 @@ qat_queue_create(struct rte_cryptodev *dev, struct qat_queue *queue,
 
        queue_base = BUILD_RING_BASE_ADDR(queue->base_phys_addr,
                                        queue->queue_size);
-       io_addr = dev->pci_dev->mem_resource[0].addr;
+       pci_dev = RTE_DEV_TO_PCI(dev->device);
+
+       io_addr = pci_dev->mem_resource[0].addr;
 
        WRITE_CSR_RING_BASE(io_addr, queue->hw_bundle_number,
                        queue->hw_queue_number, queue_base);