static int bnx2x_handle_sp_tq(struct bnx2x_softc *sc);
static void bnx2x_handle_fp_tq(struct bnx2x_fastpath *fp, int scan_fp);
-static void bnx2x_periodic_stop(struct bnx2x_softc *sc);
static void bnx2x_ack_sb(struct bnx2x_softc *sc, uint8_t igu_sb_id,
uint8_t storm, uint16_t index, uint8_t op,
uint8_t update);
dma->sc = sc;
if (IS_PF(sc))
- sprintf(mz_name, "bnx2x%d_%s_%" PRIx64, SC_ABS_FUNC(sc), msg,
+ snprintf(mz_name, sizeof(mz_name), "bnx2x%d_%s_%" PRIx64, SC_ABS_FUNC(sc), msg,
rte_get_timer_cycles());
else
- sprintf(mz_name, "bnx2x%d_%s_%" PRIx64, sc->pcie_device, msg,
+ snprintf(mz_name, sizeof(mz_name), "bnx2x%d_%s_%" PRIx64, sc->pcie_device, msg,
rte_get_timer_cycles());
/* Caller must take care that strlen(mz_name) < RTE_MEMZONE_NAMESIZE */
PMD_DRV_LOG(ERR, "DMA alloc failed for %s", msg);
return -ENOMEM;
}
- dma->paddr = (uint64_t) z->phys_addr;
+ dma->paddr = (uint64_t) z->iova;
dma->vaddr = z->addr;
PMD_DRV_LOG(DEBUG, "%s: virt=%p phys=%" PRIx64, msg, dma->vaddr, dma->paddr);
}
void
-bnx2x_write_dmae(struct bnx2x_softc *sc, phys_addr_t dma_addr, uint32_t dst_addr,
+bnx2x_write_dmae(struct bnx2x_softc *sc, rte_iova_t dma_addr, uint32_t dst_addr,
uint32_t len32)
{
struct dmae_command dmae;
}
static void
-bnx2x_write_dmae_phys_len(struct bnx2x_softc *sc, phys_addr_t phys_addr,
+bnx2x_write_dmae_phys_len(struct bnx2x_softc *sc, rte_iova_t phys_addr,
uint32_t addr, uint32_t len)
{
uint32_t dmae_wr_max = DMAE_LEN32_WR_MAX(sc);
static void
__storm_memset_dma_mapping(struct bnx2x_softc *sc, uint32_t addr,
- phys_addr_t mapping)
+ rte_iova_t mapping)
{
REG_WR(sc, addr, U64_LO(mapping));
REG_WR(sc, (addr + 4), U64_HI(mapping));
}
static void
-storm_memset_spq_addr(struct bnx2x_softc *sc, phys_addr_t mapping,
+storm_memset_spq_addr(struct bnx2x_softc *sc, rte_iova_t mapping,
uint16_t abs_fid)
{
uint32_t addr = (XSEM_REG_FAST_MEMORY +
ramrod_param.rdata = BNX2X_SP(sc, rx_mode_rdata);
ramrod_param.rdata_mapping =
- (phys_addr_t)BNX2X_SP_MAPPING(sc, rx_mode_rdata),
+ (rte_iova_t)BNX2X_SP_MAPPING(sc, rx_mode_rdata),
bnx2x_set_bit(ECORE_FILTER_RX_MODE_PENDING, &sc->sp_state);
ramrod_param.ramrod_flags = ramrod_flags;
PMD_DRV_LOG(DEBUG, "Starting NIC unload...");
- /* stop the periodic callout */
- bnx2x_periodic_stop(sc);
-
/* mark driver as unloaded in shmem2 */
if (IS_PF(sc) && SHMEM2_HAS(sc, drv_capabilities_flag)) {
val = SHMEM2_RD(sc, drv_capabilities_flag[SC_FW_MB_IDX(sc)]);
tx_start_bd = &txq->tx_ring[TX_BD(bd_prod, txq)].start_bd;
tx_start_bd->addr =
- rte_cpu_to_le_64(rte_mbuf_data_dma_addr(m0));
+ rte_cpu_to_le_64(rte_mbuf_data_iova(m0));
tx_start_bd->nbytes = rte_cpu_to_le_16(m0->data_len);
tx_start_bd->bd_flags.as_bitfield = ETH_TX_BD_FLAGS_START_BD;
tx_start_bd->general_data =
struct bnx2x_softc *sc = fp->sc;
uint8_t more_rx = FALSE;
+ PMD_DRV_LOG(DEBUG, "---> FP TASK QUEUE (%d) <--", fp->index);
+
/* update the fastpath index */
bnx2x_update_fp_sb_idx(fp);
}
bnx2x_ack_sb(sc, fp->igu_sb_id, USTORM_ID,
- le16toh(fp->fp_hc_idx), IGU_INT_DISABLE, 1);
+ le16toh(fp->fp_hc_idx), IGU_INT_ENABLE, 1);
}
/*
ecore_init_func_obj(sc,
&sc->func_obj,
BNX2X_SP(sc, func_rdata),
- (phys_addr_t)BNX2X_SP_MAPPING(sc, func_rdata),
+ (rte_iova_t)BNX2X_SP_MAPPING(sc, func_rdata),
BNX2X_SP(sc, func_afex_rdata),
- (phys_addr_t)BNX2X_SP_MAPPING(sc, func_afex_rdata),
+ (rte_iova_t)BNX2X_SP_MAPPING(sc, func_afex_rdata),
&bnx2x_func_sp_drv);
}
}
static void
-bnx2x_init_sb(struct bnx2x_softc *sc, phys_addr_t busaddr, int vfid,
+bnx2x_init_sb(struct bnx2x_softc *sc, rte_iova_t busaddr, int vfid,
uint8_t vf_valid, int fw_sb_id, int igu_sb_id)
{
struct hc_status_block_data_e2 sb_data_e2;
sc->max_cos,
SC_FUNC(sc),
BNX2X_SP(sc, q_rdata),
- (phys_addr_t)BNX2X_SP_MAPPING(sc, q_rdata),
+ (rte_iova_t)BNX2X_SP_MAPPING(sc, q_rdata),
q_type);
/* configure classification DBs */
idx,
SC_FUNC(sc),
BNX2X_SP(sc, mac_rdata),
- (phys_addr_t)BNX2X_SP_MAPPING(sc, mac_rdata),
+ (rte_iova_t)BNX2X_SP_MAPPING(sc, mac_rdata),
ECORE_FILTER_MAC_PENDING, &sc->sp_state,
ECORE_OBJ_TYPE_RX_TX, &sc->macs_pool);
}
static void bnx2x_init_def_sb(struct bnx2x_softc *sc)
{
struct host_sp_status_block *def_sb = sc->def_sb;
- phys_addr_t mapping = sc->def_sb_dma.paddr;
+ rte_iova_t mapping = sc->def_sb_dma.paddr;
int igu_sp_sb_index;
int igu_seg_id;
int port = SC_PORT(sc);
SC_FUNC(sc),
SC_FUNC(sc),
BNX2X_SP(sc, mcast_rdata),
- (phys_addr_t)BNX2X_SP_MAPPING(sc, mcast_rdata),
+ (rte_iova_t)BNX2X_SP_MAPPING(sc, mcast_rdata),
ECORE_FILTER_MCAST_PENDING,
&sc->sp_state, o_type);
SC_FUNC(sc),
SC_FUNC(sc),
BNX2X_SP(sc, rss_rdata),
- (phys_addr_t)BNX2X_SP_MAPPING(sc, rss_rdata),
+ (rte_iova_t)BNX2X_SP_MAPPING(sc, rss_rdata),
ECORE_FILTER_RSS_CONF_PENDING,
&sc->sp_state, ECORE_OBJ_TYPE_RX);
}
pause->pri_map = 1;
/* rxq setup */
- rxq_init->dscr_map = (phys_addr_t)rxq->rx_ring_phys_addr;
- rxq_init->rcq_map = (phys_addr_t)rxq->cq_ring_phys_addr;
- rxq_init->rcq_np_map = (phys_addr_t)(rxq->cq_ring_phys_addr +
+ rxq_init->dscr_map = (rte_iova_t)rxq->rx_ring_phys_addr;
+ rxq_init->rcq_map = (rte_iova_t)rxq->cq_ring_phys_addr;
+ rxq_init->rcq_np_map = (rte_iova_t)(rxq->cq_ring_phys_addr +
BNX2X_PAGE_SIZE);
/*
PMD_TX_LOG(ERR, "ERROR: TX queue is NULL");
return;
}
- txq_init->dscr_map = (phys_addr_t)txq->tx_ring_phys_addr;
+ txq_init->dscr_map = (rte_iova_t)txq->tx_ring_phys_addr;
txq_init->sb_cq_index = HC_INDEX_ETH_FIRST_TX_CQ_CONS + cos;
txq_init->traffic_type = LLFC_TRAFFIC_TYPE_NW;
txq_init->fw_sb_id = fp->fw_sb_id;
/* Hash bits */
params.rss_result_mask = MULTI_MASK;
- (void)rte_memcpy(params.ind_table, rss_obj->ind_table,
+ rte_memcpy(params.ind_table, rss_obj->ind_table,
sizeof(params.ind_table));
if (config_hash) {
/* fill a user request section if needed */
if (!bnx2x_test_bit(RAMROD_CONT, ramrod_flags)) {
- (void)rte_memcpy(ramrod_param.user_req.u.mac.mac, mac,
+ rte_memcpy(ramrod_param.user_req.u.mac.mac, mac,
ETH_ALEN);
bnx2x_set_bit(mac_type, &ramrod_param.user_req.vlan_mac_flags);
sc->link_cnt++;
/* report new link params and remember the state for the next time */
- (void)rte_memcpy(&sc->last_reported_link, &cur_data, sizeof(cur_data));
+ rte_memcpy(&sc->last_reported_link, &cur_data, sizeof(cur_data));
if (bnx2x_test_bit(BNX2X_LINK_REPORT_LINK_DOWN,
&cur_data.link_report_flags)) {
}
}
-static void bnx2x_periodic_start(struct bnx2x_softc *sc)
-{
- atomic_store_rel_long(&sc->periodic_flags, PERIODIC_GO);
-}
-
-static void bnx2x_periodic_stop(struct bnx2x_softc *sc)
-{
- atomic_store_rel_long(&sc->periodic_flags, PERIODIC_STOP);
-}
-
static int bnx2x_initial_phy_init(struct bnx2x_softc *sc, int load_mode)
{
int rc, cfg_idx = bnx2x_get_link_cfg_idx(sc);
bnx2x_link_report(sc);
}
- if (!CHIP_REV_IS_SLOW(sc)) {
- bnx2x_periodic_start(sc);
- }
-
sc->link_params.req_line_speed[cfg_idx] = req_line_speed;
return rc;
}
{
if ((sc->state != BNX2X_STATE_OPEN) ||
(atomic_load_acq_long(&sc->periodic_flags) == PERIODIC_STOP)) {
- PMD_DRV_LOG(WARNING, "periodic callout exit (state=0x%x)",
+ PMD_DRV_LOG(INFO, "periodic callout exit (state=0x%x)",
sc->state);
return;
}
REG_WR(sc, PXP2_REG_PGL_ADDR_90_F1, 0);
REG_WR(sc, PXP2_REG_PGL_ADDR_94_F1, 0);
}
-
-/*
- * Enable internal target-read (in case we are probed after PF
- * FLR). Must be done prior to any BAR read access. Only for
- * 57712 and up
- */
- if (!CHIP_IS_E1x(sc)) {
- REG_WR(sc, PGLUE_B_REG_INTERNAL_PFID_ENABLE_TARGET_READ,
- 1);
- }
}
/* get the nvram size */
bnx2x_init_rte(sc);
if (IS_PF(sc)) {
-/* get device info and set params */
+ /* Enable internal target-read (in case we are probed after PF
+ * FLR). Must be done prior to any BAR read access. Only for
+ * 57712 and up
+ */
+ if (!CHIP_IS_E1x(sc)) {
+ REG_WR(sc, PGLUE_B_REG_INTERNAL_PFID_ENABLE_TARGET_READ,
+ 1);
+ DELAY(200000);
+ }
+
+ /* get device info and set params */
if (bnx2x_get_device_info(sc) != 0) {
PMD_DRV_LOG(NOTICE, "getting device info");
return -ENXIO;
/* get phy settings from shmem and 'and' against admin settings */
bnx2x_get_phy_info(sc);
} else {
-/* Left mac of VF unfilled, PF should set it for VF */
+ /* Left mac of VF unfilled, PF should set it for VF */
memset(sc->link_params.mac_addr, 0, ETHER_ADDR_LEN);
}
for (i = 0; i < L2_ILT_LINES(sc); i++) {
ilt->lines[cdu_ilt_start + i].page = sc->context[i].vcxt;
ilt->lines[cdu_ilt_start + i].page_mapping =
- (phys_addr_t)sc->context[i].vcxt_dma.paddr;
+ (rte_iova_t)sc->context[i].vcxt_dma.paddr;
ilt->lines[cdu_ilt_start + i].size = sc->context[i].size;
}
ecore_ilt_init_op(sc, INITOP_SET);
}
}
-static void bnx2x_ilt_wr(struct bnx2x_softc *sc, uint32_t index, phys_addr_t addr)
+static void bnx2x_ilt_wr(struct bnx2x_softc *sc, uint32_t index, rte_iova_t addr)
{
int reg;
uint32_t wb_write[2];
}
static void
-ecore_write_dmae_phys_len(struct bnx2x_softc *sc, phys_addr_t phys_addr,
+ecore_write_dmae_phys_len(struct bnx2x_softc *sc, rte_iova_t phys_addr,
uint32_t addr, uint32_t len)
{
bnx2x_write_dmae_phys_len(sc, phys_addr, addr, len);
Code Review / deb_dpdk.git / blobdiff