struct fm10k_macvlan_filter_info macvlan;
/* Flag to indicate if RX vector conditions satisfied */
bool rx_vec_allowed;
+ bool sm_down;
};
/*
uint16_t rxrearm_nb; /* number of remaining to be re-armed */
uint16_t rxrearm_start; /* the idx we start the re-arming from */
uint16_t rx_using_sse; /* indicates that vector RX is in use */
- uint8_t port_id;
+ uint16_t port_id;
uint8_t drop_en;
uint8_t rx_deferred_start; /* don't start this queue in dev start. */
uint16_t rx_ftag_en; /* indicates FTAG RX supported */
volatile uint32_t *tail_ptr;
uint32_t txq_flags; /* Holds flags for this TXq */
uint16_t nb_desc;
- uint8_t port_id;
+ uint16_t port_id;
uint8_t tx_deferred_start; /** don't start this queue in dev start. */
uint16_t queue_id;
uint16_t tx_ftag_en; /* indicates FTAG TX supported */
};
#define MBUF_DMA_ADDR(mb) \
- ((uint64_t) ((mb)->buf_physaddr + (mb)->data_off))
+ ((uint64_t) ((mb)->buf_iova + (mb)->data_off))
/* enforce 512B alignment on default Rx DMA addresses */
#define MBUF_DMA_ADDR_DEFAULT(mb) \
- ((uint64_t) RTE_ALIGN(((mb)->buf_physaddr + RTE_PKTMBUF_HEADROOM),\
+ ((uint64_t) RTE_ALIGN(((mb)->buf_iova + RTE_PKTMBUF_HEADROOM),\
FM10K_RX_DATABUF_ALIGN))
static inline void fifo_reset(struct fifo *fifo, uint32_t len)
}
static inline void
-fm10k_pktmbuf_reset(struct rte_mbuf *mb, uint8_t in_port)
+fm10k_pktmbuf_reset(struct rte_mbuf *mb, uint16_t in_port)
{
rte_mbuf_refcnt_set(mb, 1);
mb->next = NULL;