New upstream version 18.02

[deb_dpdk.git] / drivers / net / i40e / base / i40e_adminq_cmd.h

diff --git a/drivers/net/i40e/base/i40e_adminq_cmd.h b/drivers/net/i40e/base/i40e_adminq_cmd.h
index c36da2a..801c0ff 100644 (file)
--- a/drivers/net/i40e/base/i40e_adminq_cmd.h
+++ b/drivers/net/i40e/base/i40e_adminq_cmd.h
@@ -214,6 +214,7 @@ enum i40e_admin_queue_opc {
        /* DCB commands */
        i40e_aqc_opc_dcb_ignore_pfc     = 0x0301,
        i40e_aqc_opc_dcb_updated        = 0x0302,
+       i40e_aqc_opc_set_dcb_parameters = 0x0303,
 
        /* TX scheduler */
        i40e_aqc_opc_configure_vsi_bw_limit             = 0x0400,
@@ -262,6 +263,7 @@ enum i40e_admin_queue_opc {
        i40e_aqc_opc_nvm_update                 = 0x0703,
        i40e_aqc_opc_nvm_config_read            = 0x0704,
        i40e_aqc_opc_nvm_config_write           = 0x0705,
+       i40e_aqc_opc_nvm_progress               = 0x0706,
        i40e_aqc_opc_oem_post_update            = 0x0720,
        i40e_aqc_opc_thermal_sensor             = 0x0721,
 
@@ -1877,6 +1879,7 @@ enum i40e_aq_phy_type {
        I40E_PHY_TYPE_25GBASE_AOC               = 0x23,
        I40E_PHY_TYPE_25GBASE_ACC               = 0x24,
        I40E_PHY_TYPE_MAX,
+       I40E_PHY_TYPE_NOT_SUPPORTED_HIGH_TEMP   = 0xFD,
        I40E_PHY_TYPE_EMPTY                     = 0xFE,
        I40E_PHY_TYPE_DEFAULT                   = 0xFF,
 };
@@ -2182,8 +2185,8 @@ struct i40e_aqc_phy_register_access {
 #define I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE 2
        u8      dev_addres;
        u8      reserved1[2];
-       u32     reg_address;
-       u32     reg_value;
+       __le32  reg_address;
+       __le32  reg_value;
        u8      reserved2[4];
 };
 
@@ -2195,8 +2198,12 @@ I40E_CHECK_CMD_LENGTH(i40e_aqc_phy_register_access);
  */
 struct i40e_aqc_nvm_update {
        u8      command_flags;
-#define I40E_AQ_NVM_LAST_CMD   0x01
-#define I40E_AQ_NVM_FLASH_ONLY 0x80
+#define I40E_AQ_NVM_LAST_CMD                   0x01
+#define I40E_AQ_NVM_FLASH_ONLY                 0x80
+#define I40E_AQ_NVM_PRESERVATION_FLAGS_SHIFT   1
+#define I40E_AQ_NVM_PRESERVATION_FLAGS_MASK    0x03
+#define I40E_AQ_NVM_PRESERVATION_FLAGS_SELECTED        0x03
+#define I40E_AQ_NVM_PRESERVATION_FLAGS_ALL     0x01
        u8      module_pointer;
        __le16  length;
        __le32  offset;
@@ -2456,6 +2463,17 @@ struct i40e_aqc_lldp_start {
 
 I40E_CHECK_CMD_LENGTH(i40e_aqc_lldp_start);
 
+/* Set DCB (direct 0x0303) */
+struct i40e_aqc_set_dcb_parameters {
+       u8 command;
+#define I40E_AQ_DCB_SET_AGENT  0x1
+#define I40E_DCB_VALID         0x1
+       u8 valid_flags;
+       u8 reserved[14];
+};
+
+I40E_CHECK_CMD_LENGTH(i40e_aqc_set_dcb_parameters);
+
 /* Get CEE DCBX Oper Config (0x0A07)
  * uses the generic descriptor struct
  * returns below as indirect response