Imported Upstream version 16.07-rc1

[deb_dpdk.git] / drivers / net / i40e / base / i40e_type.h

diff --git a/drivers/net/i40e/base/i40e_type.h b/drivers/net/i40e/base/i40e_type.h
index d5ca67a..5349419 100644 (file)
--- a/drivers/net/i40e/base/i40e_type.h
+++ b/drivers/net/i40e/base/i40e_type.h
@@ -188,7 +188,7 @@ enum i40e_memcpy_type {
 };
 
 #ifdef X722_SUPPORT
-#define I40E_FW_API_VERSION_MINOR_X722 0x0004
+#define I40E_FW_API_VERSION_MINOR_X722 0x0005
 #endif
 #define I40E_FW_API_VERSION_MINOR_X710 0x0005
 
@@ -376,6 +376,11 @@ struct i40e_hw_capabilities {
 #define I40E_FLEX10_STATUS_DCC_ERROR   0x1
 #define I40E_FLEX10_STATUS_VC_MODE     0x2
 
+       bool sec_rev_disabled;
+       bool update_disabled;
+#define I40E_NVM_MGMT_SEC_REV_DISABLED 0x1
+#define I40E_NVM_MGMT_UPDATE_DISABLED  0x2
+
        bool mgmt_cem;
        bool ieee_1588;
        bool iwarp;
@@ -655,6 +660,8 @@ struct i40e_hw {
        enum i40e_nvmupd_state nvmupd_state;
        struct i40e_aq_desc nvm_wb_desc;
        struct i40e_virt_mem nvm_buff;
+       bool nvm_release_on_done;
+       u16 nvm_wait_opcode;
 
        /* HMC info */
        struct i40e_hmc_info hmc; /* HMC info struct */
@@ -1631,4 +1638,37 @@ struct i40e_lldp_variables {
 
 /* RSS Hash Table Size */
 #define I40E_PFQF_CTL_0_HASHLUTSIZE_512        0x00010000
+
+/* INPUT SET MASK for RSS, flow director, and flexible payload */
+#define I40E_L3_SRC_SHIFT              47
+#define I40E_L3_SRC_MASK               (0x3ULL << I40E_L3_SRC_SHIFT)
+#define I40E_L3_V6_SRC_SHIFT           43
+#define I40E_L3_V6_SRC_MASK            (0xFFULL << I40E_L3_V6_SRC_SHIFT)
+#define I40E_L3_DST_SHIFT              35
+#define I40E_L3_DST_MASK               (0x3ULL << I40E_L3_DST_SHIFT)
+#define I40E_L3_V6_DST_SHIFT           35
+#define I40E_L3_V6_DST_MASK            (0xFFULL << I40E_L3_V6_DST_SHIFT)
+#define I40E_L4_SRC_SHIFT              34
+#define I40E_L4_SRC_MASK               (0x1ULL << I40E_L4_SRC_SHIFT)
+#define I40E_L4_DST_SHIFT              33
+#define I40E_L4_DST_MASK               (0x1ULL << I40E_L4_DST_SHIFT)
+#define I40E_VERIFY_TAG_SHIFT          31
+#define I40E_VERIFY_TAG_MASK           (0x3ULL << I40E_VERIFY_TAG_SHIFT)
+
+#define I40E_FLEX_50_SHIFT             13
+#define I40E_FLEX_50_MASK              (0x1ULL << I40E_FLEX_50_SHIFT)
+#define I40E_FLEX_51_SHIFT             12
+#define I40E_FLEX_51_MASK              (0x1ULL << I40E_FLEX_51_SHIFT)
+#define I40E_FLEX_52_SHIFT             11
+#define I40E_FLEX_52_MASK              (0x1ULL << I40E_FLEX_52_SHIFT)
+#define I40E_FLEX_53_SHIFT             10
+#define I40E_FLEX_53_MASK              (0x1ULL << I40E_FLEX_53_SHIFT)
+#define I40E_FLEX_54_SHIFT             9
+#define I40E_FLEX_54_MASK              (0x1ULL << I40E_FLEX_54_SHIFT)
+#define I40E_FLEX_55_SHIFT             8
+#define I40E_FLEX_55_MASK              (0x1ULL << I40E_FLEX_55_SHIFT)
+#define I40E_FLEX_56_SHIFT             7
+#define I40E_FLEX_56_MASK              (0x1ULL << I40E_FLEX_56_SHIFT)
+#define I40E_FLEX_57_SHIFT             6
+#define I40E_FLEX_57_MASK              (0x1ULL << I40E_FLEX_57_SHIFT)
 #endif /* _I40E_TYPE_H_ */