New upstream version 17.11-rc3

[deb_dpdk.git] / drivers / net / ixgbe / ixgbe_rxtx.h

diff --git a/drivers/net/ixgbe/ixgbe_rxtx.h b/drivers/net/ixgbe/ixgbe_rxtx.h
index 85feb0b..cc7c828 100644 (file)
--- a/drivers/net/ixgbe/ixgbe_rxtx.h
+++ b/drivers/net/ixgbe/ixgbe_rxtx.h
@@ -138,8 +138,12 @@ struct ixgbe_rx_queue {
        uint16_t rx_nb_avail; /**< nr of staged pkts ready to ret to app */
        uint16_t rx_next_avail; /**< idx of next staged pkt to ret to app */
        uint16_t rx_free_trigger; /**< triggers rx buffer allocation */
-       uint16_t            rx_using_sse;
+       uint8_t            rx_using_sse;
        /**< indicates that vector RX is in use */
+#ifdef RTE_LIBRTE_SECURITY
+       uint8_t            using_ipsec;
+       /**< indicates that IPsec RX feature is in use */
+#endif
 #ifdef RTE_IXGBE_INC_VECTOR
        uint16_t            rxrearm_nb;     /**< number of remaining to be re-armed */
        uint16_t            rxrearm_start;  /**< the idx we start the re-arming from */
@@ -148,7 +152,7 @@ struct ixgbe_rx_queue {
        uint16_t            queue_id; /**< RX queue index. */
        uint16_t            reg_idx;  /**< RX queue register index. */
        uint16_t            pkt_type_mask;  /**< Packet type mask for different NICs. */
-       uint8_t             port_id;  /**< Device port identifier. */
+       uint16_t            port_id;  /**< Device port identifier. */
        uint8_t             crc_len;  /**< 0 if CRC stripped, 4 otherwise. */
        uint8_t             drop_en;  /**< If not 0, set SRRCTL.Drop_En. */
        uint8_t             rx_deferred_start; /**< not in global dev start. */
@@ -183,6 +187,11 @@ union ixgbe_tx_offload {
                /* fields for TX offloading of tunnels */
                uint64_t outer_l3_len:8; /**< Outer L3 (IP) Hdr Length. */
                uint64_t outer_l2_len:8; /**< Outer L2 (MAC) Hdr Length. */
+#ifdef RTE_LIBRTE_SECURITY
+               /* inline ipsec related*/
+               uint64_t sa_idx:8;      /**< TX SA database entry index */
+               uint64_t sec_pad_len:4; /**< padding length */
+#endif
        };
 };
 
@@ -237,7 +246,7 @@ struct ixgbe_tx_queue {
        uint16_t tx_next_rs; /**< next desc to set RS bit */
        uint16_t            queue_id;      /**< TX queue index. */
        uint16_t            reg_idx;       /**< TX queue register index. */
-       uint8_t             port_id;       /**< Device port identifier. */
+       uint16_t            port_id;       /**< Device port identifier. */
        uint8_t             pthresh;       /**< Prefetch threshold register. */
        uint8_t             hthresh;       /**< Host threshold register. */
        uint8_t             wthresh;       /**< Write-back threshold reg. */
@@ -247,6 +256,10 @@ struct ixgbe_tx_queue {
        struct ixgbe_advctx_info ctx_cache[IXGBE_CTX_NUM];
        const struct ixgbe_txq_ops *ops;       /**< txq ops */
        uint8_t             tx_deferred_start; /**< not in global dev start. */
+#ifdef RTE_LIBRTE_SECURITY
+       uint8_t             using_ipsec;
+       /**< indicates that IPsec TX feature is in use */
+#endif
 };
 
 struct ixgbe_txq_ops {