Imported Upstream version 16.11

[deb_dpdk.git] / drivers / net / qede / base / ecore_gtt_reg_addr.h

diff --git a/drivers/net/qede/base/ecore_gtt_reg_addr.h b/drivers/net/qede/base/ecore_gtt_reg_addr.h
index cc49fc7..6395b7c 100644 (file)
--- a/drivers/net/qede/base/ecore_gtt_reg_addr.h
+++ b/drivers/net/qede/base/ecore_gtt_reg_addr.h
@@ -10,33 +10,43 @@
 #define GTT_REG_ADDR_H
 
 /* Win 2 */
-#define GTT_BAR0_MAP_REG_IGU_CMD 0x00f000UL
+/* Access:RW   DataWidth:0x20    Chips: BB_A0 BB_B0 K2 */
+#define GTT_BAR0_MAP_REG_IGU_CMD                                      0x00f000UL
 
 /* Win 3 */
-#define GTT_BAR0_MAP_REG_TSDM_RAM 0x010000UL
+/* Access:RW   DataWidth:0x20    Chips: BB_A0 BB_B0 K2 */
+#define GTT_BAR0_MAP_REG_TSDM_RAM                                     0x010000UL
 
 /* Win 4 */
-#define GTT_BAR0_MAP_REG_MSDM_RAM 0x011000UL
+/* Access:RW   DataWidth:0x20    Chips: BB_A0 BB_B0 K2 */
+#define GTT_BAR0_MAP_REG_MSDM_RAM                                     0x011000UL
 
 /* Win 5 */
-#define GTT_BAR0_MAP_REG_MSDM_RAM_1024 0x012000UL
+/* Access:RW   DataWidth:0x20    Chips: BB_A0 BB_B0 K2 */
+#define GTT_BAR0_MAP_REG_MSDM_RAM_1024                                0x012000UL
 
 /* Win 6 */
-#define GTT_BAR0_MAP_REG_USDM_RAM 0x013000UL
+/* Access:RW   DataWidth:0x20    Chips: BB_A0 BB_B0 K2 */
+#define GTT_BAR0_MAP_REG_USDM_RAM                                     0x013000UL
 
 /* Win 7 */
-#define GTT_BAR0_MAP_REG_USDM_RAM_1024 0x014000UL
+/* Access:RW   DataWidth:0x20    Chips: BB_A0 BB_B0 K2 */
+#define GTT_BAR0_MAP_REG_USDM_RAM_1024                                0x014000UL
 
 /* Win 8 */
-#define GTT_BAR0_MAP_REG_USDM_RAM_2048 0x015000UL
+/* Access:RW   DataWidth:0x20    Chips: BB_A0 BB_B0 K2 */
+#define GTT_BAR0_MAP_REG_USDM_RAM_2048                                0x015000UL
 
 /* Win 9 */
-#define GTT_BAR0_MAP_REG_XSDM_RAM  0x016000UL
+/* Access:RW   DataWidth:0x20    Chips: BB_A0 BB_B0 K2 */
+#define GTT_BAR0_MAP_REG_XSDM_RAM                                     0x016000UL
 
 /* Win 10 */
-#define GTT_BAR0_MAP_REG_YSDM_RAM 0x017000UL
+/* Access:RW   DataWidth:0x20    Chips: BB_A0 BB_B0 K2 */
+#define GTT_BAR0_MAP_REG_YSDM_RAM                                     0x017000UL
 
 /* Win 11 */
-#define GTT_BAR0_MAP_REG_PSDM_RAM 0x018000UL
+/* Access:RW   DataWidth:0x20    Chips: BB_A0 BB_B0 K2 */
+#define GTT_BAR0_MAP_REG_PSDM_RAM                                     0x018000UL
 
 #endif