New upstream version 17.11-rc3

[deb_dpdk.git] / drivers / net / qede / qede_rxtx.h

diff --git a/drivers/net/qede/qede_rxtx.h b/drivers/net/qede/qede_rxtx.h
index a1bbd25..acf9e47 100644 (file)
--- a/drivers/net/qede/qede_rxtx.h
+++ b/drivers/net/qede/qede_rxtx.h
@@ -77,14 +77,15 @@
 
 #define QEDE_TXQ_FLAGS         ((uint32_t)ETH_TXQ_FLAGS_NOMULTSEGS)
 
-#define MAX_NUM_TC             8
-
-#define for_each_queue(i) for (i = 0; i < qdev->num_queues; i++)
-
+#define for_each_rss(i)                for (i = 0; i < qdev->num_rx_queues; i++)
+#define for_each_tss(i)                for (i = 0; i < qdev->num_tx_queues; i++)
+#define QEDE_RXTX_MAX(qdev) \
+       (RTE_MAX(QEDE_RSS_COUNT(qdev), QEDE_TSS_COUNT(qdev)))
 
 /* Macros for non-tunnel packet types lkup table */
 #define QEDE_PKT_TYPE_UNKNOWN                          0x0
-#define QEDE_PKT_TYPE_MAX                              0xf
+#define QEDE_PKT_TYPE_MAX                              0x3f
+
 #define QEDE_PKT_TYPE_IPV4                             0x1
 #define QEDE_PKT_TYPE_IPV6                             0x2
 #define QEDE_PKT_TYPE_IPV4_TCP                         0x5
@@ -92,6 +93,20 @@
 #define QEDE_PKT_TYPE_IPV4_UDP                         0x9
 #define QEDE_PKT_TYPE_IPV6_UDP                         0xa
 
+/* For frag pkts, corresponding IP bits is set */
+#define QEDE_PKT_TYPE_IPV4_FRAG                                0x11
+#define QEDE_PKT_TYPE_IPV6_FRAG                                0x12
+
+#define QEDE_PKT_TYPE_IPV4_VLAN                                0x21
+#define QEDE_PKT_TYPE_IPV6_VLAN                                0x22
+#define QEDE_PKT_TYPE_IPV4_TCP_VLAN                    0x25
+#define QEDE_PKT_TYPE_IPV6_TCP_VLAN                    0x26
+#define QEDE_PKT_TYPE_IPV4_UDP_VLAN                    0x29
+#define QEDE_PKT_TYPE_IPV6_UDP_VLAN                    0x2a
+
+#define QEDE_PKT_TYPE_IPV4_VLAN_FRAG                   0x31
+#define QEDE_PKT_TYPE_IPV6_VLAN_FRAG                   0x32
+
 /* Macros for tunneled packets with next protocol lkup table */
 #define QEDE_PKT_TYPE_TUNN_GENEVE                      0x1
 #define QEDE_PKT_TYPE_TUNN_GRE                         0x2
@@ -99,12 +114,12 @@
 
 /* Bit 2 is don't care bit */
 #define QEDE_PKT_TYPE_TUNN_L2_TENID_NOEXIST_GENEVE     0x9
-#define QEDE_PKT_TYPE_TUNN_L2_TENID_NOEXIST_GRE        0xa
+#define QEDE_PKT_TYPE_TUNN_L2_TENID_NOEXIST_GRE                0xa
 #define QEDE_PKT_TYPE_TUNN_L2_TENID_NOEXIST_VXLAN      0xb
 
 #define QEDE_PKT_TYPE_TUNN_L2_TENID_EXIST_GENEVE       0xd
 #define QEDE_PKT_TYPE_TUNN_L2_TENID_EXIST_GRE          0xe
-#define QEDE_PKT_TYPE_TUNN_L2_TENID_EXIST_VXLAN        0xf
+#define QEDE_PKT_TYPE_TUNN_L2_TENID_EXIST_VXLAN                0xf
 
 
 #define QEDE_PKT_TYPE_TUNN_IPV4_TENID_NOEXIST_GENEVE    0x11
@@ -112,7 +127,7 @@
 #define QEDE_PKT_TYPE_TUNN_IPV4_TENID_NOEXIST_VXLAN     0x13
 
 #define QEDE_PKT_TYPE_TUNN_IPV4_TENID_EXIST_GENEVE     0x15
-#define QEDE_PKT_TYPE_TUNN_IPV4_TENID_EXIST_GRE        0x16
+#define QEDE_PKT_TYPE_TUNN_IPV4_TENID_EXIST_GRE                0x16
 #define QEDE_PKT_TYPE_TUNN_IPV4_TENID_EXIST_VXLAN      0x17
 
 
@@ -134,7 +149,9 @@
 
 #define QEDE_TX_OFFLOAD_MASK (QEDE_TX_CSUM_OFFLOAD_MASK | \
                              PKT_TX_QINQ_PKT           | \
-                             PKT_TX_VLAN_PKT)
+                             PKT_TX_VLAN_PKT           | \
+                             PKT_TX_TUNNEL_VXLAN       | \
+                             PKT_TX_TUNNEL_MPLSINUDP)
 
 #define QEDE_TX_OFFLOAD_NOTSUP_MASK \
        (PKT_TX_OFFLOAD_MASK ^ QEDE_TX_OFFLOAD_MASK)
@@ -164,6 +181,7 @@ struct qede_rx_queue {
        uint16_t *hw_cons_ptr;
        void OSAL_IOMEM *hw_rxq_prod_addr;
        struct qede_rx_entry *sw_rx_ring;
+       struct ecore_sb_info *sb_info;
        uint16_t sw_rx_cons;
        uint16_t sw_rx_prod;
        uint16_t nb_rx_desc;
@@ -212,13 +230,9 @@ struct qede_tx_queue {
 };
 
 struct qede_fastpath {
-       struct qede_dev *qdev;
-       u8 type;
-       uint8_t id;
        struct ecore_sb_info *sb_info;
        struct qede_rx_queue *rxq;
-       struct qede_tx_queue *txqs[MAX_NUM_TC];
-       char name[80];
+       struct qede_tx_queue *txq;
 };
 
 /*
@@ -239,16 +253,6 @@ void qede_rx_queue_release(void *rx_queue);
 
 void qede_tx_queue_release(void *tx_queue);
 
-int qede_dev_start(struct rte_eth_dev *eth_dev);
-
-void qede_dev_stop(struct rte_eth_dev *eth_dev);
-
-int qede_reset_fp_rings(struct qede_dev *qdev);
-
-void qede_free_fp_arrays(struct qede_dev *qdev);
-
-void qede_free_mem_load(struct rte_eth_dev *eth_dev);
-
 uint16_t qede_xmit_pkts(void *p_txq, struct rte_mbuf **tx_pkts,
                        uint16_t nb_pkts);
 
@@ -258,9 +262,13 @@ uint16_t qede_xmit_prep_pkts(void *p_txq, struct rte_mbuf **tx_pkts,
 uint16_t qede_recv_pkts(void *p_rxq, struct rte_mbuf **rx_pkts,
                        uint16_t nb_pkts);
 
-uint16_t qede_rxtx_pkts_dummy(__rte_unused void *p_rxq,
-                             __rte_unused struct rte_mbuf **pkts,
-                             __rte_unused uint16_t nb_pkts);
+uint16_t qede_rxtx_pkts_dummy(void *p_rxq,
+                             struct rte_mbuf **pkts,
+                             uint16_t nb_pkts);
+
+int qede_start_queues(struct rte_eth_dev *eth_dev);
+
+void qede_stop_queues(struct rte_eth_dev *eth_dev);
 
 /* Fastpath resource alloc/dealloc helpers */
 int qede_alloc_fp_resc(struct qede_dev *qdev);