New upstream version 18.11-rc1
[deb_dpdk.git] / drivers / net / sfc / base / hunt_nic.c
index 16ea81d..ca30e90 100644 (file)
@@ -20,7 +20,6 @@ hunt_nic_get_required_pcie_bandwidth(
        __out           uint32_t *bandwidth_mbpsp)
 {
        uint32_t port_modes;
-       uint32_t max_port_mode;
        uint32_t bandwidth;
        efx_rc_t rc;
 
@@ -30,7 +29,8 @@ hunt_nic_get_required_pcie_bandwidth(
         * capable mode is in use.
         */
 
-       if ((rc = efx_mcdi_get_port_modes(enp, &port_modes, NULL)) != 0) {
+       if ((rc = efx_mcdi_get_port_modes(enp, &port_modes,
+                   NULL, NULL)) != 0) {
                /* No port mode info available */
                bandwidth = 0;
                goto out;
@@ -46,17 +46,13 @@ hunt_nic_get_required_pcie_bandwidth(
                        goto fail1;
        } else {
                if (port_modes & (1U << TLV_PORT_MODE_40G)) {
-                       max_port_mode = TLV_PORT_MODE_40G;
+                       bandwidth = 40000;
                } else if (port_modes & (1U << TLV_PORT_MODE_10G_10G_10G_10G)) {
-                       max_port_mode = TLV_PORT_MODE_10G_10G_10G_10G;
+                       bandwidth = 4 * 10000;
                } else {
                        /* Assume two 10G ports */
-                       max_port_mode = TLV_PORT_MODE_10G_10G;
+                       bandwidth = 2 * 10000;
                }
-
-               if ((rc = ef10_nic_get_port_mode_bandwidth(max_port_mode,
-                                                           &bandwidth)) != 0)
-                       goto fail2;
        }
 
 out:
@@ -64,8 +60,6 @@ out:
 
        return (0);
 
-fail2:
-       EFSYS_PROBE(fail2);
 fail1:
        EFSYS_PROBE1(fail1, efx_rc_t, rc);
 
@@ -189,6 +183,9 @@ hunt_board_cfg(
 
        encp->enc_bug61265_workaround = B_FALSE; /* Medford only */
 
+       /* Checksums for TSO sends can be incorrect on Huntington. */
+       encp->enc_bug61297_workaround = B_TRUE;
+
        /* Alignment for receive packet DMA buffers */
        encp->enc_rx_buf_align_start = 1;
        encp->enc_rx_buf_align_end = 64; /* RX DMA end padding */