New upstream version 18.02

[deb_dpdk.git] / lib / librte_eal / common / include / arch / ppc_64 / rte_atomic.h

diff --git a/lib/librte_eal/common/include/arch/ppc_64/rte_atomic.h b/lib/librte_eal/common/include/arch/ppc_64/rte_atomic.h
index 150810c..39fce7b 100644 (file)
--- a/lib/librte_eal/common/include/arch/ppc_64/rte_atomic.h
+++ b/lib/librte_eal/common/include/arch/ppc_64/rte_atomic.h
@@ -64,9 +64,9 @@ extern "C" {
  * occur before the STORE operations generated after.
  */
 #ifdef RTE_ARCH_64
-#define        rte_wmb() {asm volatile("lwsync" : : : "memory"); }
+#define        rte_wmb() asm volatile("lwsync" : : : "memory")
 #else
-#define        rte_wmb() {asm volatile("sync" : : : "memory"); }
+#define        rte_wmb() asm volatile("sync" : : : "memory")
 #endif
 
 /**
@@ -76,9 +76,9 @@ extern "C" {
  * occur before the LOAD operations generated after.
  */
 #ifdef RTE_ARCH_64
-#define        rte_rmb() {asm volatile("lwsync" : : : "memory"); }
+#define        rte_rmb() asm volatile("lwsync" : : : "memory")
 #else
-#define        rte_rmb() {asm volatile("sync" : : : "memory"); }
+#define        rte_rmb() asm volatile("sync" : : : "memory")
 #endif
 
 #define rte_smp_mb() rte_mb()
@@ -93,6 +93,10 @@ extern "C" {
 
 #define rte_io_rmb() rte_rmb()
 
+#define rte_cio_wmb() rte_wmb()
+
+#define rte_cio_rmb() rte_rmb()
+
 /*------------------------- 16 bit atomic operations -------------------------*/
 /* To be compatible with Power7, use GCC built-in functions for 16 bit
  * operations */