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(parent: ec8a577) | patch
vcl: always fill buffer or drain rx fifo 05/28805/2
authorFlorin Coras <fcoras@cisco.com>
Thu, 10 Sep 2020 19:27:14 +0000 (12:27 -0700)
committerAndrew Yourtchenko <ayourtch@gmail.com>
Tue, 15 Sep 2020 08:39:26 +0000 (08:39 +0000)
commit89bdb836f9c580b94119b4bff5ab20abd3bd94e5
treed79d916eecb7250ed7cae1ced84e2e5379a934c3tree | snapshot
parentec8a577ed98beb8ec88de57d39309af4f908eb01commit | diff
vcl: always fill buffer or drain rx fifo

Type: improvement

Signed-off-by: Florin Coras <fcoras@cisco.com>
Change-Id: Ibbe438aa6f2fe6d9f55c56ca6d3aec1a29b32cad
(cherry picked from commit 4a2c794c431c72364e241fa14327f03e35b886b7)
src/vcl/vppcom.c diff | blob | history
Vector Packet Processing