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(parent: f286c4b) | patch
Change l2_patch from dual-loop to quad-loop 83/15383/4
authorYulong Pei <yulong.pei@intel.com>
Fri, 19 Oct 2018 15:29:29 +0000 (23:29 +0800)
committerDamjan Marion <dmarion@me.com>
Tue, 6 Nov 2018 12:05:40 +0000 (12:05 +0000)
commitdcb0c1aae89a8b542f734b89e33505852ab3d6da
tree8b9ab1cd8e9d3ea79d4f99b3a4889bbef97d0c65tree | snapshot
parentf286c4b9427748568036d04e8aa2408a4069dee7commit | diff
Change l2_patch from dual-loop to quad-loop

The change can save 1.1 clocks per packet on Intel Atom C3858 platform,
It downgraded from 2.05e1 to 1.94e1 clocks per packet.

The change can save 0.3 clocks per packet on Intel Xeon CPU E5-2699 v4 @ 2.20GHz,
It downgraded from 1.26e1 to 1.23e1 clocks per packet.

Change-Id: I1ede77fb592a797d86940a8abad9ca291a89f1c7
Signed-off-by: Yulong Pei <yulong.pei@intel.com>
src/vnet/l2/l2_patch.c diff | blob | history
Vector Packet Processing