report: added description of CSIT environment ver. 5 49/29249/1
authorMaciek Konstantynowicz <mkonstan@cisco.com>
Tue, 29 Sep 2020 14:46:04 +0000 (15:46 +0100)
committerTibor Frank <tifrank@cisco.com>
Wed, 7 Oct 2020 08:33:25 +0000 (08:33 +0000)
Change-Id: Ic42bb1904d3cb7407c5d494f4ca53f0b6fd75d32
Signed-off-by: Maciek Konstantynowicz <mkonstan@cisco.com>
(cherry picked from commit f82f4fdc96cfc3c1891deb4b1afb49b7746f041c)

docs/report/introduction/test_environment_intro.rst

index d3ec9df..4f64571 100644 (file)
@@ -60,15 +60,26 @@ Following is the list of CSIT versions to date:
   `TRex
   <https://docs.fd.io/csit/rls2005/report/vpp_performance_tests/test_environment.html#tg-settings-trex>`_,
   `CSIT <https://git.fd.io/csit/tree/?h=rls2005>`_).
+- Ver. 5 associated with CSIT rls2009 branch (`HW
+  <https://git.fd.io/csit/tree/docs/lab?h=rls2009>`_, `Linux
+  <https://docs.fd.io/csit/rls2009/report/vpp_performance_tests/test_environment.html#sut-settings-linux>`_,
+  `TRex
+  <https://docs.fd.io/csit/rls2009/report/vpp_performance_tests/test_environment.html#tg-settings-trex>`_,
+  `CSIT <https://git.fd.io/csit/tree/?h=rls2009>`_).
+
+  - The main change is TRex data-plane core resource adjustments:
+    `increase from 7 to 8 cores and pinning cores to interfaces <https://gerrit.fd.io/r/c/csit/+/28184>`_
+    for better TRex performance with symmetric traffic profiles.
+
 
 To identify performance changes due to VPP code development from
-v20.01.0 to v20.05.0, both have been tested in CSIT environment ver. 4
+v20.05.0 to v20.09.0, both have been tested in CSIT environment ver. 5
 and compared against each other. All substantial progressions and
 regressions have been marked up with RCA analysis. See
 :ref:`vpp_throughput_comparisons` and :ref:`vpp_known_issues`.
 
-CSIT environment ver. 4 has been evaluated against the ver. 2 by
-benchmarking VPP v20.01.0 in both environment versions.
+CSIT environment ver. 5 has been evaluated against the ver. 4 by
+benchmarking VPP v20.05.0 in both environment versions.
 
 Physical Testbeds
 -----------------