Report: Fix the labels

Change-Id: I82740007b4c12b8a21014b4572b034013f165280
Signed-off-by: Tibor Frank <tifrank@cisco.com>

diff --git a/docs/report/vpp_performance_tests/packet_latency_graphs/index.rst b/docs/report/vpp_performance_tests/packet_latency_graphs/index.rst
index 1cf4c66..c6c40d7 100644 (file)
--- a/docs/report/vpp_performance_tests/packet_latency_graphs/index.rst
+++ b/docs/report/vpp_performance_tests/packet_latency_graphs/index.rst
@@ -1,10 +1,10 @@
 
-.. _VPP_Packet_Latency:
-
 .. raw:: latex
 
     \clearpage
 
+.. _VPP_Packet_Latency:
+
 Packet Latency
 ==============
 

diff --git a/docs/report/vpp_performance_tests/packet_throughput_graphs/index.rst b/docs/report/vpp_performance_tests/packet_throughput_graphs/index.rst
index 688bdd2..9bc7184 100644 (file)
--- a/docs/report/vpp_performance_tests/packet_throughput_graphs/index.rst
+++ b/docs/report/vpp_performance_tests/packet_throughput_graphs/index.rst
@@ -1,10 +1,10 @@
 
-.. _VPP_Packet_Throughput:
-
 .. raw:: latex
 
     \clearpage
 
+.. _VPP_Packet_Throughput:
+
 Packet Throughput
 =================
 

diff --git a/docs/report/vpp_performance_tests/test_environment.rst b/docs/report/vpp_performance_tests/test_environment.rst
index 7b18141..57e7973 100644 (file)
--- a/docs/report/vpp_performance_tests/test_environment.rst
+++ b/docs/report/vpp_performance_tests/test_environment.rst
@@ -1,10 +1,10 @@
 
-.. _vpp_test_environment:
-
 .. raw:: latex
 
     \clearpage
 
+.. _vpp_test_environment:
+
 .. include:: ../introduction/test_environment_intro.rst
 
 .. include:: ../introduction/test_environment_sut_calib_hsw.rst

diff --git a/docs/report/vpp_performance_tests/throughput_speedup_multi_core/index.rst b/docs/report/vpp_performance_tests/throughput_speedup_multi_core/index.rst
index c56e55c..b6feb2b 100644 (file)
--- a/docs/report/vpp_performance_tests/throughput_speedup_multi_core/index.rst
+++ b/docs/report/vpp_performance_tests/throughput_speedup_multi_core/index.rst
@@ -1,10 +1,10 @@
 
-.. _throughput_speedup_multi_core:
-
 .. raw:: latex
 
     \clearpage
 
+.. _throughput_speedup_multi_core:
+
 Speedup Multi-Core
 ==================