debian/patches/dpdk-dev-ppc-enable-1-7-lpm-add-AltiVec-for-ppc64.patch

   1 From: Gowrishankar Muthukrishnan <gowrishankar.m@linux.vnet.ibm.com>
   2 Date: Thu, 8 Sep 2016 22:18:03 +0530
   3 Subject: [PATCH 1/7] lpm: add AltiVec for ppc64
   4
   5 This patch adds ppc64le port for LPM library in DPDK.
   6
   7 Signed-off-by: Gowrishankar Muthukrishnan <gowrishankar.m@linux.vnet.ibm.com>
   8 Acked-by: Chao Zhu <chaozhu@linux.vnet.ibm.com>
   9
  10 Origin: Upstream, commit:d2cc7959342b5183ab88aed44ea011d660a91021
  11 Author: Gowrishankar Muthukrishnan <gowrishankar.m@linux.vnet.ibm.com>
  12 Last-Update: 2016-09-21
  13 ---
  14  app/test/test_xmmt_ops.h                           |  16 +++
  15  config/defconfig_ppc_64-power8-linuxapp-gcc        |   1 -
  16  .../common/include/arch/ppc_64/rte_vect.h          |  60 ++++++++
  17  lib/librte_lpm/Makefile                            |   2 +
  18  lib/librte_lpm/rte_lpm.h                           |   2 +
  19  lib/librte_lpm/rte_lpm_altivec.h                   | 154 +++++++++++++++++++++
  20  6 files changed, 234 insertions(+), 1 deletion(-)
  21  create mode 100644 lib/librte_eal/common/include/arch/ppc_64/rte_vect.h
  22  create mode 100644 lib/librte_lpm/rte_lpm_altivec.h
  23
  24 diff --git a/app/test/test_xmmt_ops.h b/app/test/test_xmmt_ops.h
  25 index de9c16f..42174d2 100644
  26 --- a/app/test/test_xmmt_ops.h
  27 +++ b/app/test/test_xmmt_ops.h
  28 @@ -62,6 +62,22 @@ vect_set_epi32(int i3, int i2, int i1, int i0)
  29  /* sets the 4 signed 32-bit integer values and returns the xmm_t variable */
  30  #define vect_set_epi32(i3, i2, i1, i0) _mm_set_epi32(i3, i2, i1, i0)
  31
  32 +#elif defined(RTE_ARCH_PPC_64)
  33 +
  34 +/* vect_* abstraction implementation using ALTIVEC */
  35 +
  36 +/* loads the xmm_t value from address p(does not need to be 16-byte aligned)*/
  37 +#define vect_loadu_sil128(p) vec_ld(0, p)
  38 +
  39 +/* sets the 4 signed 32-bit integer values and returns the xmm_t variable */
  40 +static inline xmm_t  __attribute__((always_inline))
  41 +vect_set_epi32(int i3, int i2, int i1, int i0)
  42 +{
  43 +       xmm_t data = (xmm_t){i0, i1, i2, i3};
  44 +
  45 +       return data;
  46 +}
  47 +
  48  #endif
  49
  50  #endif /* _TEST_XMMT_OPS_H_ */
  51 diff --git a/config/defconfig_ppc_64-power8-linuxapp-gcc b/config/defconfig_ppc_64-power8-linuxapp-gcc
  52 index bef8f49..9ddf3c5 100644
  53 --- a/config/defconfig_ppc_64-power8-linuxapp-gcc
  54 +++ b/config/defconfig_ppc_64-power8-linuxapp-gcc
  55 @@ -57,7 +57,6 @@ CONFIG_RTE_LIBRTE_ENIC_PMD=n
  56  CONFIG_RTE_LIBRTE_FM10K_PMD=n
  57
  58  # This following libraries are not available on Power. So they're turned off.
  59 -CONFIG_RTE_LIBRTE_LPM=n
  60  CONFIG_RTE_LIBRTE_ACL=n
  61  CONFIG_RTE_LIBRTE_SCHED=n
  62  CONFIG_RTE_LIBRTE_PORT=n
  63 diff --git a/lib/librte_eal/common/include/arch/ppc_64/rte_vect.h b/lib/librte_eal/common/include/arch/ppc_64/rte_vect.h
  64 new file mode 100644
  65 index 0000000..05209e5
  66 --- /dev/null
  67 +++ b/lib/librte_eal/common/include/arch/ppc_64/rte_vect.h
  68 @@ -0,0 +1,60 @@
  69 +/*
  70 + *   BSD LICENSE
  71 + *
  72 + *   Copyright (C) IBM Corporation 2016.
  73 + *
  74 + *   Redistribution and use in source and binary forms, with or without
  75 + *   modification, are permitted provided that the following conditions
  76 + *   are met:
  77 + *
  78 + *     * Redistributions of source code must retain the above copyright
  79 + *       notice, this list of conditions and the following disclaimer.
  80 + *     * Redistributions in binary form must reproduce the above copyright
  81 + *       notice, this list of conditions and the following disclaimer in
  82 + *       the documentation and/or other materials provided with the
  83 + *       distribution.
  84 + *     * Neither the name of IBM Corporation nor the names of its
  85 + *       contributors may be used to endorse or promote products derived
  86 + *       from this software without specific prior written permission.
  87 + *
  88 + *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  89 + *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  90 + *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  91 + *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  92 + *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  93 + *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  94 + *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  95 + *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  96 + *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  97 + *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  98 + *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  99 +*/
 100 +
 101 +#ifndef _RTE_VECT_PPC_64_H_
 102 +#define _RTE_VECT_PPC_64_H_
 103 +
 104 +#include <altivec.h>
 105 +
 106 +#ifdef __cplusplus
 107 +extern "C" {
 108 +#endif
 109 +
 110 +typedef vector signed int xmm_t;
 111 +
 112 +#define        XMM_SIZE        (sizeof(xmm_t))
 113 +#define        XMM_MASK        (XMM_SIZE - 1)
 114 +
 115 +typedef union rte_xmm {
 116 +       xmm_t    x;
 117 +       uint8_t  u8[XMM_SIZE / sizeof(uint8_t)];
 118 +       uint16_t u16[XMM_SIZE / sizeof(uint16_t)];
 119 +       uint32_t u32[XMM_SIZE / sizeof(uint32_t)];
 120 +       uint64_t u64[XMM_SIZE / sizeof(uint64_t)];
 121 +       double   pd[XMM_SIZE / sizeof(double)];
 122 +} __attribute__((aligned(16))) rte_xmm_t;
 123 +
 124 +#ifdef __cplusplus
 125 +}
 126 +#endif
 127 +
 128 +#endif /* _RTE_VECT_PPC_64_H_ */
 129 diff --git a/lib/librte_lpm/Makefile b/lib/librte_lpm/Makefile
 130 index 656ade2..3dc549d 100644
 131 --- a/lib/librte_lpm/Makefile
 132 +++ b/lib/librte_lpm/Makefile
 133 @@ -51,6 +51,8 @@ ifneq ($(filter y,$(CONFIG_RTE_ARCH_ARM) $(CONFIG_RTE_ARCH_ARM64)),)
 134  SYMLINK-$(CONFIG_RTE_LIBRTE_LPM)-include += rte_lpm_neon.h
 135  else ifeq ($(CONFIG_RTE_ARCH_X86),y)
 136  SYMLINK-$(CONFIG_RTE_LIBRTE_LPM)-include += rte_lpm_sse.h
 137 +else ifeq ($(CONFIG_RTE_ARCH_PPC_64),y)
 138 +SYMLINK-$(CONFIG_RTE_LIBRTE_LPM)-include += rte_lpm_altivec.h
 139  endif
 140
 141  # this lib needs eal
 142 diff --git a/lib/librte_lpm/rte_lpm.h b/lib/librte_lpm/rte_lpm.h
 143 index 2df1d67..dbe5483 100644
 144 --- a/lib/librte_lpm/rte_lpm.h
 145 +++ b/lib/librte_lpm/rte_lpm.h
 146 @@ -480,6 +480,8 @@ rte_lpm_lookupx4(const struct rte_lpm *lpm, xmm_t ip, uint32_t hop[4],
 147
 148  #if defined(RTE_ARCH_ARM) || defined(RTE_ARCH_ARM64)
 149  #include "rte_lpm_neon.h"
 150 +#elif defined(RTE_ARCH_PPC_64)
 151 +#include "rte_lpm_altivec.h"
 152  #else
 153  #include "rte_lpm_sse.h"
 154  #endif
 155 diff --git a/lib/librte_lpm/rte_lpm_altivec.h b/lib/librte_lpm/rte_lpm_altivec.h
 156 new file mode 100644
 157 index 0000000..e26e087
 158 --- /dev/null
 159 +++ b/lib/librte_lpm/rte_lpm_altivec.h
 160 @@ -0,0 +1,154 @@
 161 +/*
 162 + *   BSD LICENSE
 163 + *
 164 + *   Copyright (C) IBM Corporation 2016.
 165 + *
 166 + *   Redistribution and use in source and binary forms, with or without
 167 + *   modification, are permitted provided that the following conditions
 168 + *   are met:
 169 + *
 170 + *     * Redistributions of source code must retain the above copyright
 171 + *       notice, this list of conditions and the following disclaimer.
 172 + *     * Redistributions in binary form must reproduce the above copyright
 173 + *       notice, this list of conditions and the following disclaimer in
 174 + *       the documentation and/or other materials provided with the
 175 + *       distribution.
 176 + *     * Neither the name of IBM Corporation nor the names of its
 177 + *       contributors may be used to endorse or promote products derived
 178 + *       from this software without specific prior written permission.
 179 + *
 180 + *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 181 + *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 182 + *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 183 + *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 184 + *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 185 + *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 186 + *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 187 + *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 188 + *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 189 + *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 190 + *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 191 +*/
 192 +
 193 +#ifndef _RTE_LPM_ALTIVEC_H_
 194 +#define _RTE_LPM_ALTIVEC_H_
 195 +
 196 +#include <rte_branch_prediction.h>
 197 +#include <rte_byteorder.h>
 198 +#include <rte_common.h>
 199 +#include <rte_vect.h>
 200 +
 201 +#ifdef __cplusplus
 202 +extern "C" {
 203 +#endif
 204 +
 205 +static inline void
 206 +rte_lpm_lookupx4(const struct rte_lpm *lpm, xmm_t ip, uint32_t hop[4],
 207 +       uint32_t defv)
 208 +{
 209 +       vector signed int i24;
 210 +       rte_xmm_t i8;
 211 +       uint32_t tbl[4];
 212 +       uint64_t idx, pt, pt2;
 213 +       const uint32_t *ptbl;
 214 +
 215 +       const uint32_t mask = UINT8_MAX;
 216 +       const vector signed int mask8 = (xmm_t){mask, mask, mask, mask};
 217 +
 218 +       /*
 219 +        * RTE_LPM_VALID_EXT_ENTRY_BITMASK for 2 LPM entries
 220 +        * as one 64-bit value (0x0300000003000000).
 221 +        */
 222 +       const uint64_t mask_xv =
 223 +               ((uint64_t)RTE_LPM_VALID_EXT_ENTRY_BITMASK |
 224 +               (uint64_t)RTE_LPM_VALID_EXT_ENTRY_BITMASK << 32);
 225 +
 226 +       /*
 227 +        * RTE_LPM_LOOKUP_SUCCESS for 2 LPM entries
 228 +        * as one 64-bit value (0x0100000001000000).
 229 +        */
 230 +       const uint64_t mask_v =
 231 +               ((uint64_t)RTE_LPM_LOOKUP_SUCCESS |
 232 +               (uint64_t)RTE_LPM_LOOKUP_SUCCESS << 32);
 233 +
 234 +       /* get 4 indexes for tbl24[]. */
 235 +       i24 = vec_sr((xmm_t) ip,
 236 +               (vector unsigned int){CHAR_BIT, CHAR_BIT, CHAR_BIT, CHAR_BIT});
 237 +
 238 +       /* extract values from tbl24[] */
 239 +       idx = (uint32_t)i24[0];
 240 +       idx = idx < (1<<24) ? idx : (1<<24)-1;
 241 +       ptbl = (const uint32_t *)&lpm->tbl24[idx];
 242 +       tbl[0] = *ptbl;
 243 +
 244 +       idx = (uint32_t) i24[1];
 245 +       idx = idx < (1<<24) ? idx : (1<<24)-1;
 246 +       ptbl = (const uint32_t *)&lpm->tbl24[idx];
 247 +       tbl[1] = *ptbl;
 248 +
 249 +       idx = (uint32_t) i24[2];
 250 +       idx = idx < (1<<24) ? idx : (1<<24)-1;
 251 +       ptbl = (const uint32_t *)&lpm->tbl24[idx];
 252 +       tbl[2] = *ptbl;
 253 +
 254 +       idx = (uint32_t) i24[3];
 255 +       idx = idx < (1<<24) ? idx : (1<<24)-1;
 256 +       ptbl = (const uint32_t *)&lpm->tbl24[idx];
 257 +       tbl[3] = *ptbl;
 258 +
 259 +       /* get 4 indexes for tbl8[]. */
 260 +       i8.x = vec_and(ip, mask8);
 261 +
 262 +       pt = (uint64_t)tbl[0] |
 263 +               (uint64_t)tbl[1] << 32;
 264 +       pt2 = (uint64_t)tbl[2] |
 265 +               (uint64_t)tbl[3] << 32;
 266 +
 267 +       /* search successfully finished for all 4 IP addresses. */
 268 +       if (likely((pt & mask_xv) == mask_v) &&
 269 +                       likely((pt2 & mask_xv) == mask_v)) {
 270 +               *(uint64_t *)hop = pt & RTE_LPM_MASKX4_RES;
 271 +               *(uint64_t *)(hop + 2) = pt2 & RTE_LPM_MASKX4_RES;
 272 +               return;
 273 +       }
 274 +
 275 +       if (unlikely((pt & RTE_LPM_VALID_EXT_ENTRY_BITMASK) ==
 276 +                       RTE_LPM_VALID_EXT_ENTRY_BITMASK)) {
 277 +               i8.u32[0] = i8.u32[0] +
 278 +                       (uint8_t)tbl[0] * RTE_LPM_TBL8_GROUP_NUM_ENTRIES;
 279 +               ptbl = (const uint32_t *)&lpm->tbl8[i8.u32[0]];
 280 +               tbl[0] = *ptbl;
 281 +       }
 282 +       if (unlikely((pt >> 32 & RTE_LPM_VALID_EXT_ENTRY_BITMASK) ==
 283 +                       RTE_LPM_VALID_EXT_ENTRY_BITMASK)) {
 284 +               i8.u32[1] = i8.u32[1] +
 285 +                       (uint8_t)tbl[1] * RTE_LPM_TBL8_GROUP_NUM_ENTRIES;
 286 +               ptbl = (const uint32_t *)&lpm->tbl8[i8.u32[1]];
 287 +               tbl[1] = *ptbl;
 288 +       }
 289 +       if (unlikely((pt2 & RTE_LPM_VALID_EXT_ENTRY_BITMASK) ==
 290 +                       RTE_LPM_VALID_EXT_ENTRY_BITMASK)) {
 291 +               i8.u32[2] = i8.u32[2] +
 292 +                       (uint8_t)tbl[2] * RTE_LPM_TBL8_GROUP_NUM_ENTRIES;
 293 +               ptbl = (const uint32_t *)&lpm->tbl8[i8.u32[2]];
 294 +               tbl[2] = *ptbl;
 295 +       }
 296 +       if (unlikely((pt2 >> 32 & RTE_LPM_VALID_EXT_ENTRY_BITMASK) ==
 297 +                       RTE_LPM_VALID_EXT_ENTRY_BITMASK)) {
 298 +               i8.u32[3] = i8.u32[3] +
 299 +                       (uint8_t)tbl[3] * RTE_LPM_TBL8_GROUP_NUM_ENTRIES;
 300 +               ptbl = (const uint32_t *)&lpm->tbl8[i8.u32[3]];
 301 +               tbl[3] = *ptbl;
 302 +       }
 303 +
 304 +       hop[0] = (tbl[0] & RTE_LPM_LOOKUP_SUCCESS) ? tbl[0] & 0x00FFFFFF : defv;
 305 +       hop[1] = (tbl[1] & RTE_LPM_LOOKUP_SUCCESS) ? tbl[1] & 0x00FFFFFF : defv;
 306 +       hop[2] = (tbl[2] & RTE_LPM_LOOKUP_SUCCESS) ? tbl[2] & 0x00FFFFFF : defv;
 307 +       hop[3] = (tbl[3] & RTE_LPM_LOOKUP_SUCCESS) ? tbl[3] & 0x00FFFFFF : defv;
 308 +}
 309 +
 310 +#ifdef __cplusplus
 311 +}
 312 +#endif
 313 +
 314 +#endif /* _RTE_LPM_ALTIVEC_H_ */
 315 --
 316 1.9.1
 317