2 Copyright 2015 6WIND S.A.
3 Copyright 2015 Mellanox
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34 The MLX5 poll mode driver library (**librte_pmd_mlx5**) provides support
35 for **Mellanox ConnectX-4**, **Mellanox ConnectX-4 Lx** , **Mellanox
36 ConnectX-5** and **Mellanox Bluefield** families of 10/25/40/50/100 Gb/s
37 adapters as well as their virtual functions (VF) in SR-IOV context.
39 Information and documentation about these adapters can be found on the
40 `Mellanox website <http://www.mellanox.com>`__. Help is also provided by the
41 `Mellanox community <http://community.mellanox.com/welcome>`__.
43 There is also a `section dedicated to this poll mode driver
44 <http://www.mellanox.com/page/products_dyn?product_family=209&mtag=pmd_for_dpdk>`__.
48 Due to external dependencies, this driver is disabled by default. It must
49 be enabled manually by setting ``CONFIG_RTE_LIBRTE_MLX5_PMD=y`` and
52 Implementation details
53 ----------------------
55 Besides its dependency on libibverbs (that implies libmlx5 and associated
56 kernel support), librte_pmd_mlx5 relies heavily on system calls for control
57 operations such as querying/updating the MTU and flow control parameters.
59 For security reasons and robustness, this driver only deals with virtual
60 memory addresses. The way resources allocations are handled by the kernel
61 combined with hardware specifications that allow it to handle virtual memory
62 addresses directly ensure that DPDK applications cannot access random
63 physical memory (or memory that does not belong to the current process).
65 This capability allows the PMD to coexist with kernel network interfaces
66 which remain functional, although they stop receiving unicast packets as
67 long as they share the same MAC address.
68 This means legacy linux control tools (for example: ethtool, ifconfig and
69 more) can operate on the same network interfaces that owned by the DPDK
72 Enabling librte_pmd_mlx5 causes DPDK applications to be linked against
78 - Multi arch support: x86_64, POWER8, ARMv8.
79 - Multiple TX and RX queues.
80 - Support for scattered TX and RX frames.
81 - IPv4, IPv6, TCPv4, TCPv6, UDPv4 and UDPv6 RSS on any number of queues.
82 - Several RSS hash keys, one for each flow type.
83 - Configurable RETA table.
84 - Support for multiple MAC addresses.
88 - RX CRC stripping configuration.
90 - Multicast promiscuous mode.
91 - Hardware checksum offloads.
92 - Flow director (RTE_FDIR_MODE_PERFECT, RTE_FDIR_MODE_PERFECT_MAC_VLAN and
96 - KVM and VMware ESX SR-IOV modes are supported.
97 - RSS hash result is supported.
99 - Hardware checksum TX offload for VXLAN and GRE.
101 - Statistics query including Basic, Extended and per queue.
107 - Inner RSS for VXLAN frames is not supported yet.
108 - Port statistics through software counters only. Flow statistics are
109 supported by hardware counters.
110 - Hardware checksum RX offloads for VXLAN inner header are not supported yet.
111 - For secondary process:
113 - Forked secondary process not supported.
114 - All mempools must be initialized before rte_eth_dev_start().
116 - Flow pattern without any specific vlan will match for vlan packets as well:
118 When VLAN spec is not specified in the pattern, the matching rule will be created with VLAN as a wild card.
119 Meaning, the flow rule::
121 flow create 0 ingress pattern eth / vlan vid is 3 / ipv4 / end ...
123 Will only match vlan packets with vid=3. and the flow rules::
125 flow create 0 ingress pattern eth / ipv4 / end ...
129 flow create 0 ingress pattern eth / vlan / ipv4 / end ...
131 Will match any ipv4 packet (VLAN included).
133 - A multi segment packet must have less than 6 segments in case the Tx burst function
134 is set to multi-packet send or Enhanced multi-packet send. Otherwise it must have
135 less than 50 segments.
136 - Count action for RTE flow is only supported in Mellanox OFED 4.2.
137 - Flows with a VXLAN Network Identifier equal (or ends to be equal)
138 to 0 are not supported.
139 - VXLAN TSO and checksum offloads are not supported on VM.
147 These options can be modified in the ``.config`` file.
149 - ``CONFIG_RTE_LIBRTE_MLX5_PMD`` (default **n**)
151 Toggle compilation of librte_pmd_mlx5 itself.
153 - ``CONFIG_RTE_LIBRTE_MLX5_DEBUG`` (default **n**)
155 Toggle debugging code and stricter compilation flags. Enabling this option
156 adds additional run-time checks and debugging messages at the cost of
159 - ``CONFIG_RTE_LIBRTE_MLX5_TX_MP_CACHE`` (default **8**)
161 Maximum number of cached memory pools (MPs) per TX queue. Each MP from
162 which buffers are to be transmitted must be associated to memory regions
163 (MRs). This is a slow operation that must be cached.
165 This value is always 1 for RX queues since they use a single MP.
167 Environment variables
168 ~~~~~~~~~~~~~~~~~~~~~
170 - ``MLX5_PMD_ENABLE_PADDING``
172 Enables HW packet padding in PCI bus transactions.
174 When packet size is cache aligned and CRC stripping is enabled, 4 fewer
175 bytes are written to the PCI bus. Enabling padding makes such packets
178 In cases where PCI bandwidth is the bottleneck, padding can improve
181 This is disabled by default since this can also decrease performance for
182 unaligned packet sizes.
184 - ``MLX5_SHUT_UP_BF``
186 Configures HW Tx doorbell register as IO-mapped.
188 By default, the HW Tx doorbell is configured as a write-combining register.
189 The register would be flushed to HW usually when the write-combining buffer
190 becomes full, but it depends on CPU design.
192 Except for vectorized Tx burst routines, a write memory barrier is enforced
193 after updating the register so that the update can be immediately visible to
196 When vectorized Tx burst is called, the barrier is set only if the burst size
197 is not aligned to MLX5_VPMD_TX_MAX_BURST. However, setting this environmental
198 variable will bring better latency even though the maximum throughput can
201 Run-time configuration
202 ~~~~~~~~~~~~~~~~~~~~~~
204 - librte_pmd_mlx5 brings kernel network interfaces up during initialization
205 because it is affected by their state. Forcing them down prevents packets
208 - **ethtool** operations on related kernel interfaces also affect the PMD.
210 - ``rxq_cqe_comp_en`` parameter [int]
212 A nonzero value enables the compression of CQE on RX side. This feature
213 allows to save PCI bandwidth and improve performance. Enabled by default.
217 - x86_64 with ConnectX-4, ConnectX-4 LX, ConnectX-5 and Bluefield.
218 - POWER8 and ARMv8 with ConnectX-4 LX, ConnectX-5 and Bluefield.
220 - ``txq_inline`` parameter [int]
222 Amount of data to be inlined during TX operations. Improves latency.
223 Can improve PPS performance when PCI back pressure is detected and may be
224 useful for scenarios involving heavy traffic on many queues.
226 Because additional software logic is necessary to handle this mode, this
227 option should be used with care, as it can lower performance when back
228 pressure is not expected.
230 - ``txqs_min_inline`` parameter [int]
232 Enable inline send only when the number of TX queues is greater or equal
235 This option should be used in combination with ``txq_inline`` above.
237 On ConnectX-4, ConnectX-4 LX, ConnectX-5 and Bluefield without
240 - Disabled by default.
241 - In case ``txq_inline`` is set recommendation is 4.
243 On ConnectX-5 and Bluefield with Enhanced MPW:
245 - Set to 8 by default.
247 - ``txqs_max_vec`` parameter [int]
249 Enable vectorized Tx only when the number of TX queues is less than or
250 equal to this value. Effective only when ``tx_vec_en`` is enabled.
254 - Set to 8 by default on ARMv8.
255 - Set to 4 by default otherwise.
259 - Set to 16 by default.
261 - ``txq_mpw_en`` parameter [int]
263 A nonzero value enables multi-packet send (MPS) for ConnectX-4 Lx and
264 enhanced multi-packet send (Enhanced MPS) for ConnectX-5 and Bluefield.
265 MPS allows the TX burst function to pack up multiple packets in a
266 single descriptor session in order to save PCI bandwidth and improve
267 performance at the cost of a slightly higher CPU usage. When
268 ``txq_inline`` is set along with ``txq_mpw_en``, TX burst function tries
269 to copy entire packet data on to TX descriptor instead of including
270 pointer of packet only if there is enough room remained in the
271 descriptor. ``txq_inline`` sets per-descriptor space for either pointers
272 or inlined packets. In addition, Enhanced MPS supports hybrid mode -
273 mixing inlined packets and pointers in the same descriptor.
275 This option cannot be used in conjunction with ``tso`` below. When ``tso``
276 is set, ``txq_mpw_en`` is disabled.
278 It is currently only supported on the ConnectX-4 Lx, ConnectX-5 and Bluefield
279 families of adapters.
280 On ConnectX-4 Lx the MPW is considered un-secure hence disabled by default.
281 Users which enable the MPW should be aware that application which provides incorrect
282 mbuf descriptors in the Tx burst can lead to serious errors in the host including, on some cases,
284 On ConnectX-5 and Bluefield the MPW is secure and enabled by default.
286 - ``txq_mpw_hdr_dseg_en`` parameter [int]
288 A nonzero value enables including two pointers in the first block of TX
289 descriptor. This can be used to lessen CPU load for memory copy.
291 Effective only when Enhanced MPS is supported. Disabled by default.
293 - ``txq_max_inline_len`` parameter [int]
295 Maximum size of packet to be inlined. This limits the size of packet to
296 be inlined. If the size of a packet is larger than configured value, the
297 packet isn't inlined even though there's enough space remained in the
298 descriptor. Instead, the packet is included with pointer.
300 Effective only when Enhanced MPS is supported. The default value is 256.
302 - ``tso`` parameter [int]
304 A nonzero value enables hardware TSO.
305 When hardware TSO is enabled, packets marked with TCP segmentation
306 offload will be divided into segments by the hardware. Disabled by default.
308 - ``tx_vec_en`` parameter [int]
310 A nonzero value enables Tx vector on ConnectX-5 and Bluefield NICs if the number of
311 global Tx queues on the port is less than ``txqs_max_vec``.
313 Enabled by default on ConnectX-5 and Bluefield.
315 - ``rx_vec_en`` parameter [int]
317 A nonzero value enables Rx vector if the port is not configured in
318 multi-segment otherwise this parameter is ignored.
325 This driver relies on external libraries and kernel drivers for resources
326 allocations and initialization. The following dependencies are not part of
327 DPDK and must be installed separately:
331 User space Verbs framework used by librte_pmd_mlx5. This library provides
332 a generic interface between the kernel and low-level user space drivers
335 It allows slow and privileged operations (context initialization, hardware
336 resources allocations) to be managed by the kernel and fast operations to
337 never leave user space.
341 Low-level user space driver library for Mellanox
342 ConnectX-4/ConnectX-5/Bluefield devices, it is automatically loaded
345 This library basically implements send/receive calls to the hardware
350 They provide the kernel-side Verbs API and low level device drivers that
351 manage actual hardware initialization and resources sharing with user
354 Unlike most other PMDs, these modules must remain loaded and bound to
357 - mlx5_core: hardware driver managing Mellanox
358 ConnectX-4/ConnectX-5/Bluefield devices and related Ethernet kernel
360 - mlx5_ib: InifiniBand device driver.
361 - ib_uverbs: user space driver for Verbs (entry point for libibverbs).
363 - **Firmware update**
365 Mellanox OFED releases include firmware updates for
366 ConnectX-4/ConnectX-5/Bluefield adapters.
368 Because each release provides new features, these updates must be applied to
369 match the kernel modules and libraries they come with.
373 Both libraries are BSD and GPL licensed. Linux kernel modules are GPL
379 Either RDMA Core library with a recent enough Linux kernel release
380 (recommended) or Mellanox OFED, which provides compatibility with older
383 RMDA Core with Linux Kernel
384 ^^^^^^^^^^^^^^^^^^^^^^^^^^^
386 - Minimal kernel version : v4.14 or the most recent 4.14-rc (see `Linux installation documentation`_)
387 - Minimal rdma-core version: v15+ commit 0c5f5765213a ("Merge pull request #227 from yishaih/tm")
388 (see `RDMA Core installation documentation`_)
390 .. _`Linux installation documentation`: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable.git/plain/Documentation/admin-guide/README.rst
391 .. _`RDMA Core installation documentation`: https://raw.githubusercontent.com/linux-rdma/rdma-core/master/README.md
396 - Mellanox OFED version: **4.2**.
399 - ConnectX-4: **12.21.1000** and above.
400 - ConnectX-4 Lx: **14.21.1000** and above.
401 - ConnectX-5: **16.21.1000** and above.
402 - ConnectX-5 Ex: **16.21.1000** and above.
403 - Bluefield: **18.99.3950** and above.
405 While these libraries and kernel modules are available on OpenFabrics
406 Alliance's `website <https://www.openfabrics.org/>`__ and provided by package
407 managers on most distributions, this PMD requires Ethernet extensions that
408 may not be supported at the moment (this is a work in progress).
411 <http://www.mellanox.com/page/products_dyn?product_family=26&mtag=linux>`__
412 includes the necessary support and should be used in the meantime. For DPDK,
413 only libibverbs, libmlx5, mlnx-ofed-kernel packages and firmware updates are
414 required from that distribution.
418 Several versions of Mellanox OFED are available. Installing the version
419 this DPDK release was developed and tested against is strongly
420 recommended. Please check the `prerequisites`_.
425 * Mellanox(R) ConnectX(R)-4 10G MCX4111A-XCAT (1x10G)
426 * Mellanox(R) ConnectX(R)-4 10G MCX4121A-XCAT (2x10G)
427 * Mellanox(R) ConnectX(R)-4 25G MCX4111A-ACAT (1x25G)
428 * Mellanox(R) ConnectX(R)-4 25G MCX4121A-ACAT (2x25G)
429 * Mellanox(R) ConnectX(R)-4 40G MCX4131A-BCAT (1x40G)
430 * Mellanox(R) ConnectX(R)-4 40G MCX413A-BCAT (1x40G)
431 * Mellanox(R) ConnectX(R)-4 40G MCX415A-BCAT (1x40G)
432 * Mellanox(R) ConnectX(R)-4 50G MCX4131A-GCAT (1x50G)
433 * Mellanox(R) ConnectX(R)-4 50G MCX413A-GCAT (1x50G)
434 * Mellanox(R) ConnectX(R)-4 50G MCX414A-BCAT (2x50G)
435 * Mellanox(R) ConnectX(R)-4 50G MCX415A-GCAT (2x50G)
436 * Mellanox(R) ConnectX(R)-4 50G MCX416A-BCAT (2x50G)
437 * Mellanox(R) ConnectX(R)-4 50G MCX416A-GCAT (2x50G)
438 * Mellanox(R) ConnectX(R)-4 50G MCX415A-CCAT (1x100G)
439 * Mellanox(R) ConnectX(R)-4 100G MCX416A-CCAT (2x100G)
440 * Mellanox(R) ConnectX(R)-4 Lx 10G MCX4121A-XCAT (2x10G)
441 * Mellanox(R) ConnectX(R)-4 Lx 25G MCX4121A-ACAT (2x25G)
442 * Mellanox(R) ConnectX(R)-5 100G MCX556A-ECAT (2x100G)
443 * Mellanox(R) ConnectX(R)-5 Ex EN 100G MCX516A-CDAT (2x100G)
445 Quick Start Guide on OFED
446 -------------------------
448 1. Download latest Mellanox OFED. For more info check the `prerequisites`_.
451 2. Install the required libraries and kernel modules either by installing
452 only the required set, or by installing the entire Mellanox OFED:
454 .. code-block:: console
456 ./mlnxofedinstall --upstream-libs --dpdk
458 3. Verify the firmware is the correct one:
460 .. code-block:: console
464 4. Verify all ports links are set to Ethernet:
466 .. code-block:: console
468 mlxconfig -d <mst device> query | grep LINK_TYPE
472 Link types may have to be configured to Ethernet:
474 .. code-block:: console
476 mlxconfig -d <mst device> set LINK_TYPE_P1/2=1/2/3
478 * LINK_TYPE_P1=<1|2|3> , 1=Infiniband 2=Ethernet 3=VPI(auto-sense)
480 For hypervisors verify SR-IOV is enabled on the NIC:
482 .. code-block:: console
484 mlxconfig -d <mst device> query | grep SRIOV_EN
487 If needed, set enable the set the relevant fields:
489 .. code-block:: console
491 mlxconfig -d <mst device> set SRIOV_EN=1 NUM_OF_VFS=16
492 mlxfwreset -d <mst device> reset
494 5. Restart the driver:
496 .. code-block:: console
498 /etc/init.d/openibd restart
502 .. code-block:: console
504 service openibd restart
506 If link type was changed, firmware must be reset as well:
508 .. code-block:: console
510 mlxfwreset -d <mst device> reset
512 For hypervisors, after reset write the sysfs number of virtual functions
515 To dynamically instantiate a given number of virtual functions (VFs):
517 .. code-block:: console
519 echo [num_vfs] > /sys/class/infiniband/mlx5_0/device/sriov_numvfs
521 6. Compile DPDK and you are ready to go. See instructions on
522 :ref:`Development Kit Build System <Development_Kit_Build_System>`
527 1. Configure aggressive CQE Zipping for maximum performance:
529 .. code-block:: console
531 mlxconfig -d <mst device> s CQE_COMPRESSION=1
533 To set it back to the default CQE Zipping mode use:
535 .. code-block:: console
537 mlxconfig -d <mst device> s CQE_COMPRESSION=0
539 2. In case of virtualization:
541 - Make sure that hypervisor kernel is 3.16 or newer.
542 - Configure boot with ``iommu=pt``.
544 - Make sure to allocate a VM on huge pages.
545 - Make sure to set CPU pinning.
547 3. Use the CPU near local NUMA node to which the PCIe adapter is connected,
548 for better performance. For VMs, verify that the right CPU
549 and NUMA node are pinned according to the above. Run:
551 .. code-block:: console
555 to identify the NUMA node to which the PCIe adapter is connected.
557 4. If more than one adapter is used, and root complex capabilities allow
558 to put both adapters on the same NUMA node without PCI bandwidth degradation,
559 it is recommended to locate both adapters on the same NUMA node.
560 This in order to forward packets from one to the other without
561 NUMA performance penalty.
563 5. Disable pause frames:
565 .. code-block:: console
567 ethtool -A <netdev> rx off tx off
569 6. Verify IO non-posted prefetch is disabled by default. This can be checked
570 via the BIOS configuration. Please contact you server provider for more
571 information about the settings.
575 On some machines, depends on the machine integrator, it is beneficial
576 to set the PCI max read request parameter to 1K. This can be
577 done in the following way:
579 To query the read request size use:
581 .. code-block:: console
583 setpci -s <NIC PCI address> 68.w
585 If the output is different than 3XXX, set it by:
587 .. code-block:: console
589 setpci -s <NIC PCI address> 68.w=3XXX
591 The XXX can be different on different systems. Make sure to configure
592 according to the setpci output.
597 Compared to librte_pmd_mlx4 that implements a single RSS configuration per
598 port, librte_pmd_mlx5 supports per-protocol RSS configuration.
600 Since ``testpmd`` defaults to IP RSS mode and there is currently no
601 command-line parameter to enable additional protocols (UDP and TCP as well
602 as IP), the following commands must be entered from its CLI to get the same
603 behavior as librte_pmd_mlx4:
605 .. code-block:: console
608 > port config all rss all
614 This section demonstrates how to launch **testpmd** with Mellanox
615 ConnectX-4/ConnectX-5/Bluefield devices managed by librte_pmd_mlx5.
617 #. Load the kernel modules:
619 .. code-block:: console
621 modprobe -a ib_uverbs mlx5_core mlx5_ib
623 Alternatively if MLNX_OFED is fully installed, the following script can
626 .. code-block:: console
628 /etc/init.d/openibd restart
632 User space I/O kernel modules (uio and igb_uio) are not used and do
633 not have to be loaded.
635 #. Make sure Ethernet interfaces are in working order and linked to kernel
636 verbs. Related sysfs entries should be present:
638 .. code-block:: console
640 ls -d /sys/class/net/*/device/infiniband_verbs/uverbs* | cut -d / -f 5
644 .. code-block:: console
651 #. Optionally, retrieve their PCI bus addresses for whitelisting:
653 .. code-block:: console
656 for intf in eth2 eth3 eth4 eth5;
658 (cd "/sys/class/net/${intf}/device/" && pwd -P);
661 sed -n 's,.*/\(.*\),-w \1,p'
665 .. code-block:: console
672 #. Request huge pages:
674 .. code-block:: console
676 echo 1024 > /sys/kernel/mm/hugepages/hugepages-2048kB/nr_hugepages/nr_hugepages
678 #. Start testpmd with basic parameters:
680 .. code-block:: console
682 testpmd -l 8-15 -n 4 -w 05:00.0 -w 05:00.1 -w 06:00.0 -w 06:00.1 -- --rxq=2 --txq=2 -i
686 .. code-block:: console
689 EAL: PCI device 0000:05:00.0 on NUMA socket 0
690 EAL: probe driver: 15b3:1013 librte_pmd_mlx5
691 PMD: librte_pmd_mlx5: PCI information matches, using device "mlx5_0" (VF: false)
692 PMD: librte_pmd_mlx5: 1 port(s) detected
693 PMD: librte_pmd_mlx5: port 1 MAC address is e4:1d:2d:e7:0c:fe
694 EAL: PCI device 0000:05:00.1 on NUMA socket 0
695 EAL: probe driver: 15b3:1013 librte_pmd_mlx5
696 PMD: librte_pmd_mlx5: PCI information matches, using device "mlx5_1" (VF: false)
697 PMD: librte_pmd_mlx5: 1 port(s) detected
698 PMD: librte_pmd_mlx5: port 1 MAC address is e4:1d:2d:e7:0c:ff
699 EAL: PCI device 0000:06:00.0 on NUMA socket 0
700 EAL: probe driver: 15b3:1013 librte_pmd_mlx5
701 PMD: librte_pmd_mlx5: PCI information matches, using device "mlx5_2" (VF: false)
702 PMD: librte_pmd_mlx5: 1 port(s) detected
703 PMD: librte_pmd_mlx5: port 1 MAC address is e4:1d:2d:e7:0c:fa
704 EAL: PCI device 0000:06:00.1 on NUMA socket 0
705 EAL: probe driver: 15b3:1013 librte_pmd_mlx5
706 PMD: librte_pmd_mlx5: PCI information matches, using device "mlx5_3" (VF: false)
707 PMD: librte_pmd_mlx5: 1 port(s) detected
708 PMD: librte_pmd_mlx5: port 1 MAC address is e4:1d:2d:e7:0c:fb
709 Interactive-mode selected
710 Configuring Port 0 (socket 0)
711 PMD: librte_pmd_mlx5: 0x8cba80: TX queues number update: 0 -> 2
712 PMD: librte_pmd_mlx5: 0x8cba80: RX queues number update: 0 -> 2
713 Port 0: E4:1D:2D:E7:0C:FE
714 Configuring Port 1 (socket 0)
715 PMD: librte_pmd_mlx5: 0x8ccac8: TX queues number update: 0 -> 2
716 PMD: librte_pmd_mlx5: 0x8ccac8: RX queues number update: 0 -> 2
717 Port 1: E4:1D:2D:E7:0C:FF
718 Configuring Port 2 (socket 0)
719 PMD: librte_pmd_mlx5: 0x8cdb10: TX queues number update: 0 -> 2
720 PMD: librte_pmd_mlx5: 0x8cdb10: RX queues number update: 0 -> 2
721 Port 2: E4:1D:2D:E7:0C:FA
722 Configuring Port 3 (socket 0)
723 PMD: librte_pmd_mlx5: 0x8ceb58: TX queues number update: 0 -> 2
724 PMD: librte_pmd_mlx5: 0x8ceb58: RX queues number update: 0 -> 2
725 Port 3: E4:1D:2D:E7:0C:FB
726 Checking link statuses...
727 Port 0 Link Up - speed 40000 Mbps - full-duplex
728 Port 1 Link Up - speed 40000 Mbps - full-duplex
729 Port 2 Link Up - speed 10000 Mbps - full-duplex
730 Port 3 Link Up - speed 10000 Mbps - full-duplex