drivers/bus/dpaa/base/qbman/qman_driver.c

   1 /*-
   2  * This file is provided under a dual BSD/GPLv2 license. When using or
   3  * redistributing this file, you may do so under either license.
   4  *
   5  *   BSD LICENSE
   6  *
   7  * Copyright 2008-2016 Freescale Semiconductor Inc.
   8  * Copyright 2017 NXP.
   9  *
  10  * Redistribution and use in source and binary forms, with or without
  11  * modification, are permitted provided that the following conditions are met:
  12  * * Redistributions of source code must retain the above copyright
  13  * notice, this list of conditions and the following disclaimer.
  14  * * Redistributions in binary form must reproduce the above copyright
  15  * notice, this list of conditions and the following disclaimer in the
  16  * documentation and/or other materials provided with the distribution.
  17  * * Neither the name of the above-listed copyright holders nor the
  18  * names of any contributors may be used to endorse or promote products
  19  * derived from this software without specific prior written permission.
  20  *
  21  *   GPL LICENSE SUMMARY
  22  *
  23  * ALTERNATIVELY, this software may be distributed under the terms of the
  24  * GNU General Public License ("GPL") as published by the Free Software
  25  * Foundation, either version 2 of that License or (at your option) any
  26  * later version.
  27  *
  28  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  29  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  30  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  31  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
  32  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  33  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  34  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  35  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  36  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  37  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  38  * POSSIBILITY OF SUCH DAMAGE.
  39  */
  40
  41 #include <fsl_usd.h>
  42 #include <process.h>
  43 #include "qman_priv.h"
  44 #include <sys/ioctl.h>
  45 #include <rte_branch_prediction.h>
  46
  47 /* Global variable containing revision id (even on non-control plane systems
  48  * where CCSR isn't available).
  49  */
  50 u16 qman_ip_rev;
  51 u16 qm_channel_pool1 = QMAN_CHANNEL_POOL1;
  52 u16 qm_channel_caam = QMAN_CHANNEL_CAAM;
  53 u16 qm_channel_pme = QMAN_CHANNEL_PME;
  54
  55 /* Ccsr map address to access ccsrbased register */
  56 void *qman_ccsr_map;
  57 /* The qman clock frequency */
  58 u32 qman_clk;
  59
  60 static __thread int fd = -1;
  61 static __thread struct qm_portal_config pcfg;
  62 static __thread struct dpaa_ioctl_portal_map map = {
  63         .type = dpaa_portal_qman
  64 };
  65
  66 static int fsl_qman_portal_init(uint32_t index, int is_shared)
  67 {
  68         cpu_set_t cpuset;
  69         struct qman_portal *portal;
  70         int loop, ret;
  71         struct dpaa_ioctl_irq_map irq_map;
  72
  73         /* Verify the thread's cpu-affinity */
  74         ret = pthread_getaffinity_np(pthread_self(), sizeof(cpu_set_t),
  75                                      &cpuset);
  76         if (ret) {
  77                 error(0, ret, "pthread_getaffinity_np()");
  78                 return ret;
  79         }
  80         pcfg.cpu = -1;
  81         for (loop = 0; loop < CPU_SETSIZE; loop++)
  82                 if (CPU_ISSET(loop, &cpuset)) {
  83                         if (pcfg.cpu != -1) {
  84                                 pr_err("Thread is not affine to 1 cpu\n");
  85                                 return -EINVAL;
  86                         }
  87                         pcfg.cpu = loop;
  88                 }
  89         if (pcfg.cpu == -1) {
  90                 pr_err("Bug in getaffinity handling!\n");
  91                 return -EINVAL;
  92         }
  93
  94         /* Allocate and map a qman portal */
  95         map.index = index;
  96         ret = process_portal_map(&map);
  97         if (ret) {
  98                 error(0, ret, "process_portal_map()");
  99                 return ret;
 100         }
 101         pcfg.channel = map.channel;
 102         pcfg.pools = map.pools;
 103         pcfg.index = map.index;
 104
 105         /* Make the portal's cache-[enabled|inhibited] regions */
 106         pcfg.addr_virt[DPAA_PORTAL_CE] = map.addr.cena;
 107         pcfg.addr_virt[DPAA_PORTAL_CI] = map.addr.cinh;
 108
 109         fd = open(QMAN_PORTAL_IRQ_PATH, O_RDONLY);
 110         if (fd == -1) {
 111                 pr_err("QMan irq init failed\n");
 112                 process_portal_unmap(&map.addr);
 113                 return -EBUSY;
 114         }
 115
 116         pcfg.is_shared = is_shared;
 117         pcfg.node = NULL;
 118         pcfg.irq = fd;
 119
 120         portal = qman_create_affine_portal(&pcfg, NULL);
 121         if (!portal) {
 122                 pr_err("Qman portal initialisation failed (%d)\n",
 123                        pcfg.cpu);
 124                 process_portal_unmap(&map.addr);
 125                 return -EBUSY;
 126         }
 127
 128         irq_map.type = dpaa_portal_qman;
 129         irq_map.portal_cinh = map.addr.cinh;
 130         process_portal_irq_map(fd, &irq_map);
 131         return 0;
 132 }
 133
 134 static int fsl_qman_portal_finish(void)
 135 {
 136         __maybe_unused const struct qm_portal_config *cfg;
 137         int ret;
 138
 139         process_portal_irq_unmap(fd);
 140
 141         cfg = qman_destroy_affine_portal();
 142         DPAA_BUG_ON(cfg != &pcfg);
 143         ret = process_portal_unmap(&map.addr);
 144         if (ret)
 145                 error(0, ret, "process_portal_unmap()");
 146         return ret;
 147 }
 148
 149 int qman_thread_init(void)
 150 {
 151         /* Convert from contiguous/virtual cpu numbering to real cpu when
 152          * calling into the code that is dependent on the device naming.
 153          */
 154         return fsl_qman_portal_init(QBMAN_ANY_PORTAL_IDX, 0);
 155 }
 156
 157 int qman_thread_finish(void)
 158 {
 159         return fsl_qman_portal_finish();
 160 }
 161
 162 void qman_thread_irq(void)
 163 {
 164         qbman_invoke_irq(pcfg.irq);
 165
 166         /* Now we need to uninhibit interrupts. This is the only code outside
 167          * the regular portal driver that manipulates any portal register, so
 168          * rather than breaking that encapsulation I am simply hard-coding the
 169          * offset to the inhibit register here.
 170          */
 171         out_be32(pcfg.addr_virt[DPAA_PORTAL_CI] + 0xe0c, 0);
 172 }
 173
 174 int qman_global_init(void)
 175 {
 176         const struct device_node *dt_node;
 177         int ret = 0;
 178         size_t lenp;
 179         const u32 *chanid;
 180         static int ccsr_map_fd;
 181         const uint32_t *qman_addr;
 182         uint64_t phys_addr;
 183         uint64_t regs_size;
 184         const u32 *clk;
 185
 186         static int done;
 187
 188         if (done)
 189                 return -EBUSY;
 190
 191         /* Use the device-tree to determine IP revision until something better
 192          * is devised.
 193          */
 194         dt_node = of_find_compatible_node(NULL, NULL, "fsl,qman-portal");
 195         if (!dt_node) {
 196                 pr_err("No qman portals available for any CPU\n");
 197                 return -ENODEV;
 198         }
 199         if (of_device_is_compatible(dt_node, "fsl,qman-portal-1.0") ||
 200             of_device_is_compatible(dt_node, "fsl,qman-portal-1.0.0"))
 201                 pr_err("QMan rev1.0 on P4080 rev1 is not supported!\n");
 202         else if (of_device_is_compatible(dt_node, "fsl,qman-portal-1.1") ||
 203                  of_device_is_compatible(dt_node, "fsl,qman-portal-1.1.0"))
 204                 qman_ip_rev = QMAN_REV11;
 205         else if (of_device_is_compatible(dt_node, "fsl,qman-portal-1.2") ||
 206                  of_device_is_compatible(dt_node, "fsl,qman-portal-1.2.0"))
 207                 qman_ip_rev = QMAN_REV12;
 208         else if (of_device_is_compatible(dt_node, "fsl,qman-portal-2.0") ||
 209                  of_device_is_compatible(dt_node, "fsl,qman-portal-2.0.0"))
 210                 qman_ip_rev = QMAN_REV20;
 211         else if (of_device_is_compatible(dt_node, "fsl,qman-portal-3.0.0") ||
 212                  of_device_is_compatible(dt_node, "fsl,qman-portal-3.0.1"))
 213                 qman_ip_rev = QMAN_REV30;
 214         else if (of_device_is_compatible(dt_node, "fsl,qman-portal-3.1.0") ||
 215                  of_device_is_compatible(dt_node, "fsl,qman-portal-3.1.1") ||
 216                 of_device_is_compatible(dt_node, "fsl,qman-portal-3.1.2") ||
 217                 of_device_is_compatible(dt_node, "fsl,qman-portal-3.1.3"))
 218                 qman_ip_rev = QMAN_REV31;
 219         else if (of_device_is_compatible(dt_node, "fsl,qman-portal-3.2.0") ||
 220                  of_device_is_compatible(dt_node, "fsl,qman-portal-3.2.1"))
 221                 qman_ip_rev = QMAN_REV32;
 222         else
 223                 qman_ip_rev = QMAN_REV11;
 224
 225         if (!qman_ip_rev) {
 226                 pr_err("Unknown qman portal version\n");
 227                 return -ENODEV;
 228         }
 229         if ((qman_ip_rev & 0xFF00) >= QMAN_REV30) {
 230                 qm_channel_pool1 = QMAN_CHANNEL_POOL1_REV3;
 231                 qm_channel_caam = QMAN_CHANNEL_CAAM_REV3;
 232                 qm_channel_pme = QMAN_CHANNEL_PME_REV3;
 233         }
 234
 235         dt_node = of_find_compatible_node(NULL, NULL, "fsl,pool-channel-range");
 236         if (!dt_node) {
 237                 pr_err("No qman pool channel range available\n");
 238                 return -ENODEV;
 239         }
 240         chanid = of_get_property(dt_node, "fsl,pool-channel-range", &lenp);
 241         if (!chanid) {
 242                 pr_err("Can not get pool-channel-range property\n");
 243                 return -EINVAL;
 244         }
 245
 246         /* get ccsr base */
 247         dt_node = of_find_compatible_node(NULL, NULL, "fsl,qman");
 248         if (!dt_node) {
 249                 pr_err("No qman device node available\n");
 250                 return -ENODEV;
 251         }
 252         qman_addr = of_get_address(dt_node, 0, &regs_size, NULL);
 253         if (!qman_addr) {
 254                 pr_err("of_get_address cannot return qman address\n");
 255                 return -EINVAL;
 256         }
 257         phys_addr = of_translate_address(dt_node, qman_addr);
 258         if (!phys_addr) {
 259                 pr_err("of_translate_address failed\n");
 260                 return -EINVAL;
 261         }
 262
 263         ccsr_map_fd = open("/dev/mem", O_RDWR);
 264         if (unlikely(ccsr_map_fd < 0)) {
 265                 pr_err("Can not open /dev/mem for qman ccsr map\n");
 266                 return ccsr_map_fd;
 267         }
 268
 269         qman_ccsr_map = mmap(NULL, regs_size, PROT_READ | PROT_WRITE,
 270                              MAP_SHARED, ccsr_map_fd, phys_addr);
 271         if (qman_ccsr_map == MAP_FAILED) {
 272                 pr_err("Can not map qman ccsr base\n");
 273                 return -EINVAL;
 274         }
 275
 276         clk = of_get_property(dt_node, "clock-frequency", NULL);
 277         if (!clk)
 278                 pr_warn("Can't find Qman clock frequency\n");
 279         else
 280                 qman_clk = be32_to_cpu(*clk);
 281
 282 #ifdef CONFIG_FSL_QMAN_FQ_LOOKUP
 283         ret = qman_setup_fq_lookup_table(CONFIG_FSL_QMAN_FQ_LOOKUP_MAX);
 284         if (ret)
 285                 return ret;
 286 #endif
 287         return 0;
 288 }