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7 * Copyright 2011 Freescale Semiconductor, Inc.
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56 #include <linux/types.h>
60 #include <sys/types.h>
70 #include <rte_byteorder.h>
71 #include <rte_atomic.h>
72 #include <rte_spinlock.h>
73 #include <rte_common.h>
74 #include <rte_debug.h>
76 /* The following definitions are primarily to allow the single-source driver
77 * interfaces to be included by arbitrary program code. Ie. for interfaces that
78 * are also available in kernel-space, these definitions provide compatibility
79 * with certain attributes and types used in those interfaces.
82 /* Required compiler attributes */
83 #ifndef __maybe_unused
84 #define __maybe_unused __rte_unused
86 #ifndef __always_unused
87 #define __always_unused __rte_unused
90 #define __packed __rte_packed
92 #define noinline __attribute__((noinline))
94 #define L1_CACHE_BYTES 64
95 #define ____cacheline_aligned __attribute__((aligned(L1_CACHE_BYTES)))
96 #define __stringify_1(x) #x
97 #define __stringify(x) __stringify_1(x)
102 #define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0]))
105 #define prflush(fmt, args...) \
107 printf(fmt, ##args); \
111 #define pr_crit(fmt, args...) prflush("CRIT:" fmt, ##args)
112 #define pr_err(fmt, args...) prflush("ERR:" fmt, ##args)
113 #define pr_warn(fmt, args...) prflush("WARN:" fmt, ##args)
114 #define pr_info(fmt, args...) prflush(fmt, ##args)
116 #ifdef RTE_LIBRTE_DPAA_DEBUG_BUS
120 #define pr_debug(fmt, args...) printf(fmt, ##args)
122 #define pr_debug(fmt, args...) {}
125 #define DPAA_BUG_ON(x) RTE_ASSERT(x)
129 typedef uint16_t u16;
130 typedef uint32_t u32;
131 typedef uint64_t u64;
132 typedef uint64_t dma_addr_t;
133 typedef cpu_set_t cpumask_t;
134 typedef uint32_t phandle;
135 typedef uint32_t gfp_t;
136 typedef uint32_t irqreturn_t;
138 #define IRQ_HANDLED 0
139 #define request_irq qbman_request_irq
140 #define free_irq qbman_free_irq
144 #define __raw_readb(p) (*(const volatile unsigned char *)(p))
145 #define __raw_readl(p) (*(const volatile unsigned int *)(p))
146 #define __raw_writel(v, p) {*(volatile unsigned int *)(p) = (v); }
148 /* to be used as an upper-limit only */
151 /* Waitqueue stuff */
152 typedef struct { } wait_queue_head_t;
153 #define DECLARE_WAIT_QUEUE_HEAD(x) int dummy_##x __always_unused
154 #define wake_up(x) do { } while (0)
157 static inline u32 in_be32(volatile void *__p)
159 volatile u32 *p = __p;
160 return rte_be_to_cpu_32(*p);
163 static inline void out_be32(volatile void *__p, u32 val)
165 volatile u32 *p = __p;
166 *p = rte_cpu_to_be_32(val);
169 #define dcbt_ro(p) __builtin_prefetch(p, 0)
170 #define dcbt_rw(p) __builtin_prefetch(p, 1)
172 #define dcbz(p) { asm volatile("dc zva, %0" : : "r" (p) : "memory"); }
173 #define dcbz_64(p) dcbz(p)
174 #define hwsync() rte_rmb()
175 #define lwsync() rte_wmb()
176 #define dcbf(p) { asm volatile("dc cvac, %0" : : "r"(p) : "memory"); }
177 #define dcbf_64(p) dcbf(p)
178 #define dccivac(p) { asm volatile("dc civac, %0" : : "r"(p) : "memory"); }
180 #define dcbit_ro(p) \
183 asm volatile("prfm pldl1keep, [%0, #64]" : : "r" (p)); \
186 #define barrier() { asm volatile ("" : : : "memory"); }
187 #define cpu_relax barrier
189 static inline uint64_t mfatb(void)
191 uint64_t ret, ret_new, timeout = 200;
193 asm volatile ("mrs %0, cntvct_el0" : "=r" (ret));
194 asm volatile ("mrs %0, cntvct_el0" : "=r" (ret_new));
195 while (ret != ret_new && timeout--) {
197 asm volatile ("mrs %0, cntvct_el0" : "=r" (ret_new));
199 DPAA_BUG_ON(!timeout && (ret != ret_new));
203 /* Spin for a few cycles without bothering the bus */
204 static inline void cpu_spin(int cycles)
206 uint64_t now = mfatb();
208 while (mfatb() < (now + cycles))
212 /* Qman/Bman API inlines and macros; */
216 #define lower_32_bits(x) ((u32)(x))
221 #define upper_32_bits(x) ((u32)(((x) >> 16) >> 16))
224 * Swap bytes of a 48-bit value.
226 static inline uint64_t
227 __bswap_48(uint64_t x)
229 return ((x & 0x0000000000ffULL) << 40) |
230 ((x & 0x00000000ff00ULL) << 24) |
231 ((x & 0x000000ff0000ULL) << 8) |
232 ((x & 0x0000ff000000ULL) >> 8) |
233 ((x & 0x00ff00000000ULL) >> 24) |
234 ((x & 0xff0000000000ULL) >> 40);
238 * Swap bytes of a 40-bit value.
240 static inline uint64_t
241 __bswap_40(uint64_t x)
243 return ((x & 0x00000000ffULL) << 32) |
244 ((x & 0x000000ff00ULL) << 16) |
245 ((x & 0x0000ff0000ULL)) |
246 ((x & 0x00ff000000ULL) >> 16) |
247 ((x & 0xff00000000ULL) >> 32);
251 * Swap bytes of a 24-bit value.
253 static inline uint32_t
254 __bswap_24(uint32_t x)
256 return ((x & 0x0000ffULL) << 16) |
257 ((x & 0x00ff00ULL)) |
258 ((x & 0xff0000ULL) >> 16);
261 #define be64_to_cpu(x) rte_be_to_cpu_64(x)
262 #define be32_to_cpu(x) rte_be_to_cpu_32(x)
263 #define be16_to_cpu(x) rte_be_to_cpu_16(x)
265 #define cpu_to_be64(x) rte_cpu_to_be_64(x)
266 #define cpu_to_be32(x) rte_cpu_to_be_32(x)
267 #define cpu_to_be16(x) rte_cpu_to_be_16(x)
269 #if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
271 #define cpu_to_be48(x) __bswap_48(x)
272 #define be48_to_cpu(x) __bswap_48(x)
274 #define cpu_to_be40(x) __bswap_40(x)
275 #define be40_to_cpu(x) __bswap_40(x)
277 #define cpu_to_be24(x) __bswap_24(x)
278 #define be24_to_cpu(x) __bswap_24(x)
280 #else /* RTE_BIG_ENDIAN */
282 #define cpu_to_be48(x) (x)
283 #define be48_to_cpu(x) (x)
285 #define cpu_to_be40(x) (x)
286 #define be40_to_cpu(x) (x)
288 #define cpu_to_be24(x) (x)
289 #define be24_to_cpu(x) (x)
291 #endif /* RTE_BIG_ENDIAN */
293 /* When copying aligned words or shorts, try to avoid memcpy() */
294 /* memcpy() stuff - when you know alignments in advance */
295 #define CONFIG_TRY_BETTER_MEMCPY
297 #ifdef CONFIG_TRY_BETTER_MEMCPY
298 static inline void copy_words(void *dest, const void *src, size_t sz)
301 const u32 *__src = src;
302 size_t __sz = sz >> 2;
304 DPAA_BUG_ON((unsigned long)dest & 0x3);
305 DPAA_BUG_ON((unsigned long)src & 0x3);
306 DPAA_BUG_ON(sz & 0x3);
308 *(__dest++) = *(__src++);
311 static inline void copy_shorts(void *dest, const void *src, size_t sz)
314 const u16 *__src = src;
315 size_t __sz = sz >> 1;
317 DPAA_BUG_ON((unsigned long)dest & 0x1);
318 DPAA_BUG_ON((unsigned long)src & 0x1);
319 DPAA_BUG_ON(sz & 0x1);
321 *(__dest++) = *(__src++);
324 static inline void copy_bytes(void *dest, const void *src, size_t sz)
327 const u8 *__src = src;
330 *(__dest++) = *(__src++);
333 #define copy_words memcpy
334 #define copy_shorts memcpy
335 #define copy_bytes memcpy
338 /* Allocator stuff */
339 #define kmalloc(sz, t) malloc(sz)
340 #define vmalloc(sz) malloc(sz)
341 #define kfree(p) { if (p) free(p); }
342 static inline void *kzalloc(size_t sz, gfp_t __foo __rte_unused)
344 void *ptr = malloc(sz);
351 static inline unsigned long get_zeroed_page(gfp_t __foo __rte_unused)
355 if (posix_memalign(&p, 4096, 4096))
358 return (unsigned long)p;
362 #define spinlock_t rte_spinlock_t
363 #define __SPIN_LOCK_UNLOCKED(x) RTE_SPINLOCK_INITIALIZER
364 #define DEFINE_SPINLOCK(x) spinlock_t x = __SPIN_LOCK_UNLOCKED(x)
365 #define spin_lock_init(x) rte_spinlock_init(x)
366 #define spin_lock_destroy(x)
367 #define spin_lock(x) rte_spinlock_lock(x)
368 #define spin_unlock(x) rte_spinlock_unlock(x)
369 #define spin_lock_irq(x) spin_lock(x)
370 #define spin_unlock_irq(x) spin_unlock(x)
371 #define spin_lock_irqsave(x, f) spin_lock_irq(x)
372 #define spin_unlock_irqrestore(x, f) spin_unlock_irq(x)
374 #define atomic_t rte_atomic32_t
375 #define atomic_read(v) rte_atomic32_read(v)
376 #define atomic_set(v, i) rte_atomic32_set(v, i)
378 #define atomic_inc(v) rte_atomic32_add(v, 1)
379 #define atomic_dec(v) rte_atomic32_sub(v, 1)
381 #define atomic_inc_and_test(v) rte_atomic32_inc_and_test(v)
382 #define atomic_dec_and_test(v) rte_atomic32_dec_and_test(v)
384 #define atomic_inc_return(v) rte_atomic32_add_return(v, 1)
385 #define atomic_dec_return(v) rte_atomic32_sub_return(v, 1)
386 #define atomic_sub_and_test(i, v) (rte_atomic32_sub_return(v, i) == 0)
388 #include <dpaa_list.h>
389 #include <dpaa_bits.h>
391 #endif /* __COMPAT_H */