New upstream version 17.11-rc3
[deb_dpdk.git] / drivers / crypto / aesni_gcm / aesni_gcm_pmd.c
1 /*-
2  *   BSD LICENSE
3  *
4  *   Copyright(c) 2016-2017 Intel Corporation. All rights reserved.
5  *
6  *   Redistribution and use in source and binary forms, with or without
7  *   modification, are permitted provided that the following conditions
8  *   are met:
9  *
10  *     * Redistributions of source code must retain the above copyright
11  *       notice, this list of conditions and the following disclaimer.
12  *     * Redistributions in binary form must reproduce the above copyright
13  *       notice, this list of conditions and the following disclaimer in
14  *       the documentation and/or other materials provided with the
15  *       distribution.
16  *     * Neither the name of Intel Corporation nor the names of its
17  *       contributors may be used to endorse or promote products derived
18  *       from this software without specific prior written permission.
19  *
20  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
21  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
23  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
24  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
25  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
26  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
30  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31  */
32
33 #include <rte_common.h>
34 #include <rte_hexdump.h>
35 #include <rte_cryptodev.h>
36 #include <rte_cryptodev_pmd.h>
37 #include <rte_bus_vdev.h>
38 #include <rte_malloc.h>
39 #include <rte_cpuflags.h>
40 #include <rte_byteorder.h>
41
42 #include "aesni_gcm_pmd_private.h"
43
44 static uint8_t cryptodev_driver_id;
45
46 /** Parse crypto xform chain and set private session parameters */
47 int
48 aesni_gcm_set_session_parameters(const struct aesni_gcm_ops *gcm_ops,
49                 struct aesni_gcm_session *sess,
50                 const struct rte_crypto_sym_xform *xform)
51 {
52         const struct rte_crypto_sym_xform *auth_xform;
53         const struct rte_crypto_sym_xform *aead_xform;
54         uint16_t digest_length;
55         uint8_t key_length;
56         uint8_t *key;
57
58         /* AES-GMAC */
59         if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH) {
60                 auth_xform = xform;
61                 if (auth_xform->auth.algo != RTE_CRYPTO_AUTH_AES_GMAC) {
62                         GCM_LOG_ERR("Only AES GMAC is supported as an "
63                                         "authentication only algorithm");
64                         return -ENOTSUP;
65                 }
66                 /* Set IV parameters */
67                 sess->iv.offset = auth_xform->auth.iv.offset;
68                 sess->iv.length = auth_xform->auth.iv.length;
69
70                 /* Select Crypto operation */
71                 if (auth_xform->auth.op == RTE_CRYPTO_AUTH_OP_GENERATE)
72                         sess->op = AESNI_GMAC_OP_GENERATE;
73                 else
74                         sess->op = AESNI_GMAC_OP_VERIFY;
75
76                 key_length = auth_xform->auth.key.length;
77                 key = auth_xform->auth.key.data;
78                 digest_length = auth_xform->auth.digest_length;
79
80         /* AES-GCM */
81         } else if (xform->type == RTE_CRYPTO_SYM_XFORM_AEAD) {
82                 aead_xform = xform;
83
84                 if (aead_xform->aead.algo != RTE_CRYPTO_AEAD_AES_GCM) {
85                         GCM_LOG_ERR("The only combined operation "
86                                                 "supported is AES GCM");
87                         return -ENOTSUP;
88                 }
89
90                 /* Set IV parameters */
91                 sess->iv.offset = aead_xform->aead.iv.offset;
92                 sess->iv.length = aead_xform->aead.iv.length;
93
94                 /* Select Crypto operation */
95                 if (aead_xform->aead.op == RTE_CRYPTO_AEAD_OP_ENCRYPT)
96                         sess->op = AESNI_GCM_OP_AUTHENTICATED_ENCRYPTION;
97                 else
98                         sess->op = AESNI_GCM_OP_AUTHENTICATED_DECRYPTION;
99
100                 key_length = aead_xform->aead.key.length;
101                 key = aead_xform->aead.key.data;
102
103                 sess->aad_length = aead_xform->aead.aad_length;
104                 digest_length = aead_xform->aead.digest_length;
105         } else {
106                 GCM_LOG_ERR("Wrong xform type, has to be AEAD or authentication");
107                 return -ENOTSUP;
108         }
109
110
111         /* IV check */
112         if (sess->iv.length != 16 && sess->iv.length != 12 &&
113                         sess->iv.length != 0) {
114                 GCM_LOG_ERR("Wrong IV length");
115                 return -EINVAL;
116         }
117
118         /* Check key length and calculate GCM pre-compute. */
119         switch (key_length) {
120         case 16:
121                 sess->key = AESNI_GCM_KEY_128;
122                 break;
123         case 24:
124                 sess->key = AESNI_GCM_KEY_192;
125                 break;
126         case 32:
127                 sess->key = AESNI_GCM_KEY_256;
128                 break;
129         default:
130                 GCM_LOG_ERR("Invalid key length");
131                 return -EINVAL;
132         }
133
134         gcm_ops[sess->key].precomp(key, &sess->gdata_key);
135
136         /* Digest check */
137         if (digest_length != 16 &&
138                         digest_length != 12 &&
139                         digest_length != 8) {
140                 GCM_LOG_ERR("digest");
141                 return -EINVAL;
142         }
143         sess->digest_length = digest_length;
144
145         return 0;
146 }
147
148 /** Get gcm session */
149 static struct aesni_gcm_session *
150 aesni_gcm_get_session(struct aesni_gcm_qp *qp, struct rte_crypto_op *op)
151 {
152         struct aesni_gcm_session *sess = NULL;
153         struct rte_crypto_sym_op *sym_op = op->sym;
154
155         if (op->sess_type == RTE_CRYPTO_OP_WITH_SESSION) {
156                 if (likely(sym_op->session != NULL))
157                         sess = (struct aesni_gcm_session *)
158                                         get_session_private_data(
159                                         sym_op->session,
160                                         cryptodev_driver_id);
161         } else  {
162                 void *_sess;
163                 void *_sess_private_data = NULL;
164
165                 if (rte_mempool_get(qp->sess_mp, (void **)&_sess))
166                         return NULL;
167
168                 if (rte_mempool_get(qp->sess_mp, (void **)&_sess_private_data))
169                         return NULL;
170
171                 sess = (struct aesni_gcm_session *)_sess_private_data;
172
173                 if (unlikely(aesni_gcm_set_session_parameters(qp->ops,
174                                 sess, sym_op->xform) != 0)) {
175                         rte_mempool_put(qp->sess_mp, _sess);
176                         rte_mempool_put(qp->sess_mp, _sess_private_data);
177                         sess = NULL;
178                 }
179                 sym_op->session = (struct rte_cryptodev_sym_session *)_sess;
180                 set_session_private_data(sym_op->session, cryptodev_driver_id,
181                         _sess_private_data);
182         }
183
184         if (unlikely(sess == NULL))
185                 op->status = RTE_CRYPTO_OP_STATUS_INVALID_SESSION;
186
187         return sess;
188 }
189
190 /**
191  * Process a crypto operation, calling
192  * the GCM API from the multi buffer library.
193  *
194  * @param       qp              queue pair
195  * @param       op              symmetric crypto operation
196  * @param       session         GCM session
197  *
198  * @return
199  *
200  */
201 static int
202 process_gcm_crypto_op(struct aesni_gcm_qp *qp, struct rte_crypto_op *op,
203                 struct aesni_gcm_session *session)
204 {
205         uint8_t *src, *dst;
206         uint8_t *iv_ptr;
207         struct rte_crypto_sym_op *sym_op = op->sym;
208         struct rte_mbuf *m_src = sym_op->m_src;
209         uint32_t offset, data_offset, data_length;
210         uint32_t part_len, total_len, data_len;
211
212         if (session->op == AESNI_GCM_OP_AUTHENTICATED_ENCRYPTION ||
213                         session->op == AESNI_GCM_OP_AUTHENTICATED_DECRYPTION) {
214                 offset = sym_op->aead.data.offset;
215                 data_offset = offset;
216                 data_length = sym_op->aead.data.length;
217         } else {
218                 offset = sym_op->auth.data.offset;
219                 data_offset = offset;
220                 data_length = sym_op->auth.data.length;
221         }
222
223         RTE_ASSERT(m_src != NULL);
224
225         while (offset >= m_src->data_len && data_length != 0) {
226                 offset -= m_src->data_len;
227                 m_src = m_src->next;
228
229                 RTE_ASSERT(m_src != NULL);
230         }
231
232         data_len = m_src->data_len - offset;
233         part_len = (data_len < data_length) ? data_len :
234                         data_length;
235
236         /* Destination buffer is required when segmented source buffer */
237         RTE_ASSERT((part_len == data_length) ||
238                         ((part_len != data_length) &&
239                                         (sym_op->m_dst != NULL)));
240         /* Segmented destination buffer is not supported */
241         RTE_ASSERT((sym_op->m_dst == NULL) ||
242                         ((sym_op->m_dst != NULL) &&
243                                         rte_pktmbuf_is_contiguous(sym_op->m_dst)));
244
245
246         dst = sym_op->m_dst ?
247                         rte_pktmbuf_mtod_offset(sym_op->m_dst, uint8_t *,
248                                         data_offset) :
249                         rte_pktmbuf_mtod_offset(sym_op->m_src, uint8_t *,
250                                         data_offset);
251
252         src = rte_pktmbuf_mtod_offset(m_src, uint8_t *, offset);
253
254         iv_ptr = rte_crypto_op_ctod_offset(op, uint8_t *,
255                                 session->iv.offset);
256         /*
257          * GCM working in 12B IV mode => 16B pre-counter block we need
258          * to set BE LSB to 1, driver expects that 16B is allocated
259          */
260         if (session->iv.length == 12) {
261                 uint32_t *iv_padd = (uint32_t *)&(iv_ptr[12]);
262                 *iv_padd = rte_bswap32(1);
263         }
264
265         if (session->op == AESNI_GCM_OP_AUTHENTICATED_ENCRYPTION) {
266
267                 qp->ops[session->key].init(&session->gdata_key,
268                                 &qp->gdata_ctx,
269                                 iv_ptr,
270                                 sym_op->aead.aad.data,
271                                 (uint64_t)session->aad_length);
272
273                 qp->ops[session->key].update_enc(&session->gdata_key,
274                                 &qp->gdata_ctx, dst, src,
275                                 (uint64_t)part_len);
276                 total_len = data_length - part_len;
277
278                 while (total_len) {
279                         dst += part_len;
280                         m_src = m_src->next;
281
282                         RTE_ASSERT(m_src != NULL);
283
284                         src = rte_pktmbuf_mtod(m_src, uint8_t *);
285                         part_len = (m_src->data_len < total_len) ?
286                                         m_src->data_len : total_len;
287
288                         qp->ops[session->key].update_enc(&session->gdata_key,
289                                         &qp->gdata_ctx, dst, src,
290                                         (uint64_t)part_len);
291                         total_len -= part_len;
292                 }
293
294                 qp->ops[session->key].finalize(&session->gdata_key,
295                                 &qp->gdata_ctx,
296                                 sym_op->aead.digest.data,
297                                 (uint64_t)session->digest_length);
298         } else if (session->op == AESNI_GCM_OP_AUTHENTICATED_DECRYPTION) {
299                 uint8_t *auth_tag = qp->temp_digest;
300
301                 qp->ops[session->key].init(&session->gdata_key,
302                                 &qp->gdata_ctx,
303                                 iv_ptr,
304                                 sym_op->aead.aad.data,
305                                 (uint64_t)session->aad_length);
306
307                 qp->ops[session->key].update_dec(&session->gdata_key,
308                                 &qp->gdata_ctx, dst, src,
309                                 (uint64_t)part_len);
310                 total_len = data_length - part_len;
311
312                 while (total_len) {
313                         dst += part_len;
314                         m_src = m_src->next;
315
316                         RTE_ASSERT(m_src != NULL);
317
318                         src = rte_pktmbuf_mtod(m_src, uint8_t *);
319                         part_len = (m_src->data_len < total_len) ?
320                                         m_src->data_len : total_len;
321
322                         qp->ops[session->key].update_dec(&session->gdata_key,
323                                         &qp->gdata_ctx,
324                                         dst, src,
325                                         (uint64_t)part_len);
326                         total_len -= part_len;
327                 }
328
329                 qp->ops[session->key].finalize(&session->gdata_key,
330                                 &qp->gdata_ctx,
331                                 auth_tag,
332                                 (uint64_t)session->digest_length);
333         } else if (session->op == AESNI_GMAC_OP_GENERATE) {
334                 qp->ops[session->key].init(&session->gdata_key,
335                                 &qp->gdata_ctx,
336                                 iv_ptr,
337                                 src,
338                                 (uint64_t)data_length);
339                 qp->ops[session->key].finalize(&session->gdata_key,
340                                 &qp->gdata_ctx,
341                                 sym_op->auth.digest.data,
342                                 (uint64_t)session->digest_length);
343         } else { /* AESNI_GMAC_OP_VERIFY */
344                 uint8_t *auth_tag = qp->temp_digest;
345
346                 qp->ops[session->key].init(&session->gdata_key,
347                                 &qp->gdata_ctx,
348                                 iv_ptr,
349                                 src,
350                                 (uint64_t)data_length);
351
352                 qp->ops[session->key].finalize(&session->gdata_key,
353                                 &qp->gdata_ctx,
354                                 auth_tag,
355                                 (uint64_t)session->digest_length);
356         }
357
358         return 0;
359 }
360
361 /**
362  * Process a completed job and return rte_mbuf which job processed
363  *
364  * @param job   JOB_AES_HMAC job to process
365  *
366  * @return
367  * - Returns processed mbuf which is trimmed of output digest used in
368  * verification of supplied digest in the case of a HASH_CIPHER operation
369  * - Returns NULL on invalid job
370  */
371 static void
372 post_process_gcm_crypto_op(struct aesni_gcm_qp *qp,
373                 struct rte_crypto_op *op,
374                 struct aesni_gcm_session *session)
375 {
376         op->status = RTE_CRYPTO_OP_STATUS_SUCCESS;
377
378         /* Verify digest if required */
379         if (session->op == AESNI_GCM_OP_AUTHENTICATED_DECRYPTION ||
380                         session->op == AESNI_GMAC_OP_VERIFY) {
381                 uint8_t *digest;
382
383                 uint8_t *tag = (uint8_t *)&qp->temp_digest;
384
385                 if (session->op == AESNI_GMAC_OP_VERIFY)
386                         digest = op->sym->auth.digest.data;
387                 else
388                         digest = op->sym->aead.digest.data;
389
390 #ifdef RTE_LIBRTE_PMD_AESNI_GCM_DEBUG
391                 rte_hexdump(stdout, "auth tag (orig):",
392                                 digest, session->digest_length);
393                 rte_hexdump(stdout, "auth tag (calc):",
394                                 tag, session->digest_length);
395 #endif
396
397                 if (memcmp(tag, digest, session->digest_length) != 0)
398                         op->status = RTE_CRYPTO_OP_STATUS_AUTH_FAILED;
399         }
400 }
401
402 /**
403  * Process a completed GCM request
404  *
405  * @param qp            Queue Pair to process
406  * @param op            Crypto operation
407  * @param job           JOB_AES_HMAC job
408  *
409  * @return
410  * - Number of processed jobs
411  */
412 static void
413 handle_completed_gcm_crypto_op(struct aesni_gcm_qp *qp,
414                 struct rte_crypto_op *op,
415                 struct aesni_gcm_session *sess)
416 {
417         post_process_gcm_crypto_op(qp, op, sess);
418
419         /* Free session if a session-less crypto op */
420         if (op->sess_type == RTE_CRYPTO_OP_SESSIONLESS) {
421                 memset(sess, 0, sizeof(struct aesni_gcm_session));
422                 memset(op->sym->session, 0,
423                                 rte_cryptodev_get_header_session_size());
424                 rte_mempool_put(qp->sess_mp, sess);
425                 rte_mempool_put(qp->sess_mp, op->sym->session);
426                 op->sym->session = NULL;
427         }
428 }
429
430 static uint16_t
431 aesni_gcm_pmd_dequeue_burst(void *queue_pair,
432                 struct rte_crypto_op **ops, uint16_t nb_ops)
433 {
434         struct aesni_gcm_session *sess;
435         struct aesni_gcm_qp *qp = queue_pair;
436
437         int retval = 0;
438         unsigned int i, nb_dequeued;
439
440         nb_dequeued = rte_ring_dequeue_burst(qp->processed_pkts,
441                         (void **)ops, nb_ops, NULL);
442
443         for (i = 0; i < nb_dequeued; i++) {
444
445                 sess = aesni_gcm_get_session(qp, ops[i]);
446                 if (unlikely(sess == NULL)) {
447                         ops[i]->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS;
448                         qp->qp_stats.dequeue_err_count++;
449                         break;
450                 }
451
452                 retval = process_gcm_crypto_op(qp, ops[i], sess);
453                 if (retval < 0) {
454                         ops[i]->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS;
455                         qp->qp_stats.dequeue_err_count++;
456                         break;
457                 }
458
459                 handle_completed_gcm_crypto_op(qp, ops[i], sess);
460         }
461
462         qp->qp_stats.dequeued_count += i;
463
464         return i;
465 }
466
467 static uint16_t
468 aesni_gcm_pmd_enqueue_burst(void *queue_pair,
469                 struct rte_crypto_op **ops, uint16_t nb_ops)
470 {
471         struct aesni_gcm_qp *qp = queue_pair;
472
473         unsigned int nb_enqueued;
474
475         nb_enqueued = rte_ring_enqueue_burst(qp->processed_pkts,
476                         (void **)ops, nb_ops, NULL);
477         qp->qp_stats.enqueued_count += nb_enqueued;
478
479         return nb_enqueued;
480 }
481
482 static int aesni_gcm_remove(struct rte_vdev_device *vdev);
483
484 static int
485 aesni_gcm_create(const char *name,
486                 struct rte_vdev_device *vdev,
487                 struct rte_cryptodev_pmd_init_params *init_params)
488 {
489         struct rte_cryptodev *dev;
490         struct aesni_gcm_private *internals;
491         enum aesni_gcm_vector_mode vector_mode;
492
493         /* Check CPU for support for AES instruction set */
494         if (!rte_cpu_get_flag_enabled(RTE_CPUFLAG_AES)) {
495                 GCM_LOG_ERR("AES instructions not supported by CPU");
496                 return -EFAULT;
497         }
498
499         dev = rte_cryptodev_pmd_create(name, &vdev->device, init_params);
500         if (dev == NULL) {
501                 GCM_LOG_ERR("driver %s: create failed", init_params->name);
502                 return -ENODEV;
503         }
504
505         /* Check CPU for supported vector instruction set */
506         if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2))
507                 vector_mode = RTE_AESNI_GCM_AVX2;
508         else if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX))
509                 vector_mode = RTE_AESNI_GCM_AVX;
510         else
511                 vector_mode = RTE_AESNI_GCM_SSE;
512
513         dev->driver_id = cryptodev_driver_id;
514         dev->dev_ops = rte_aesni_gcm_pmd_ops;
515
516         /* register rx/tx burst functions for data path */
517         dev->dequeue_burst = aesni_gcm_pmd_dequeue_burst;
518         dev->enqueue_burst = aesni_gcm_pmd_enqueue_burst;
519
520         dev->feature_flags = RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO |
521                         RTE_CRYPTODEV_FF_SYM_OPERATION_CHAINING |
522                         RTE_CRYPTODEV_FF_CPU_AESNI |
523                         RTE_CRYPTODEV_FF_MBUF_SCATTER_GATHER;
524
525         switch (vector_mode) {
526         case RTE_AESNI_GCM_SSE:
527                 dev->feature_flags |= RTE_CRYPTODEV_FF_CPU_SSE;
528                 break;
529         case RTE_AESNI_GCM_AVX:
530                 dev->feature_flags |= RTE_CRYPTODEV_FF_CPU_AVX;
531                 break;
532         case RTE_AESNI_GCM_AVX2:
533                 dev->feature_flags |= RTE_CRYPTODEV_FF_CPU_AVX2;
534                 break;
535         default:
536                 break;
537         }
538
539         internals = dev->data->dev_private;
540
541         internals->vector_mode = vector_mode;
542
543         internals->max_nb_queue_pairs = init_params->max_nb_queue_pairs;
544         internals->max_nb_sessions = init_params->max_nb_sessions;
545
546         return 0;
547 }
548
549 static int
550 aesni_gcm_probe(struct rte_vdev_device *vdev)
551 {
552         struct rte_cryptodev_pmd_init_params init_params = {
553                 "",
554                 sizeof(struct aesni_gcm_private),
555                 rte_socket_id(),
556                 RTE_CRYPTODEV_PMD_DEFAULT_MAX_NB_QUEUE_PAIRS,
557                 RTE_CRYPTODEV_PMD_DEFAULT_MAX_NB_SESSIONS
558         };
559         const char *name;
560         const char *input_args;
561
562         name = rte_vdev_device_name(vdev);
563         if (name == NULL)
564                 return -EINVAL;
565         input_args = rte_vdev_device_args(vdev);
566         rte_cryptodev_pmd_parse_input_args(&init_params, input_args);
567
568         return aesni_gcm_create(name, vdev, &init_params);
569 }
570
571 static int
572 aesni_gcm_remove(struct rte_vdev_device *vdev)
573 {
574         struct rte_cryptodev *cryptodev;
575         const char *name;
576
577         name = rte_vdev_device_name(vdev);
578         if (name == NULL)
579                 return -EINVAL;
580
581         cryptodev = rte_cryptodev_pmd_get_named_dev(name);
582         if (cryptodev == NULL)
583                 return -ENODEV;
584
585         return rte_cryptodev_pmd_destroy(cryptodev);
586 }
587
588 static struct rte_vdev_driver aesni_gcm_pmd_drv = {
589         .probe = aesni_gcm_probe,
590         .remove = aesni_gcm_remove
591 };
592
593 static struct cryptodev_driver aesni_gcm_crypto_drv;
594
595 RTE_PMD_REGISTER_VDEV(CRYPTODEV_NAME_AESNI_GCM_PMD, aesni_gcm_pmd_drv);
596 RTE_PMD_REGISTER_ALIAS(CRYPTODEV_NAME_AESNI_GCM_PMD, cryptodev_aesni_gcm_pmd);
597 RTE_PMD_REGISTER_PARAM_STRING(CRYPTODEV_NAME_AESNI_GCM_PMD,
598         "max_nb_queue_pairs=<int> "
599         "max_nb_sessions=<int> "
600         "socket_id=<int>");
601 RTE_PMD_REGISTER_CRYPTO_DRIVER(aesni_gcm_crypto_drv, aesni_gcm_pmd_drv,
602                 cryptodev_driver_id);