Imported Upstream version 16.11.1
[deb_dpdk.git] / drivers / crypto / aesni_gcm / aesni_gcm_pmd.c
1 /*-
2  *   BSD LICENSE
3  *
4  *   Copyright(c) 2016 Intel Corporation. All rights reserved.
5  *
6  *   Redistribution and use in source and binary forms, with or without
7  *   modification, are permitted provided that the following conditions
8  *   are met:
9  *
10  *     * Redistributions of source code must retain the above copyright
11  *       notice, this list of conditions and the following disclaimer.
12  *     * Redistributions in binary form must reproduce the above copyright
13  *       notice, this list of conditions and the following disclaimer in
14  *       the documentation and/or other materials provided with the
15  *       distribution.
16  *     * Neither the name of Intel Corporation nor the names of its
17  *       contributors may be used to endorse or promote products derived
18  *       from this software without specific prior written permission.
19  *
20  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
21  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
23  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
24  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
25  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
26  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
30  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31  */
32
33 #include <openssl/aes.h>
34
35 #include <rte_common.h>
36 #include <rte_config.h>
37 #include <rte_hexdump.h>
38 #include <rte_cryptodev.h>
39 #include <rte_cryptodev_pmd.h>
40 #include <rte_vdev.h>
41 #include <rte_malloc.h>
42 #include <rte_cpuflags.h>
43 #include <rte_byteorder.h>
44
45 #include "aesni_gcm_pmd_private.h"
46
47 /**
48  * Global static parameter used to create a unique name for each AES-NI multi
49  * buffer crypto device.
50  */
51 static unsigned unique_name_id;
52
53 static inline int
54 create_unique_device_name(char *name, size_t size)
55 {
56         int ret;
57
58         if (name == NULL)
59                 return -EINVAL;
60
61         ret = snprintf(name, size, "%s_%u", RTE_STR(CRYPTODEV_NAME_AESNI_GCM_PMD),
62                         unique_name_id++);
63         if (ret < 0)
64                 return ret;
65         return 0;
66 }
67
68 static int
69 aesni_gcm_calculate_hash_sub_key(uint8_t *hsubkey, unsigned hsubkey_length,
70                 uint8_t *aeskey, unsigned aeskey_length)
71 {
72         uint8_t key[aeskey_length] __rte_aligned(16);
73         AES_KEY enc_key;
74
75         if (hsubkey_length % 16 != 0 && aeskey_length % 16 != 0)
76                 return -EFAULT;
77
78         memcpy(key, aeskey, aeskey_length);
79
80         if (AES_set_encrypt_key(key, aeskey_length << 3, &enc_key) != 0)
81                 return -EFAULT;
82
83         AES_encrypt(hsubkey, hsubkey, &enc_key);
84
85         return 0;
86 }
87
88 /** Get xform chain order */
89 static int
90 aesni_gcm_get_mode(const struct rte_crypto_sym_xform *xform)
91 {
92         /*
93          * GCM only supports authenticated encryption or authenticated
94          * decryption, all other options are invalid, so we must have exactly
95          * 2 xform structs chained together
96          */
97         if (xform->next == NULL || xform->next->next != NULL)
98                 return -1;
99
100         if (xform->type == RTE_CRYPTO_SYM_XFORM_CIPHER &&
101                         xform->next->type == RTE_CRYPTO_SYM_XFORM_AUTH) {
102                 return AESNI_GCM_OP_AUTHENTICATED_ENCRYPTION;
103         }
104
105         if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH &&
106                         xform->next->type == RTE_CRYPTO_SYM_XFORM_CIPHER) {
107                 return AESNI_GCM_OP_AUTHENTICATED_DECRYPTION;
108         }
109
110         return -1;
111 }
112
113 /** Parse crypto xform chain and set private session parameters */
114 int
115 aesni_gcm_set_session_parameters(const struct aesni_gcm_ops *gcm_ops,
116                 struct aesni_gcm_session *sess,
117                 const struct rte_crypto_sym_xform *xform)
118 {
119         const struct rte_crypto_sym_xform *auth_xform = NULL;
120         const struct rte_crypto_sym_xform *cipher_xform = NULL;
121
122         uint8_t hsubkey[16] __rte_aligned(16) = { 0 };
123
124         /* Select Crypto operation - hash then cipher / cipher then hash */
125         switch (aesni_gcm_get_mode(xform)) {
126         case AESNI_GCM_OP_AUTHENTICATED_ENCRYPTION:
127                 sess->op = AESNI_GCM_OP_AUTHENTICATED_ENCRYPTION;
128
129                 cipher_xform = xform;
130                 auth_xform = xform->next;
131                 break;
132         case AESNI_GCM_OP_AUTHENTICATED_DECRYPTION:
133                 sess->op = AESNI_GCM_OP_AUTHENTICATED_DECRYPTION;
134
135                 auth_xform = xform;
136                 cipher_xform = xform->next;
137                 break;
138         default:
139                 GCM_LOG_ERR("Unsupported operation chain order parameter");
140                 return -EINVAL;
141         }
142
143         /* We only support AES GCM */
144         if (cipher_xform->cipher.algo != RTE_CRYPTO_CIPHER_AES_GCM &&
145                         auth_xform->auth.algo != RTE_CRYPTO_AUTH_AES_GCM)
146                 return -EINVAL;
147
148         /* Select cipher direction */
149         if (sess->op == AESNI_GCM_OP_AUTHENTICATED_ENCRYPTION &&
150                         cipher_xform->cipher.op !=
151                                         RTE_CRYPTO_CIPHER_OP_ENCRYPT) {
152                 GCM_LOG_ERR("xform chain (CIPHER/AUTH) and cipher operation "
153                                 "(DECRYPT) specified are an invalid selection");
154                 return -EINVAL;
155         } else if (sess->op == AESNI_GCM_OP_AUTHENTICATED_DECRYPTION &&
156                         cipher_xform->cipher.op !=
157                                         RTE_CRYPTO_CIPHER_OP_DECRYPT) {
158                 GCM_LOG_ERR("xform chain (AUTH/CIPHER) and cipher operation "
159                                 "(ENCRYPT) specified are an invalid selection");
160                 return -EINVAL;
161         }
162
163         /* Expand GCM AES128 key */
164         (*gcm_ops->aux.keyexp.aes128_enc)(cipher_xform->cipher.key.data,
165                         sess->gdata.expanded_keys);
166
167         /* Calculate hash sub key here */
168         aesni_gcm_calculate_hash_sub_key(hsubkey, sizeof(hsubkey),
169                         cipher_xform->cipher.key.data,
170                         cipher_xform->cipher.key.length);
171
172         /* Calculate GCM pre-compute */
173         (*gcm_ops->gcm.precomp)(&sess->gdata, hsubkey);
174
175         return 0;
176 }
177
178 /** Get gcm session */
179 static struct aesni_gcm_session *
180 aesni_gcm_get_session(struct aesni_gcm_qp *qp, struct rte_crypto_sym_op *op)
181 {
182         struct aesni_gcm_session *sess = NULL;
183
184         if (op->sess_type == RTE_CRYPTO_SYM_OP_WITH_SESSION) {
185                 if (unlikely(op->session->dev_type
186                                         != RTE_CRYPTODEV_AESNI_GCM_PMD))
187                         return sess;
188
189                 sess = (struct aesni_gcm_session *)op->session->_private;
190         } else  {
191                 void *_sess;
192
193                 if (rte_mempool_get(qp->sess_mp, &_sess))
194                         return sess;
195
196                 sess = (struct aesni_gcm_session *)
197                         ((struct rte_cryptodev_session *)_sess)->_private;
198
199                 if (unlikely(aesni_gcm_set_session_parameters(qp->ops,
200                                 sess, op->xform) != 0)) {
201                         rte_mempool_put(qp->sess_mp, _sess);
202                         sess = NULL;
203                 }
204         }
205         return sess;
206 }
207
208 /**
209  * Process a crypto operation and complete a JOB_AES_HMAC job structure for
210  * submission to the multi buffer library for processing.
211  *
212  * @param       qp              queue pair
213  * @param       op              symmetric crypto operation
214  * @param       session         GCM session
215  *
216  * @return
217  *
218  */
219 static int
220 process_gcm_crypto_op(struct aesni_gcm_qp *qp, struct rte_crypto_sym_op *op,
221                 struct aesni_gcm_session *session)
222 {
223         uint8_t *src, *dst;
224         struct rte_mbuf *m = op->m_src;
225
226         src = rte_pktmbuf_mtod(m, uint8_t *) + op->cipher.data.offset;
227         dst = op->m_dst ?
228                         rte_pktmbuf_mtod_offset(op->m_dst, uint8_t *,
229                                         op->cipher.data.offset) :
230                         rte_pktmbuf_mtod_offset(m, uint8_t *,
231                                         op->cipher.data.offset);
232
233         /* sanity checks */
234         if (op->cipher.iv.length != 16 && op->cipher.iv.length != 12 &&
235                         op->cipher.iv.length != 0) {
236                 GCM_LOG_ERR("iv");
237                 return -1;
238         }
239
240         /*
241          * GCM working in 12B IV mode => 16B pre-counter block we need
242          * to set BE LSB to 1, driver expects that 16B is allocated
243          */
244         if (op->cipher.iv.length == 12) {
245                 uint32_t *iv_padd = (uint32_t *)&op->cipher.iv.data[12];
246                 *iv_padd = rte_bswap32(1);
247         }
248
249         if (op->auth.aad.length != 12 && op->auth.aad.length != 8 &&
250                         op->auth.aad.length != 0) {
251                 GCM_LOG_ERR("iv");
252                 return -1;
253         }
254
255         if (op->auth.digest.length != 16 &&
256                         op->auth.digest.length != 12 &&
257                         op->auth.digest.length != 8 &&
258                         op->auth.digest.length != 0) {
259                 GCM_LOG_ERR("iv");
260                 return -1;
261         }
262
263         if (session->op == AESNI_GCM_OP_AUTHENTICATED_ENCRYPTION) {
264
265                 (*qp->ops->gcm.enc)(&session->gdata, dst, src,
266                                 (uint64_t)op->cipher.data.length,
267                                 op->cipher.iv.data,
268                                 op->auth.aad.data,
269                                 (uint64_t)op->auth.aad.length,
270                                 op->auth.digest.data,
271                                 (uint64_t)op->auth.digest.length);
272         } else if (session->op == AESNI_GCM_OP_AUTHENTICATED_DECRYPTION) {
273                 uint8_t *auth_tag = (uint8_t *)rte_pktmbuf_append(m,
274                                 op->auth.digest.length);
275
276                 if (!auth_tag) {
277                         GCM_LOG_ERR("iv");
278                         return -1;
279                 }
280
281                 (*qp->ops->gcm.dec)(&session->gdata, dst, src,
282                                 (uint64_t)op->cipher.data.length,
283                                 op->cipher.iv.data,
284                                 op->auth.aad.data,
285                                 (uint64_t)op->auth.aad.length,
286                                 auth_tag,
287                                 (uint64_t)op->auth.digest.length);
288         } else {
289                 GCM_LOG_ERR("iv");
290                 return -1;
291         }
292
293         return 0;
294 }
295
296 /**
297  * Process a completed job and return rte_mbuf which job processed
298  *
299  * @param job   JOB_AES_HMAC job to process
300  *
301  * @return
302  * - Returns processed mbuf which is trimmed of output digest used in
303  * verification of supplied digest in the case of a HASH_CIPHER operation
304  * - Returns NULL on invalid job
305  */
306 static void
307 post_process_gcm_crypto_op(struct rte_crypto_op *op)
308 {
309         struct rte_mbuf *m = op->sym->m_dst ? op->sym->m_dst : op->sym->m_src;
310
311         struct aesni_gcm_session *session =
312                 (struct aesni_gcm_session *)op->sym->session->_private;
313
314         op->status = RTE_CRYPTO_OP_STATUS_SUCCESS;
315
316         /* Verify digest if required */
317         if (session->op == AESNI_GCM_OP_AUTHENTICATED_DECRYPTION) {
318
319                 uint8_t *tag = rte_pktmbuf_mtod_offset(m, uint8_t *,
320                                 m->data_len - op->sym->auth.digest.length);
321
322 #ifdef RTE_LIBRTE_PMD_AESNI_GCM_DEBUG
323                 rte_hexdump(stdout, "auth tag (orig):",
324                                 op->sym->auth.digest.data, op->sym->auth.digest.length);
325                 rte_hexdump(stdout, "auth tag (calc):",
326                                 tag, op->sym->auth.digest.length);
327 #endif
328
329                 if (memcmp(tag, op->sym->auth.digest.data,
330                                 op->sym->auth.digest.length) != 0)
331                         op->status = RTE_CRYPTO_OP_STATUS_AUTH_FAILED;
332
333                 /* trim area used for digest from mbuf */
334                 rte_pktmbuf_trim(m, op->sym->auth.digest.length);
335         }
336 }
337
338 /**
339  * Process a completed GCM request
340  *
341  * @param qp            Queue Pair to process
342  * @param job           JOB_AES_HMAC job
343  *
344  * @return
345  * - Number of processed jobs
346  */
347 static void
348 handle_completed_gcm_crypto_op(struct aesni_gcm_qp *qp,
349                 struct rte_crypto_op *op)
350 {
351         post_process_gcm_crypto_op(op);
352
353         /* Free session if a session-less crypto op */
354         if (op->sym->sess_type == RTE_CRYPTO_SYM_OP_SESSIONLESS) {
355                 rte_mempool_put(qp->sess_mp, op->sym->session);
356                 op->sym->session = NULL;
357         }
358
359         rte_ring_enqueue(qp->processed_pkts, (void *)op);
360 }
361
362 static uint16_t
363 aesni_gcm_pmd_enqueue_burst(void *queue_pair,
364                 struct rte_crypto_op **ops, uint16_t nb_ops)
365 {
366         struct aesni_gcm_session *sess;
367         struct aesni_gcm_qp *qp = queue_pair;
368
369         int i, retval = 0;
370
371         for (i = 0; i < nb_ops; i++) {
372
373                 sess = aesni_gcm_get_session(qp, ops[i]->sym);
374                 if (unlikely(sess == NULL)) {
375                         ops[i]->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS;
376                         qp->qp_stats.enqueue_err_count++;
377                         break;
378                 }
379
380                 retval = process_gcm_crypto_op(qp, ops[i]->sym, sess);
381                 if (retval < 0) {
382                         ops[i]->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS;
383                         qp->qp_stats.enqueue_err_count++;
384                         break;
385                 }
386
387                 handle_completed_gcm_crypto_op(qp, ops[i]);
388
389                 qp->qp_stats.enqueued_count++;
390         }
391         return i;
392 }
393
394 static uint16_t
395 aesni_gcm_pmd_dequeue_burst(void *queue_pair,
396                 struct rte_crypto_op **ops, uint16_t nb_ops)
397 {
398         struct aesni_gcm_qp *qp = queue_pair;
399
400         unsigned nb_dequeued;
401
402         nb_dequeued = rte_ring_dequeue_burst(qp->processed_pkts,
403                         (void **)ops, nb_ops);
404         qp->qp_stats.dequeued_count += nb_dequeued;
405
406         return nb_dequeued;
407 }
408
409 static int aesni_gcm_remove(const char *name);
410
411 static int
412 aesni_gcm_create(const char *name,
413                 struct rte_crypto_vdev_init_params *init_params)
414 {
415         struct rte_cryptodev *dev;
416         char crypto_dev_name[RTE_CRYPTODEV_NAME_MAX_LEN];
417         struct aesni_gcm_private *internals;
418         enum aesni_gcm_vector_mode vector_mode;
419
420         /* Check CPU for support for AES instruction set */
421         if (!rte_cpu_get_flag_enabled(RTE_CPUFLAG_AES)) {
422                 GCM_LOG_ERR("AES instructions not supported by CPU");
423                 return -EFAULT;
424         }
425
426         /* Check CPU for supported vector instruction set */
427         if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2))
428                 vector_mode = RTE_AESNI_GCM_AVX2;
429         else if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX))
430                 vector_mode = RTE_AESNI_GCM_AVX;
431         else if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_SSE4_1))
432                 vector_mode = RTE_AESNI_GCM_SSE;
433         else {
434                 GCM_LOG_ERR("Vector instructions are not supported by CPU");
435                 return -EFAULT;
436         }
437
438         /* create a unique device name */
439         if (create_unique_device_name(crypto_dev_name,
440                         RTE_CRYPTODEV_NAME_MAX_LEN) != 0) {
441                 GCM_LOG_ERR("failed to create unique cryptodev name");
442                 return -EINVAL;
443         }
444
445
446         dev = rte_cryptodev_pmd_virtual_dev_init(crypto_dev_name,
447                         sizeof(struct aesni_gcm_private), init_params->socket_id);
448         if (dev == NULL) {
449                 GCM_LOG_ERR("failed to create cryptodev vdev");
450                 goto init_error;
451         }
452
453         dev->dev_type = RTE_CRYPTODEV_AESNI_GCM_PMD;
454         dev->dev_ops = rte_aesni_gcm_pmd_ops;
455
456         /* register rx/tx burst functions for data path */
457         dev->dequeue_burst = aesni_gcm_pmd_dequeue_burst;
458         dev->enqueue_burst = aesni_gcm_pmd_enqueue_burst;
459
460         dev->feature_flags = RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO |
461                         RTE_CRYPTODEV_FF_SYM_OPERATION_CHAINING |
462                         RTE_CRYPTODEV_FF_CPU_AESNI;
463
464         switch (vector_mode) {
465         case RTE_AESNI_GCM_SSE:
466                 dev->feature_flags |= RTE_CRYPTODEV_FF_CPU_SSE;
467                 break;
468         case RTE_AESNI_GCM_AVX:
469                 dev->feature_flags |= RTE_CRYPTODEV_FF_CPU_AVX;
470                 break;
471         case RTE_AESNI_GCM_AVX2:
472                 dev->feature_flags |= RTE_CRYPTODEV_FF_CPU_AVX2;
473                 break;
474         default:
475                 break;
476         }
477
478         /* Set vector instructions mode supported */
479         internals = dev->data->dev_private;
480
481         internals->vector_mode = vector_mode;
482
483         internals->max_nb_queue_pairs = init_params->max_nb_queue_pairs;
484         internals->max_nb_sessions = init_params->max_nb_sessions;
485
486         return 0;
487
488 init_error:
489         GCM_LOG_ERR("driver %s: create failed", name);
490
491         aesni_gcm_remove(crypto_dev_name);
492         return -EFAULT;
493 }
494
495 static int
496 aesni_gcm_probe(const char *name, const char *input_args)
497 {
498         struct rte_crypto_vdev_init_params init_params = {
499                 RTE_CRYPTODEV_VDEV_DEFAULT_MAX_NB_QUEUE_PAIRS,
500                 RTE_CRYPTODEV_VDEV_DEFAULT_MAX_NB_SESSIONS,
501                 rte_socket_id()
502         };
503
504         rte_cryptodev_parse_vdev_init_params(&init_params, input_args);
505
506         RTE_LOG(INFO, PMD, "Initialising %s on NUMA node %d\n", name,
507                         init_params.socket_id);
508         RTE_LOG(INFO, PMD, "  Max number of queue pairs = %d\n",
509                         init_params.max_nb_queue_pairs);
510         RTE_LOG(INFO, PMD, "  Max number of sessions = %d\n",
511                         init_params.max_nb_sessions);
512
513         return aesni_gcm_create(name, &init_params);
514 }
515
516 static int
517 aesni_gcm_remove(const char *name)
518 {
519         if (name == NULL)
520                 return -EINVAL;
521
522         GCM_LOG_INFO("Closing AESNI crypto device %s on numa socket %u\n",
523                         name, rte_socket_id());
524
525         return 0;
526 }
527
528 static struct rte_vdev_driver aesni_gcm_pmd_drv = {
529         .probe = aesni_gcm_probe,
530         .remove = aesni_gcm_remove
531 };
532
533 RTE_PMD_REGISTER_VDEV(CRYPTODEV_NAME_AESNI_GCM_PMD, aesni_gcm_pmd_drv);
534 RTE_PMD_REGISTER_ALIAS(CRYPTODEV_NAME_AESNI_GCM_PMD, cryptodev_aesni_gcm_pmd);
535 RTE_PMD_REGISTER_PARAM_STRING(CRYPTODEV_NAME_AESNI_GCM_PMD,
536         "max_nb_queue_pairs=<int> "
537         "max_nb_sessions=<int> "
538         "socket_id=<int>");