drivers/crypto/aesni_mb/rte_aesni_mb_pmd_ops.c

   1 /*-
   2  *   BSD LICENSE
   3  *
   4  *   Copyright(c) 2015-2016 Intel Corporation. All rights reserved.
   5  *
   6  *   Redistribution and use in source and binary forms, with or without
   7  *   modification, are permitted provided that the following conditions
   8  *   are met:
   9  *
  10  *     * Redistributions of source code must retain the above copyright
  11  *       notice, this list of conditions and the following disclaimer.
  12  *     * Redistributions in binary form must reproduce the above copyright
  13  *       notice, this list of conditions and the following disclaimer in
  14  *       the documentation and/or other materials provided with the
  15  *       distribution.
  16  *     * Neither the name of Intel Corporation nor the names of its
  17  *       contributors may be used to endorse or promote products derived
  18  *       from this software without specific prior written permission.
  19  *
  20  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  21  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  22  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  23  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  24  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  25  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  26  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  27  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  28  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  29  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  30  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  31  */
  32
  33 #include <string.h>
  34
  35 #include <rte_common.h>
  36 #include <rte_malloc.h>
  37 #include <rte_cryptodev_pmd.h>
  38
  39 #include "rte_aesni_mb_pmd_private.h"
  40
  41
  42 static const struct rte_cryptodev_capabilities aesni_mb_pmd_capabilities[] = {
  43         {       /* MD5 HMAC */
  44                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
  45                 {.sym = {
  46                         .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
  47                         {.auth = {
  48                                 .algo = RTE_CRYPTO_AUTH_MD5_HMAC,
  49                                 .block_size = 64,
  50                                 .key_size = {
  51                                         .min = 64,
  52                                         .max = 64,
  53                                         .increment = 0
  54                                 },
  55                                 .digest_size = {
  56                                         .min = 12,
  57                                         .max = 12,
  58                                         .increment = 0
  59                                 },
  60                                 .aad_size = { 0 }
  61                         }, }
  62                 }, }
  63         },
  64         {       /* SHA1 HMAC */
  65                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
  66                 {.sym = {
  67                         .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
  68                         {.auth = {
  69                                 .algo = RTE_CRYPTO_AUTH_SHA1_HMAC,
  70                                 .block_size = 64,
  71                                 .key_size = {
  72                                         .min = 64,
  73                                         .max = 64,
  74                                         .increment = 0
  75                                 },
  76                                 .digest_size = {
  77                                         .min = 12,
  78                                         .max = 12,
  79                                         .increment = 0
  80                                 },
  81                                 .aad_size = { 0 }
  82                         }, }
  83                 }, }
  84         },
  85         {       /* SHA224 HMAC */
  86                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
  87                 {.sym = {
  88                         .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
  89                         {.auth = {
  90                                 .algo = RTE_CRYPTO_AUTH_SHA224_HMAC,
  91                                 .block_size = 64,
  92                                 .key_size = {
  93                                         .min = 64,
  94                                         .max = 64,
  95                                         .increment = 0
  96                                 },
  97                                 .digest_size = {
  98                                         .min = 14,
  99                                         .max = 14,
 100                                         .increment = 0
 101                                 },
 102                                 .aad_size = { 0 }
 103                         }, }
 104                 }, }
 105         },
 106         {       /* SHA256 HMAC */
 107                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 108                 {.sym = {
 109                         .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
 110                         {.auth = {
 111                                 .algo = RTE_CRYPTO_AUTH_SHA256_HMAC,
 112                                 .block_size = 64,
 113                                 .key_size = {
 114                                         .min = 64,
 115                                         .max = 64,
 116                                         .increment = 0
 117                                 },
 118                                 .digest_size = {
 119                                         .min = 16,
 120                                         .max = 16,
 121                                         .increment = 0
 122                                 },
 123                                 .aad_size = { 0 }
 124                         }, }
 125                 }, }
 126         },
 127         {       /* SHA384 HMAC */
 128                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 129                 {.sym = {
 130                         .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
 131                         {.auth = {
 132                                 .algo = RTE_CRYPTO_AUTH_SHA384_HMAC,
 133                                 .block_size = 128,
 134                                 .key_size = {
 135                                         .min = 128,
 136                                         .max = 128,
 137                                         .increment = 0
 138                                 },
 139                                 .digest_size = {
 140                                         .min = 24,
 141                                         .max = 24,
 142                                         .increment = 0
 143                                 },
 144                                 .aad_size = { 0 }
 145                         }, }
 146                 }, }
 147         },
 148         {       /* SHA512 HMAC */
 149                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 150                 {.sym = {
 151                         .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
 152                         {.auth = {
 153                                 .algo = RTE_CRYPTO_AUTH_SHA512_HMAC,
 154                                 .block_size = 128,
 155                                 .key_size = {
 156                                         .min = 128,
 157                                         .max = 128,
 158                                         .increment = 0
 159                                 },
 160                                 .digest_size = {
 161                                         .min = 32,
 162                                         .max = 32,
 163                                         .increment = 0
 164                                 },
 165                                 .aad_size = { 0 }
 166                         }, }
 167                 }, }
 168         },
 169         {       /* AES XCBC HMAC */
 170                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 171                 {.sym = {
 172                         .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
 173                         {.auth = {
 174                                 .algo = RTE_CRYPTO_AUTH_AES_XCBC_MAC,
 175                                 .block_size = 16,
 176                                 .key_size = {
 177                                         .min = 16,
 178                                         .max = 16,
 179                                         .increment = 0
 180                                 },
 181                                 .digest_size = {
 182                                         .min = 12,
 183                                         .max = 12,
 184                                         .increment = 0
 185                                 },
 186                                 .aad_size = { 0 }
 187                         }, }
 188                 }, }
 189         },
 190         {       /* AES CBC */
 191                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 192                 {.sym = {
 193                         .xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,
 194                         {.cipher = {
 195                                 .algo = RTE_CRYPTO_CIPHER_AES_CBC,
 196                                 .block_size = 16,
 197                                 .key_size = {
 198                                         .min = 16,
 199                                         .max = 32,
 200                                         .increment = 8
 201                                 },
 202                                 .iv_size = {
 203                                         .min = 16,
 204                                         .max = 16,
 205                                         .increment = 0
 206                                 }
 207                         }, }
 208                 }, }
 209         },
 210         RTE_CRYPTODEV_END_OF_CAPABILITIES_LIST()
 211 };
 212
 213
 214 /** Configure device */
 215 static int
 216 aesni_mb_pmd_config(__rte_unused struct rte_cryptodev *dev)
 217 {
 218         return 0;
 219 }
 220
 221 /** Start device */
 222 static int
 223 aesni_mb_pmd_start(__rte_unused struct rte_cryptodev *dev)
 224 {
 225         return 0;
 226 }
 227
 228 /** Stop device */
 229 static void
 230 aesni_mb_pmd_stop(__rte_unused struct rte_cryptodev *dev)
 231 {
 232 }
 233
 234 /** Close device */
 235 static int
 236 aesni_mb_pmd_close(__rte_unused struct rte_cryptodev *dev)
 237 {
 238         return 0;
 239 }
 240
 241
 242 /** Get device statistics */
 243 static void
 244 aesni_mb_pmd_stats_get(struct rte_cryptodev *dev,
 245                 struct rte_cryptodev_stats *stats)
 246 {
 247         int qp_id;
 248
 249         for (qp_id = 0; qp_id < dev->data->nb_queue_pairs; qp_id++) {
 250                 struct aesni_mb_qp *qp = dev->data->queue_pairs[qp_id];
 251
 252                 stats->enqueued_count += qp->stats.enqueued_count;
 253                 stats->dequeued_count += qp->stats.dequeued_count;
 254
 255                 stats->enqueue_err_count += qp->stats.enqueue_err_count;
 256                 stats->dequeue_err_count += qp->stats.dequeue_err_count;
 257         }
 258 }
 259
 260 /** Reset device statistics */
 261 static void
 262 aesni_mb_pmd_stats_reset(struct rte_cryptodev *dev)
 263 {
 264         int qp_id;
 265
 266         for (qp_id = 0; qp_id < dev->data->nb_queue_pairs; qp_id++) {
 267                 struct aesni_mb_qp *qp = dev->data->queue_pairs[qp_id];
 268
 269                 memset(&qp->stats, 0, sizeof(qp->stats));
 270         }
 271 }
 272
 273
 274 /** Get device info */
 275 static void
 276 aesni_mb_pmd_info_get(struct rte_cryptodev *dev,
 277                 struct rte_cryptodev_info *dev_info)
 278 {
 279         struct aesni_mb_private *internals = dev->data->dev_private;
 280
 281         if (dev_info != NULL) {
 282                 dev_info->dev_type = dev->dev_type;
 283                 dev_info->feature_flags = dev->feature_flags;
 284                 dev_info->capabilities = aesni_mb_pmd_capabilities;
 285                 dev_info->max_nb_queue_pairs = internals->max_nb_queue_pairs;
 286                 dev_info->sym.max_nb_sessions = internals->max_nb_sessions;
 287         }
 288 }
 289
 290 /** Release queue pair */
 291 static int
 292 aesni_mb_pmd_qp_release(struct rte_cryptodev *dev, uint16_t qp_id)
 293 {
 294         if (dev->data->queue_pairs[qp_id] != NULL) {
 295                 rte_free(dev->data->queue_pairs[qp_id]);
 296                 dev->data->queue_pairs[qp_id] = NULL;
 297         }
 298         return 0;
 299 }
 300
 301 /** set a unique name for the queue pair based on it's name, dev_id and qp_id */
 302 static int
 303 aesni_mb_pmd_qp_set_unique_name(struct rte_cryptodev *dev,
 304                 struct aesni_mb_qp *qp)
 305 {
 306         unsigned n = snprintf(qp->name, sizeof(qp->name),
 307                         "aesni_mb_pmd_%u_qp_%u",
 308                         dev->data->dev_id, qp->id);
 309
 310         if (n > sizeof(qp->name))
 311                 return -1;
 312
 313         return 0;
 314 }
 315
 316 /** Create a ring to place processed operations on */
 317 static struct rte_ring *
 318 aesni_mb_pmd_qp_create_processed_ops_ring(struct aesni_mb_qp *qp,
 319                 unsigned ring_size, int socket_id)
 320 {
 321         struct rte_ring *r;
 322
 323         r = rte_ring_lookup(qp->name);
 324         if (r) {
 325                 if (r->prod.size >= ring_size) {
 326                         MB_LOG_INFO("Reusing existing ring %s for processed ops",
 327                                          qp->name);
 328                         return r;
 329                 }
 330
 331                 MB_LOG_ERR("Unable to reuse existing ring %s for processed ops",
 332                                  qp->name);
 333                 return NULL;
 334         }
 335
 336         return rte_ring_create(qp->name, ring_size, socket_id,
 337                         RING_F_SP_ENQ | RING_F_SC_DEQ);
 338 }
 339
 340 /** Setup a queue pair */
 341 static int
 342 aesni_mb_pmd_qp_setup(struct rte_cryptodev *dev, uint16_t qp_id,
 343                 const struct rte_cryptodev_qp_conf *qp_conf,
 344                  int socket_id)
 345 {
 346         struct aesni_mb_qp *qp = NULL;
 347         struct aesni_mb_private *internals = dev->data->dev_private;
 348
 349         /* Free memory prior to re-allocation if needed. */
 350         if (dev->data->queue_pairs[qp_id] != NULL)
 351                 aesni_mb_pmd_qp_release(dev, qp_id);
 352
 353         /* Allocate the queue pair data structure. */
 354         qp = rte_zmalloc_socket("AES-NI PMD Queue Pair", sizeof(*qp),
 355                                         RTE_CACHE_LINE_SIZE, socket_id);
 356         if (qp == NULL)
 357                 return -ENOMEM;
 358
 359         qp->id = qp_id;
 360         dev->data->queue_pairs[qp_id] = qp;
 361
 362         if (aesni_mb_pmd_qp_set_unique_name(dev, qp))
 363                 goto qp_setup_cleanup;
 364
 365         qp->ops = &job_ops[internals->vector_mode];
 366
 367         qp->processed_ops = aesni_mb_pmd_qp_create_processed_ops_ring(qp,
 368                         qp_conf->nb_descriptors, socket_id);
 369         if (qp->processed_ops == NULL)
 370                 goto qp_setup_cleanup;
 371
 372         qp->sess_mp = dev->data->session_pool;
 373
 374         memset(&qp->stats, 0, sizeof(qp->stats));
 375
 376         /* Initialise multi-buffer manager */
 377         (*qp->ops->job.init_mgr)(&qp->mb_mgr);
 378
 379         return 0;
 380
 381 qp_setup_cleanup:
 382         if (qp)
 383                 rte_free(qp);
 384
 385         return -1;
 386 }
 387
 388 /** Start queue pair */
 389 static int
 390 aesni_mb_pmd_qp_start(__rte_unused struct rte_cryptodev *dev,
 391                 __rte_unused uint16_t queue_pair_id)
 392 {
 393         return -ENOTSUP;
 394 }
 395
 396 /** Stop queue pair */
 397 static int
 398 aesni_mb_pmd_qp_stop(__rte_unused struct rte_cryptodev *dev,
 399                 __rte_unused uint16_t queue_pair_id)
 400 {
 401         return -ENOTSUP;
 402 }
 403
 404 /** Return the number of allocated queue pairs */
 405 static uint32_t
 406 aesni_mb_pmd_qp_count(struct rte_cryptodev *dev)
 407 {
 408         return dev->data->nb_queue_pairs;
 409 }
 410
 411 /** Returns the size of the aesni multi-buffer session structure */
 412 static unsigned
 413 aesni_mb_pmd_session_get_size(struct rte_cryptodev *dev __rte_unused)
 414 {
 415         return sizeof(struct aesni_mb_session);
 416 }
 417
 418 /** Configure a aesni multi-buffer session from a crypto xform chain */
 419 static void *
 420 aesni_mb_pmd_session_configure(struct rte_cryptodev *dev,
 421                 struct rte_crypto_sym_xform *xform,     void *sess)
 422 {
 423         struct aesni_mb_private *internals = dev->data->dev_private;
 424
 425         if (unlikely(sess == NULL)) {
 426                 MB_LOG_ERR("invalid session struct");
 427                 return NULL;
 428         }
 429
 430         if (aesni_mb_set_session_parameters(&job_ops[internals->vector_mode],
 431                         sess, xform) != 0) {
 432                 MB_LOG_ERR("failed configure session parameters");
 433                 return NULL;
 434         }
 435
 436         return sess;
 437 }
 438
 439 /** Clear the memory of session so it doesn't leave key material behind */
 440 static void
 441 aesni_mb_pmd_session_clear(struct rte_cryptodev *dev __rte_unused, void *sess)
 442 {
 443         /*
 444          * Current just resetting the whole data structure, need to investigate
 445          * whether a more selective reset of key would be more performant
 446          */
 447         if (sess)
 448                 memset(sess, 0, sizeof(struct aesni_mb_session));
 449 }
 450
 451 struct rte_cryptodev_ops aesni_mb_pmd_ops = {
 452                 .dev_configure          = aesni_mb_pmd_config,
 453                 .dev_start              = aesni_mb_pmd_start,
 454                 .dev_stop               = aesni_mb_pmd_stop,
 455                 .dev_close              = aesni_mb_pmd_close,
 456
 457                 .stats_get              = aesni_mb_pmd_stats_get,
 458                 .stats_reset            = aesni_mb_pmd_stats_reset,
 459
 460                 .dev_infos_get          = aesni_mb_pmd_info_get,
 461
 462                 .queue_pair_setup       = aesni_mb_pmd_qp_setup,
 463                 .queue_pair_release     = aesni_mb_pmd_qp_release,
 464                 .queue_pair_start       = aesni_mb_pmd_qp_start,
 465                 .queue_pair_stop        = aesni_mb_pmd_qp_stop,
 466                 .queue_pair_count       = aesni_mb_pmd_qp_count,
 467
 468                 .session_get_size       = aesni_mb_pmd_session_get_size,
 469                 .session_configure      = aesni_mb_pmd_session_configure,
 470                 .session_clear          = aesni_mb_pmd_session_clear
 471 };
 472
 473 struct rte_cryptodev_ops *rte_aesni_mb_pmd_ops = &aesni_mb_pmd_ops;