drivers/crypto/aesni_mb/rte_aesni_mb_pmd_ops.c

   1 /*-
   2  *   BSD LICENSE
   3  *
   4  *   Copyright(c) 2015-2017 Intel Corporation. All rights reserved.
   5  *
   6  *   Redistribution and use in source and binary forms, with or without
   7  *   modification, are permitted provided that the following conditions
   8  *   are met:
   9  *
  10  *     * Redistributions of source code must retain the above copyright
  11  *       notice, this list of conditions and the following disclaimer.
  12  *     * Redistributions in binary form must reproduce the above copyright
  13  *       notice, this list of conditions and the following disclaimer in
  14  *       the documentation and/or other materials provided with the
  15  *       distribution.
  16  *     * Neither the name of Intel Corporation nor the names of its
  17  *       contributors may be used to endorse or promote products derived
  18  *       from this software without specific prior written permission.
  19  *
  20  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  21  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  22  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  23  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  24  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  25  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  26  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  27  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  28  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  29  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  30  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  31  */
  32
  33 #include <string.h>
  34
  35 #include <rte_common.h>
  36 #include <rte_malloc.h>
  37 #include <rte_cryptodev_pmd.h>
  38
  39 #include "rte_aesni_mb_pmd_private.h"
  40
  41
  42 static const struct rte_cryptodev_capabilities aesni_mb_pmd_capabilities[] = {
  43         {       /* MD5 HMAC */
  44                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
  45                 {.sym = {
  46                         .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
  47                         {.auth = {
  48                                 .algo = RTE_CRYPTO_AUTH_MD5_HMAC,
  49                                 .block_size = 64,
  50                                 .key_size = {
  51                                         .min = 1,
  52                                         .max = 64,
  53                                         .increment = 1
  54                                 },
  55                                 .digest_size = {
  56                                         .min = 12,
  57                                         .max = 12,
  58                                         .increment = 0
  59                                 },
  60                                 .iv_size = { 0 }
  61                         }, }
  62                 }, }
  63         },
  64         {       /* SHA1 HMAC */
  65                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
  66                 {.sym = {
  67                         .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
  68                         {.auth = {
  69                                 .algo = RTE_CRYPTO_AUTH_SHA1_HMAC,
  70                                 .block_size = 64,
  71                                 .key_size = {
  72                                         .min = 1,
  73                                         .max = 64,
  74                                         .increment = 1
  75                                 },
  76                                 .digest_size = {
  77                                         .min = 12,
  78                                         .max = 12,
  79                                         .increment = 0
  80                                 },
  81                                 .iv_size = { 0 }
  82                         }, }
  83                 }, }
  84         },
  85         {       /* SHA224 HMAC */
  86                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
  87                 {.sym = {
  88                         .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
  89                         {.auth = {
  90                                 .algo = RTE_CRYPTO_AUTH_SHA224_HMAC,
  91                                 .block_size = 64,
  92                                 .key_size = {
  93                                         .min = 1,
  94                                         .max = 64,
  95                                         .increment = 1
  96                                 },
  97                                 .digest_size = {
  98                                         .min = 14,
  99                                         .max = 14,
 100                                         .increment = 0
 101                                 },
 102                                 .iv_size = { 0 }
 103                         }, }
 104                 }, }
 105         },
 106         {       /* SHA256 HMAC */
 107                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 108                 {.sym = {
 109                         .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
 110                         {.auth = {
 111                                 .algo = RTE_CRYPTO_AUTH_SHA256_HMAC,
 112                                 .block_size = 64,
 113                                 .key_size = {
 114                                         .min = 1,
 115                                         .max = 64,
 116                                         .increment = 1
 117                                 },
 118                                 .digest_size = {
 119                                         .min = 16,
 120                                         .max = 16,
 121                                         .increment = 0
 122                                 },
 123                                 .iv_size = { 0 }
 124                         }, }
 125                 }, }
 126         },
 127         {       /* SHA384 HMAC */
 128                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 129                 {.sym = {
 130                         .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
 131                         {.auth = {
 132                                 .algo = RTE_CRYPTO_AUTH_SHA384_HMAC,
 133                                 .block_size = 128,
 134                                 .key_size = {
 135                                         .min = 1,
 136                                         .max = 128,
 137                                         .increment = 1
 138                                 },
 139                                 .digest_size = {
 140                                         .min = 24,
 141                                         .max = 24,
 142                                         .increment = 0
 143                                 },
 144                                 .iv_size = { 0 }
 145                         }, }
 146                 }, }
 147         },
 148         {       /* SHA512 HMAC */
 149                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 150                 {.sym = {
 151                         .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
 152                         {.auth = {
 153                                 .algo = RTE_CRYPTO_AUTH_SHA512_HMAC,
 154                                 .block_size = 128,
 155                                 .key_size = {
 156                                         .min = 1,
 157                                         .max = 128,
 158                                         .increment = 1
 159                                 },
 160                                 .digest_size = {
 161                                         .min = 32,
 162                                         .max = 32,
 163                                         .increment = 0
 164                                 },
 165                                 .iv_size = { 0 }
 166                         }, }
 167                 }, }
 168         },
 169         {       /* AES XCBC HMAC */
 170                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 171                 {.sym = {
 172                         .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
 173                         {.auth = {
 174                                 .algo = RTE_CRYPTO_AUTH_AES_XCBC_MAC,
 175                                 .block_size = 16,
 176                                 .key_size = {
 177                                         .min = 16,
 178                                         .max = 16,
 179                                         .increment = 0
 180                                 },
 181                                 .digest_size = {
 182                                         .min = 12,
 183                                         .max = 12,
 184                                         .increment = 0
 185                                 },
 186                                 .iv_size = { 0 }
 187                         }, }
 188                 }, }
 189         },
 190         {       /* AES CBC */
 191                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 192                 {.sym = {
 193                         .xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,
 194                         {.cipher = {
 195                                 .algo = RTE_CRYPTO_CIPHER_AES_CBC,
 196                                 .block_size = 16,
 197                                 .key_size = {
 198                                         .min = 16,
 199                                         .max = 32,
 200                                         .increment = 8
 201                                 },
 202                                 .iv_size = {
 203                                         .min = 16,
 204                                         .max = 16,
 205                                         .increment = 0
 206                                 }
 207                         }, }
 208                 }, }
 209         },
 210         {       /* AES CTR */
 211                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 212                 {.sym = {
 213                         .xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,
 214                         {.cipher = {
 215                                 .algo = RTE_CRYPTO_CIPHER_AES_CTR,
 216                                 .block_size = 16,
 217                                 .key_size = {
 218                                         .min = 16,
 219                                         .max = 32,
 220                                         .increment = 8
 221                                 },
 222                                 .iv_size = {
 223                                         .min = 12,
 224                                         .max = 16,
 225                                         .increment = 4
 226                                 }
 227                         }, }
 228                 }, }
 229         },
 230         {       /* AES DOCSIS BPI */
 231                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 232                 {.sym = {
 233                         .xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,
 234                         {.cipher = {
 235                                 .algo = RTE_CRYPTO_CIPHER_AES_DOCSISBPI,
 236                                 .block_size = 16,
 237                                 .key_size = {
 238                                         .min = 16,
 239                                         .max = 16,
 240                                         .increment = 0
 241                                 },
 242                                 .iv_size = {
 243                                         .min = 16,
 244                                         .max = 16,
 245                                         .increment = 0
 246                                 }
 247                         }, }
 248                 }, }
 249         },
 250         {       /* DES CBC */
 251                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 252                 {.sym = {
 253                         .xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,
 254                         {.cipher = {
 255                                 .algo = RTE_CRYPTO_CIPHER_DES_CBC,
 256                                 .block_size = 8,
 257                                 .key_size = {
 258                                         .min = 8,
 259                                         .max = 8,
 260                                         .increment = 0
 261                                 },
 262                                 .iv_size = {
 263                                         .min = 8,
 264                                         .max = 8,
 265                                         .increment = 0
 266                                 }
 267                         }, }
 268                 }, }
 269         },
 270         {       /* DES DOCSIS BPI */
 271                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 272                 {.sym = {
 273                         .xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,
 274                         {.cipher = {
 275                                 .algo = RTE_CRYPTO_CIPHER_DES_DOCSISBPI,
 276                                 .block_size = 8,
 277                                 .key_size = {
 278                                         .min = 8,
 279                                         .max = 8,
 280                                         .increment = 0
 281                                 },
 282                                 .iv_size = {
 283                                         .min = 8,
 284                                         .max = 8,
 285                                         .increment = 0
 286                                 }
 287                         }, }
 288                 }, }
 289         },
 290
 291
 292
 293         RTE_CRYPTODEV_END_OF_CAPABILITIES_LIST()
 294 };
 295
 296
 297 /** Configure device */
 298 static int
 299 aesni_mb_pmd_config(__rte_unused struct rte_cryptodev *dev,
 300                 __rte_unused struct rte_cryptodev_config *config)
 301 {
 302         return 0;
 303 }
 304
 305 /** Start device */
 306 static int
 307 aesni_mb_pmd_start(__rte_unused struct rte_cryptodev *dev)
 308 {
 309         return 0;
 310 }
 311
 312 /** Stop device */
 313 static void
 314 aesni_mb_pmd_stop(__rte_unused struct rte_cryptodev *dev)
 315 {
 316 }
 317
 318 /** Close device */
 319 static int
 320 aesni_mb_pmd_close(__rte_unused struct rte_cryptodev *dev)
 321 {
 322         return 0;
 323 }
 324
 325
 326 /** Get device statistics */
 327 static void
 328 aesni_mb_pmd_stats_get(struct rte_cryptodev *dev,
 329                 struct rte_cryptodev_stats *stats)
 330 {
 331         int qp_id;
 332
 333         for (qp_id = 0; qp_id < dev->data->nb_queue_pairs; qp_id++) {
 334                 struct aesni_mb_qp *qp = dev->data->queue_pairs[qp_id];
 335
 336                 stats->enqueued_count += qp->stats.enqueued_count;
 337                 stats->dequeued_count += qp->stats.dequeued_count;
 338
 339                 stats->enqueue_err_count += qp->stats.enqueue_err_count;
 340                 stats->dequeue_err_count += qp->stats.dequeue_err_count;
 341         }
 342 }
 343
 344 /** Reset device statistics */
 345 static void
 346 aesni_mb_pmd_stats_reset(struct rte_cryptodev *dev)
 347 {
 348         int qp_id;
 349
 350         for (qp_id = 0; qp_id < dev->data->nb_queue_pairs; qp_id++) {
 351                 struct aesni_mb_qp *qp = dev->data->queue_pairs[qp_id];
 352
 353                 memset(&qp->stats, 0, sizeof(qp->stats));
 354         }
 355 }
 356
 357
 358 /** Get device info */
 359 static void
 360 aesni_mb_pmd_info_get(struct rte_cryptodev *dev,
 361                 struct rte_cryptodev_info *dev_info)
 362 {
 363         struct aesni_mb_private *internals = dev->data->dev_private;
 364
 365         if (dev_info != NULL) {
 366                 dev_info->driver_id = dev->driver_id;
 367                 dev_info->feature_flags = dev->feature_flags;
 368                 dev_info->capabilities = aesni_mb_pmd_capabilities;
 369                 dev_info->max_nb_queue_pairs = internals->max_nb_queue_pairs;
 370                 dev_info->sym.max_nb_sessions = internals->max_nb_sessions;
 371         }
 372 }
 373
 374 /** Release queue pair */
 375 static int
 376 aesni_mb_pmd_qp_release(struct rte_cryptodev *dev, uint16_t qp_id)
 377 {
 378         struct aesni_mb_qp *qp = dev->data->queue_pairs[qp_id];
 379         struct rte_ring *r = NULL;
 380
 381         if (qp != NULL) {
 382                 r = rte_ring_lookup(qp->name);
 383                 if (r)
 384                         rte_ring_free(r);
 385                 rte_free(qp);
 386                 dev->data->queue_pairs[qp_id] = NULL;
 387         }
 388         return 0;
 389 }
 390
 391 /** set a unique name for the queue pair based on it's name, dev_id and qp_id */
 392 static int
 393 aesni_mb_pmd_qp_set_unique_name(struct rte_cryptodev *dev,
 394                 struct aesni_mb_qp *qp)
 395 {
 396         unsigned n = snprintf(qp->name, sizeof(qp->name),
 397                         "aesni_mb_pmd_%u_qp_%u",
 398                         dev->data->dev_id, qp->id);
 399
 400         if (n >= sizeof(qp->name))
 401                 return -1;
 402
 403         return 0;
 404 }
 405
 406 /** Create a ring to place processed operations on */
 407 static struct rte_ring *
 408 aesni_mb_pmd_qp_create_processed_ops_ring(struct aesni_mb_qp *qp,
 409                 const char *str, unsigned int ring_size, int socket_id)
 410 {
 411         struct rte_ring *r;
 412         char ring_name[RTE_CRYPTODEV_NAME_LEN];
 413
 414         unsigned int n = snprintf(ring_name, sizeof(ring_name),
 415                                 "%s_%s",
 416                                 qp->name, str);
 417
 418         if (n >= sizeof(ring_name))
 419                 return NULL;
 420
 421         r = rte_ring_lookup(ring_name);
 422         if (r) {
 423                 if (rte_ring_get_size(r) >= ring_size) {
 424                         MB_LOG_INFO("Reusing existing ring %s for processed ops",
 425                         ring_name);
 426                         return r;
 427                 }
 428
 429                 MB_LOG_ERR("Unable to reuse existing ring %s for processed ops",
 430                         ring_name);
 431                 return NULL;
 432         }
 433
 434         return rte_ring_create(ring_name, ring_size, socket_id,
 435                         RING_F_SP_ENQ | RING_F_SC_DEQ);
 436 }
 437
 438 /** Setup a queue pair */
 439 static int
 440 aesni_mb_pmd_qp_setup(struct rte_cryptodev *dev, uint16_t qp_id,
 441                 const struct rte_cryptodev_qp_conf *qp_conf,
 442                 int socket_id, struct rte_mempool *session_pool)
 443 {
 444         struct aesni_mb_qp *qp = NULL;
 445         struct aesni_mb_private *internals = dev->data->dev_private;
 446
 447         /* Free memory prior to re-allocation if needed. */
 448         if (dev->data->queue_pairs[qp_id] != NULL)
 449                 aesni_mb_pmd_qp_release(dev, qp_id);
 450
 451         /* Allocate the queue pair data structure. */
 452         qp = rte_zmalloc_socket("AES-NI PMD Queue Pair", sizeof(*qp),
 453                                         RTE_CACHE_LINE_SIZE, socket_id);
 454         if (qp == NULL)
 455                 return -ENOMEM;
 456
 457         qp->id = qp_id;
 458         dev->data->queue_pairs[qp_id] = qp;
 459
 460         if (aesni_mb_pmd_qp_set_unique_name(dev, qp))
 461                 goto qp_setup_cleanup;
 462
 463
 464         qp->op_fns = &job_ops[internals->vector_mode];
 465
 466         qp->ingress_queue = aesni_mb_pmd_qp_create_processed_ops_ring(qp,
 467                         "ingress", qp_conf->nb_descriptors, socket_id);
 468         if (qp->ingress_queue == NULL)
 469                 goto qp_setup_cleanup;
 470
 471         qp->sess_mp = session_pool;
 472
 473         memset(&qp->stats, 0, sizeof(qp->stats));
 474
 475         char mp_name[RTE_MEMPOOL_NAMESIZE];
 476
 477         snprintf(mp_name, RTE_MEMPOOL_NAMESIZE,
 478                                 "digest_mp_%u_%u", dev->data->dev_id, qp_id);
 479
 480         /* Initialise multi-buffer manager */
 481         (*qp->op_fns->job.init_mgr)(&qp->mb_mgr);
 482         return 0;
 483
 484 qp_setup_cleanup:
 485         if (qp)
 486                 rte_free(qp);
 487
 488         return -1;
 489 }
 490
 491 /** Start queue pair */
 492 static int
 493 aesni_mb_pmd_qp_start(__rte_unused struct rte_cryptodev *dev,
 494                 __rte_unused uint16_t queue_pair_id)
 495 {
 496         return -ENOTSUP;
 497 }
 498
 499 /** Stop queue pair */
 500 static int
 501 aesni_mb_pmd_qp_stop(__rte_unused struct rte_cryptodev *dev,
 502                 __rte_unused uint16_t queue_pair_id)
 503 {
 504         return -ENOTSUP;
 505 }
 506
 507 /** Return the number of allocated queue pairs */
 508 static uint32_t
 509 aesni_mb_pmd_qp_count(struct rte_cryptodev *dev)
 510 {
 511         return dev->data->nb_queue_pairs;
 512 }
 513
 514 /** Returns the size of the aesni multi-buffer session structure */
 515 static unsigned
 516 aesni_mb_pmd_session_get_size(struct rte_cryptodev *dev __rte_unused)
 517 {
 518         return sizeof(struct aesni_mb_session);
 519 }
 520
 521 /** Configure a aesni multi-buffer session from a crypto xform chain */
 522 static int
 523 aesni_mb_pmd_session_configure(struct rte_cryptodev *dev,
 524                 struct rte_crypto_sym_xform *xform,
 525                 struct rte_cryptodev_sym_session *sess,
 526                 struct rte_mempool *mempool)
 527 {
 528         void *sess_private_data;
 529         struct aesni_mb_private *internals = dev->data->dev_private;
 530         int ret;
 531
 532         if (unlikely(sess == NULL)) {
 533                 MB_LOG_ERR("invalid session struct");
 534                 return -EINVAL;
 535         }
 536
 537         if (rte_mempool_get(mempool, &sess_private_data)) {
 538                 CDEV_LOG_ERR(
 539                         "Couldn't get object from session mempool");
 540                 return -ENOMEM;
 541         }
 542
 543         ret = aesni_mb_set_session_parameters(&job_ops[internals->vector_mode],
 544                         sess_private_data, xform);
 545         if (ret != 0) {
 546                 MB_LOG_ERR("failed configure session parameters");
 547
 548                 /* Return session to mempool */
 549                 rte_mempool_put(mempool, sess_private_data);
 550                 return ret;
 551         }
 552
 553         set_session_private_data(sess, dev->driver_id,
 554                         sess_private_data);
 555
 556         return 0;
 557 }
 558
 559 /** Clear the memory of session so it doesn't leave key material behind */
 560 static void
 561 aesni_mb_pmd_session_clear(struct rte_cryptodev *dev,
 562                 struct rte_cryptodev_sym_session *sess)
 563 {
 564         uint8_t index = dev->driver_id;
 565         void *sess_priv = get_session_private_data(sess, index);
 566
 567         /* Zero out the whole structure */
 568         if (sess_priv) {
 569                 memset(sess_priv, 0, sizeof(struct aesni_mb_session));
 570                 struct rte_mempool *sess_mp = rte_mempool_from_obj(sess_priv);
 571                 set_session_private_data(sess, index, NULL);
 572                 rte_mempool_put(sess_mp, sess_priv);
 573         }
 574 }
 575
 576 struct rte_cryptodev_ops aesni_mb_pmd_ops = {
 577                 .dev_configure          = aesni_mb_pmd_config,
 578                 .dev_start              = aesni_mb_pmd_start,
 579                 .dev_stop               = aesni_mb_pmd_stop,
 580                 .dev_close              = aesni_mb_pmd_close,
 581
 582                 .stats_get              = aesni_mb_pmd_stats_get,
 583                 .stats_reset            = aesni_mb_pmd_stats_reset,
 584
 585                 .dev_infos_get          = aesni_mb_pmd_info_get,
 586
 587                 .queue_pair_setup       = aesni_mb_pmd_qp_setup,
 588                 .queue_pair_release     = aesni_mb_pmd_qp_release,
 589                 .queue_pair_start       = aesni_mb_pmd_qp_start,
 590                 .queue_pair_stop        = aesni_mb_pmd_qp_stop,
 591                 .queue_pair_count       = aesni_mb_pmd_qp_count,
 592
 593                 .session_get_size       = aesni_mb_pmd_session_get_size,
 594                 .session_configure      = aesni_mb_pmd_session_configure,
 595                 .session_clear          = aesni_mb_pmd_session_clear
 596 };
 597
 598 struct rte_cryptodev_ops *rte_aesni_mb_pmd_ops = &aesni_mb_pmd_ops;