drivers/crypto/aesni_mb/rte_aesni_mb_pmd_ops.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2015-2017 Intel Corporation
   3  */
   4
   5 #include <string.h>
   6
   7 #include <rte_common.h>
   8 #include <rte_malloc.h>
   9 #include <rte_cryptodev_pmd.h>
  10
  11 #include "rte_aesni_mb_pmd_private.h"
  12
  13
  14 static const struct rte_cryptodev_capabilities aesni_mb_pmd_capabilities[] = {
  15         {       /* MD5 HMAC */
  16                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
  17                 {.sym = {
  18                         .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
  19                         {.auth = {
  20                                 .algo = RTE_CRYPTO_AUTH_MD5_HMAC,
  21                                 .block_size = 64,
  22                                 .key_size = {
  23                                         .min = 1,
  24                                         .max = 64,
  25                                         .increment = 1
  26                                 },
  27                                 .digest_size = {
  28                                         .min = 12,
  29                                         .max = 12,
  30                                         .increment = 0
  31                                 },
  32                                 .iv_size = { 0 }
  33                         }, }
  34                 }, }
  35         },
  36         {       /* SHA1 HMAC */
  37                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
  38                 {.sym = {
  39                         .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
  40                         {.auth = {
  41                                 .algo = RTE_CRYPTO_AUTH_SHA1_HMAC,
  42                                 .block_size = 64,
  43                                 .key_size = {
  44                                         .min = 1,
  45                                         .max = 64,
  46                                         .increment = 1
  47                                 },
  48                                 .digest_size = {
  49                                         .min = 12,
  50                                         .max = 12,
  51                                         .increment = 0
  52                                 },
  53                                 .iv_size = { 0 }
  54                         }, }
  55                 }, }
  56         },
  57         {       /* SHA224 HMAC */
  58                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
  59                 {.sym = {
  60                         .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
  61                         {.auth = {
  62                                 .algo = RTE_CRYPTO_AUTH_SHA224_HMAC,
  63                                 .block_size = 64,
  64                                 .key_size = {
  65                                         .min = 1,
  66                                         .max = 64,
  67                                         .increment = 1
  68                                 },
  69                                 .digest_size = {
  70                                         .min = 14,
  71                                         .max = 14,
  72                                         .increment = 0
  73                                 },
  74                                 .iv_size = { 0 }
  75                         }, }
  76                 }, }
  77         },
  78         {       /* SHA256 HMAC */
  79                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
  80                 {.sym = {
  81                         .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
  82                         {.auth = {
  83                                 .algo = RTE_CRYPTO_AUTH_SHA256_HMAC,
  84                                 .block_size = 64,
  85                                 .key_size = {
  86                                         .min = 1,
  87                                         .max = 64,
  88                                         .increment = 1
  89                                 },
  90                                 .digest_size = {
  91                                         .min = 16,
  92                                         .max = 16,
  93                                         .increment = 0
  94                                 },
  95                                 .iv_size = { 0 }
  96                         }, }
  97                 }, }
  98         },
  99         {       /* SHA384 HMAC */
 100                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 101                 {.sym = {
 102                         .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
 103                         {.auth = {
 104                                 .algo = RTE_CRYPTO_AUTH_SHA384_HMAC,
 105                                 .block_size = 128,
 106                                 .key_size = {
 107                                         .min = 1,
 108                                         .max = 128,
 109                                         .increment = 1
 110                                 },
 111                                 .digest_size = {
 112                                         .min = 24,
 113                                         .max = 24,
 114                                         .increment = 0
 115                                 },
 116                                 .iv_size = { 0 }
 117                         }, }
 118                 }, }
 119         },
 120         {       /* SHA512 HMAC */
 121                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 122                 {.sym = {
 123                         .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
 124                         {.auth = {
 125                                 .algo = RTE_CRYPTO_AUTH_SHA512_HMAC,
 126                                 .block_size = 128,
 127                                 .key_size = {
 128                                         .min = 1,
 129                                         .max = 128,
 130                                         .increment = 1
 131                                 },
 132                                 .digest_size = {
 133                                         .min = 32,
 134                                         .max = 32,
 135                                         .increment = 0
 136                                 },
 137                                 .iv_size = { 0 }
 138                         }, }
 139                 }, }
 140         },
 141         {       /* AES XCBC HMAC */
 142                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 143                 {.sym = {
 144                         .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
 145                         {.auth = {
 146                                 .algo = RTE_CRYPTO_AUTH_AES_XCBC_MAC,
 147                                 .block_size = 16,
 148                                 .key_size = {
 149                                         .min = 16,
 150                                         .max = 16,
 151                                         .increment = 0
 152                                 },
 153                                 .digest_size = {
 154                                         .min = 12,
 155                                         .max = 12,
 156                                         .increment = 0
 157                                 },
 158                                 .iv_size = { 0 }
 159                         }, }
 160                 }, }
 161         },
 162         {       /* AES CBC */
 163                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 164                 {.sym = {
 165                         .xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,
 166                         {.cipher = {
 167                                 .algo = RTE_CRYPTO_CIPHER_AES_CBC,
 168                                 .block_size = 16,
 169                                 .key_size = {
 170                                         .min = 16,
 171                                         .max = 32,
 172                                         .increment = 8
 173                                 },
 174                                 .iv_size = {
 175                                         .min = 16,
 176                                         .max = 16,
 177                                         .increment = 0
 178                                 }
 179                         }, }
 180                 }, }
 181         },
 182         {       /* AES CTR */
 183                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 184                 {.sym = {
 185                         .xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,
 186                         {.cipher = {
 187                                 .algo = RTE_CRYPTO_CIPHER_AES_CTR,
 188                                 .block_size = 16,
 189                                 .key_size = {
 190                                         .min = 16,
 191                                         .max = 32,
 192                                         .increment = 8
 193                                 },
 194                                 .iv_size = {
 195                                         .min = 12,
 196                                         .max = 16,
 197                                         .increment = 4
 198                                 }
 199                         }, }
 200                 }, }
 201         },
 202         {       /* AES DOCSIS BPI */
 203                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 204                 {.sym = {
 205                         .xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,
 206                         {.cipher = {
 207                                 .algo = RTE_CRYPTO_CIPHER_AES_DOCSISBPI,
 208                                 .block_size = 16,
 209                                 .key_size = {
 210                                         .min = 16,
 211                                         .max = 16,
 212                                         .increment = 0
 213                                 },
 214                                 .iv_size = {
 215                                         .min = 16,
 216                                         .max = 16,
 217                                         .increment = 0
 218                                 }
 219                         }, }
 220                 }, }
 221         },
 222         {       /* DES CBC */
 223                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 224                 {.sym = {
 225                         .xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,
 226                         {.cipher = {
 227                                 .algo = RTE_CRYPTO_CIPHER_DES_CBC,
 228                                 .block_size = 8,
 229                                 .key_size = {
 230                                         .min = 8,
 231                                         .max = 8,
 232                                         .increment = 0
 233                                 },
 234                                 .iv_size = {
 235                                         .min = 8,
 236                                         .max = 8,
 237                                         .increment = 0
 238                                 }
 239                         }, }
 240                 }, }
 241         },
 242         {       /* DES DOCSIS BPI */
 243                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 244                 {.sym = {
 245                         .xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,
 246                         {.cipher = {
 247                                 .algo = RTE_CRYPTO_CIPHER_DES_DOCSISBPI,
 248                                 .block_size = 8,
 249                                 .key_size = {
 250                                         .min = 8,
 251                                         .max = 8,
 252                                         .increment = 0
 253                                 },
 254                                 .iv_size = {
 255                                         .min = 8,
 256                                         .max = 8,
 257                                         .increment = 0
 258                                 }
 259                         }, }
 260                 }, }
 261         },
 262         {       /* AES CCM */
 263                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 264                 {.sym = {
 265                         .xform_type = RTE_CRYPTO_SYM_XFORM_AEAD,
 266                         {.aead = {
 267                                 .algo = RTE_CRYPTO_AEAD_AES_CCM,
 268                                 .block_size = 16,
 269                                 .key_size = {
 270                                         .min = 16,
 271                                         .max = 16,
 272                                         .increment = 0
 273                                 },
 274                                 .digest_size = {
 275                                         .min = 4,
 276                                         .max = 16,
 277                                         .increment = 2
 278                                 },
 279                                 .aad_size = {
 280                                         .min = 0,
 281                                         .max = 46,
 282                                         .increment = 1
 283                                 },
 284                                 .iv_size = {
 285                                         .min = 7,
 286                                         .max = 13,
 287                                         .increment = 1
 288                                 },
 289                         }, }
 290                 }, }
 291         },
 292
 293
 294         RTE_CRYPTODEV_END_OF_CAPABILITIES_LIST()
 295 };
 296
 297
 298 /** Configure device */
 299 static int
 300 aesni_mb_pmd_config(__rte_unused struct rte_cryptodev *dev,
 301                 __rte_unused struct rte_cryptodev_config *config)
 302 {
 303         return 0;
 304 }
 305
 306 /** Start device */
 307 static int
 308 aesni_mb_pmd_start(__rte_unused struct rte_cryptodev *dev)
 309 {
 310         return 0;
 311 }
 312
 313 /** Stop device */
 314 static void
 315 aesni_mb_pmd_stop(__rte_unused struct rte_cryptodev *dev)
 316 {
 317 }
 318
 319 /** Close device */
 320 static int
 321 aesni_mb_pmd_close(__rte_unused struct rte_cryptodev *dev)
 322 {
 323         return 0;
 324 }
 325
 326
 327 /** Get device statistics */
 328 static void
 329 aesni_mb_pmd_stats_get(struct rte_cryptodev *dev,
 330                 struct rte_cryptodev_stats *stats)
 331 {
 332         int qp_id;
 333
 334         for (qp_id = 0; qp_id < dev->data->nb_queue_pairs; qp_id++) {
 335                 struct aesni_mb_qp *qp = dev->data->queue_pairs[qp_id];
 336
 337                 stats->enqueued_count += qp->stats.enqueued_count;
 338                 stats->dequeued_count += qp->stats.dequeued_count;
 339
 340                 stats->enqueue_err_count += qp->stats.enqueue_err_count;
 341                 stats->dequeue_err_count += qp->stats.dequeue_err_count;
 342         }
 343 }
 344
 345 /** Reset device statistics */
 346 static void
 347 aesni_mb_pmd_stats_reset(struct rte_cryptodev *dev)
 348 {
 349         int qp_id;
 350
 351         for (qp_id = 0; qp_id < dev->data->nb_queue_pairs; qp_id++) {
 352                 struct aesni_mb_qp *qp = dev->data->queue_pairs[qp_id];
 353
 354                 memset(&qp->stats, 0, sizeof(qp->stats));
 355         }
 356 }
 357
 358
 359 /** Get device info */
 360 static void
 361 aesni_mb_pmd_info_get(struct rte_cryptodev *dev,
 362                 struct rte_cryptodev_info *dev_info)
 363 {
 364         struct aesni_mb_private *internals = dev->data->dev_private;
 365
 366         if (dev_info != NULL) {
 367                 dev_info->driver_id = dev->driver_id;
 368                 dev_info->feature_flags = dev->feature_flags;
 369                 dev_info->capabilities = aesni_mb_pmd_capabilities;
 370                 dev_info->max_nb_queue_pairs = internals->max_nb_queue_pairs;
 371                 dev_info->sym.max_nb_sessions = internals->max_nb_sessions;
 372         }
 373 }
 374
 375 /** Release queue pair */
 376 static int
 377 aesni_mb_pmd_qp_release(struct rte_cryptodev *dev, uint16_t qp_id)
 378 {
 379         struct aesni_mb_qp *qp = dev->data->queue_pairs[qp_id];
 380         struct rte_ring *r = NULL;
 381
 382         if (qp != NULL) {
 383                 r = rte_ring_lookup(qp->name);
 384                 if (r)
 385                         rte_ring_free(r);
 386                 rte_free(qp);
 387                 dev->data->queue_pairs[qp_id] = NULL;
 388         }
 389         return 0;
 390 }
 391
 392 /** set a unique name for the queue pair based on it's name, dev_id and qp_id */
 393 static int
 394 aesni_mb_pmd_qp_set_unique_name(struct rte_cryptodev *dev,
 395                 struct aesni_mb_qp *qp)
 396 {
 397         unsigned n = snprintf(qp->name, sizeof(qp->name),
 398                         "aesni_mb_pmd_%u_qp_%u",
 399                         dev->data->dev_id, qp->id);
 400
 401         if (n >= sizeof(qp->name))
 402                 return -1;
 403
 404         return 0;
 405 }
 406
 407 /** Create a ring to place processed operations on */
 408 static struct rte_ring *
 409 aesni_mb_pmd_qp_create_processed_ops_ring(struct aesni_mb_qp *qp,
 410                 const char *str, unsigned int ring_size, int socket_id)
 411 {
 412         struct rte_ring *r;
 413         char ring_name[RTE_CRYPTODEV_NAME_MAX_LEN];
 414
 415         unsigned int n = snprintf(ring_name, sizeof(ring_name),
 416                                 "%s_%s",
 417                                 qp->name, str);
 418
 419         if (n >= sizeof(ring_name))
 420                 return NULL;
 421
 422         r = rte_ring_lookup(ring_name);
 423         if (r) {
 424                 if (rte_ring_get_size(r) >= ring_size) {
 425                         MB_LOG_INFO("Reusing existing ring %s for processed ops",
 426                         ring_name);
 427                         return r;
 428                 }
 429
 430                 MB_LOG_ERR("Unable to reuse existing ring %s for processed ops",
 431                         ring_name);
 432                 return NULL;
 433         }
 434
 435         return rte_ring_create(ring_name, ring_size, socket_id,
 436                         RING_F_SP_ENQ | RING_F_SC_DEQ);
 437 }
 438
 439 /** Setup a queue pair */
 440 static int
 441 aesni_mb_pmd_qp_setup(struct rte_cryptodev *dev, uint16_t qp_id,
 442                 const struct rte_cryptodev_qp_conf *qp_conf,
 443                 int socket_id, struct rte_mempool *session_pool)
 444 {
 445         struct aesni_mb_qp *qp = NULL;
 446         struct aesni_mb_private *internals = dev->data->dev_private;
 447
 448         /* Free memory prior to re-allocation if needed. */
 449         if (dev->data->queue_pairs[qp_id] != NULL)
 450                 aesni_mb_pmd_qp_release(dev, qp_id);
 451
 452         /* Allocate the queue pair data structure. */
 453         qp = rte_zmalloc_socket("AES-NI PMD Queue Pair", sizeof(*qp),
 454                                         RTE_CACHE_LINE_SIZE, socket_id);
 455         if (qp == NULL)
 456                 return -ENOMEM;
 457
 458         qp->id = qp_id;
 459         dev->data->queue_pairs[qp_id] = qp;
 460
 461         if (aesni_mb_pmd_qp_set_unique_name(dev, qp))
 462                 goto qp_setup_cleanup;
 463
 464
 465         qp->op_fns = &job_ops[internals->vector_mode];
 466
 467         qp->ingress_queue = aesni_mb_pmd_qp_create_processed_ops_ring(qp,
 468                         "ingress", qp_conf->nb_descriptors, socket_id);
 469         if (qp->ingress_queue == NULL)
 470                 goto qp_setup_cleanup;
 471
 472         qp->sess_mp = session_pool;
 473
 474         memset(&qp->stats, 0, sizeof(qp->stats));
 475
 476         char mp_name[RTE_MEMPOOL_NAMESIZE];
 477
 478         snprintf(mp_name, RTE_MEMPOOL_NAMESIZE,
 479                                 "digest_mp_%u_%u", dev->data->dev_id, qp_id);
 480
 481         /* Initialise multi-buffer manager */
 482         (*qp->op_fns->job.init_mgr)(&qp->mb_mgr);
 483         return 0;
 484
 485 qp_setup_cleanup:
 486         if (qp)
 487                 rte_free(qp);
 488
 489         return -1;
 490 }
 491
 492 /** Start queue pair */
 493 static int
 494 aesni_mb_pmd_qp_start(__rte_unused struct rte_cryptodev *dev,
 495                 __rte_unused uint16_t queue_pair_id)
 496 {
 497         return -ENOTSUP;
 498 }
 499
 500 /** Stop queue pair */
 501 static int
 502 aesni_mb_pmd_qp_stop(__rte_unused struct rte_cryptodev *dev,
 503                 __rte_unused uint16_t queue_pair_id)
 504 {
 505         return -ENOTSUP;
 506 }
 507
 508 /** Return the number of allocated queue pairs */
 509 static uint32_t
 510 aesni_mb_pmd_qp_count(struct rte_cryptodev *dev)
 511 {
 512         return dev->data->nb_queue_pairs;
 513 }
 514
 515 /** Returns the size of the aesni multi-buffer session structure */
 516 static unsigned
 517 aesni_mb_pmd_session_get_size(struct rte_cryptodev *dev __rte_unused)
 518 {
 519         return sizeof(struct aesni_mb_session);
 520 }
 521
 522 /** Configure a aesni multi-buffer session from a crypto xform chain */
 523 static int
 524 aesni_mb_pmd_session_configure(struct rte_cryptodev *dev,
 525                 struct rte_crypto_sym_xform *xform,
 526                 struct rte_cryptodev_sym_session *sess,
 527                 struct rte_mempool *mempool)
 528 {
 529         void *sess_private_data;
 530         struct aesni_mb_private *internals = dev->data->dev_private;
 531         int ret;
 532
 533         if (unlikely(sess == NULL)) {
 534                 MB_LOG_ERR("invalid session struct");
 535                 return -EINVAL;
 536         }
 537
 538         if (rte_mempool_get(mempool, &sess_private_data)) {
 539                 CDEV_LOG_ERR(
 540                         "Couldn't get object from session mempool");
 541                 return -ENOMEM;
 542         }
 543
 544         ret = aesni_mb_set_session_parameters(&job_ops[internals->vector_mode],
 545                         sess_private_data, xform);
 546         if (ret != 0) {
 547                 MB_LOG_ERR("failed configure session parameters");
 548
 549                 /* Return session to mempool */
 550                 rte_mempool_put(mempool, sess_private_data);
 551                 return ret;
 552         }
 553
 554         set_session_private_data(sess, dev->driver_id,
 555                         sess_private_data);
 556
 557         return 0;
 558 }
 559
 560 /** Clear the memory of session so it doesn't leave key material behind */
 561 static void
 562 aesni_mb_pmd_session_clear(struct rte_cryptodev *dev,
 563                 struct rte_cryptodev_sym_session *sess)
 564 {
 565         uint8_t index = dev->driver_id;
 566         void *sess_priv = get_session_private_data(sess, index);
 567
 568         /* Zero out the whole structure */
 569         if (sess_priv) {
 570                 memset(sess_priv, 0, sizeof(struct aesni_mb_session));
 571                 struct rte_mempool *sess_mp = rte_mempool_from_obj(sess_priv);
 572                 set_session_private_data(sess, index, NULL);
 573                 rte_mempool_put(sess_mp, sess_priv);
 574         }
 575 }
 576
 577 struct rte_cryptodev_ops aesni_mb_pmd_ops = {
 578                 .dev_configure          = aesni_mb_pmd_config,
 579                 .dev_start              = aesni_mb_pmd_start,
 580                 .dev_stop               = aesni_mb_pmd_stop,
 581                 .dev_close              = aesni_mb_pmd_close,
 582
 583                 .stats_get              = aesni_mb_pmd_stats_get,
 584                 .stats_reset            = aesni_mb_pmd_stats_reset,
 585
 586                 .dev_infos_get          = aesni_mb_pmd_info_get,
 587
 588                 .queue_pair_setup       = aesni_mb_pmd_qp_setup,
 589                 .queue_pair_release     = aesni_mb_pmd_qp_release,
 590                 .queue_pair_start       = aesni_mb_pmd_qp_start,
 591                 .queue_pair_stop        = aesni_mb_pmd_qp_stop,
 592                 .queue_pair_count       = aesni_mb_pmd_qp_count,
 593
 594                 .session_get_size       = aesni_mb_pmd_session_get_size,
 595                 .session_configure      = aesni_mb_pmd_session_configure,
 596                 .session_clear          = aesni_mb_pmd_session_clear
 597 };
 598
 599 struct rte_cryptodev_ops *rte_aesni_mb_pmd_ops = &aesni_mb_pmd_ops;