drivers/crypto/aesni_mb/rte_aesni_mb_pmd_ops.c

   1 /*-
   2  *   BSD LICENSE
   3  *
   4  *   Copyright(c) 2015-2016 Intel Corporation. All rights reserved.
   5  *
   6  *   Redistribution and use in source and binary forms, with or without
   7  *   modification, are permitted provided that the following conditions
   8  *   are met:
   9  *
  10  *     * Redistributions of source code must retain the above copyright
  11  *       notice, this list of conditions and the following disclaimer.
  12  *     * Redistributions in binary form must reproduce the above copyright
  13  *       notice, this list of conditions and the following disclaimer in
  14  *       the documentation and/or other materials provided with the
  15  *       distribution.
  16  *     * Neither the name of Intel Corporation nor the names of its
  17  *       contributors may be used to endorse or promote products derived
  18  *       from this software without specific prior written permission.
  19  *
  20  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  21  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  22  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  23  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  24  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  25  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  26  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  27  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  28  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  29  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  30  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  31  */
  32
  33 #include <string.h>
  34
  35 #include <rte_common.h>
  36 #include <rte_malloc.h>
  37 #include <rte_cryptodev_pmd.h>
  38
  39 #include "rte_aesni_mb_pmd_private.h"
  40
  41
  42 static const struct rte_cryptodev_capabilities aesni_mb_pmd_capabilities[] = {
  43         {       /* MD5 HMAC */
  44                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
  45                 {.sym = {
  46                         .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
  47                         {.auth = {
  48                                 .algo = RTE_CRYPTO_AUTH_MD5_HMAC,
  49                                 .block_size = 64,
  50                                 .key_size = {
  51                                         .min = 64,
  52                                         .max = 64,
  53                                         .increment = 0
  54                                 },
  55                                 .digest_size = {
  56                                         .min = 12,
  57                                         .max = 12,
  58                                         .increment = 0
  59                                 },
  60                                 .aad_size = { 0 }
  61                         }, }
  62                 }, }
  63         },
  64         {       /* SHA1 HMAC */
  65                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
  66                 {.sym = {
  67                         .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
  68                         {.auth = {
  69                                 .algo = RTE_CRYPTO_AUTH_SHA1_HMAC,
  70                                 .block_size = 64,
  71                                 .key_size = {
  72                                         .min = 64,
  73                                         .max = 64,
  74                                         .increment = 0
  75                                 },
  76                                 .digest_size = {
  77                                         .min = 12,
  78                                         .max = 12,
  79                                         .increment = 0
  80                                 },
  81                                 .aad_size = { 0 }
  82                         }, }
  83                 }, }
  84         },
  85         {       /* SHA224 HMAC */
  86                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
  87                 {.sym = {
  88                         .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
  89                         {.auth = {
  90                                 .algo = RTE_CRYPTO_AUTH_SHA224_HMAC,
  91                                 .block_size = 64,
  92                                 .key_size = {
  93                                         .min = 64,
  94                                         .max = 64,
  95                                         .increment = 0
  96                                 },
  97                                 .digest_size = {
  98                                         .min = 14,
  99                                         .max = 14,
 100                                         .increment = 0
 101                                 },
 102                                 .aad_size = { 0 }
 103                         }, }
 104                 }, }
 105         },
 106         {       /* SHA256 HMAC */
 107                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 108                 {.sym = {
 109                         .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
 110                         {.auth = {
 111                                 .algo = RTE_CRYPTO_AUTH_SHA256_HMAC,
 112                                 .block_size = 64,
 113                                 .key_size = {
 114                                         .min = 64,
 115                                         .max = 64,
 116                                         .increment = 0
 117                                 },
 118                                 .digest_size = {
 119                                         .min = 16,
 120                                         .max = 16,
 121                                         .increment = 0
 122                                 },
 123                                 .aad_size = { 0 }
 124                         }, }
 125                 }, }
 126         },
 127         {       /* SHA384 HMAC */
 128                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 129                 {.sym = {
 130                         .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
 131                         {.auth = {
 132                                 .algo = RTE_CRYPTO_AUTH_SHA384_HMAC,
 133                                 .block_size = 128,
 134                                 .key_size = {
 135                                         .min = 128,
 136                                         .max = 128,
 137                                         .increment = 0
 138                                 },
 139                                 .digest_size = {
 140                                         .min = 24,
 141                                         .max = 24,
 142                                         .increment = 0
 143                                 },
 144                                 .aad_size = { 0 }
 145                         }, }
 146                 }, }
 147         },
 148         {       /* SHA512 HMAC */
 149                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 150                 {.sym = {
 151                         .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
 152                         {.auth = {
 153                                 .algo = RTE_CRYPTO_AUTH_SHA512_HMAC,
 154                                 .block_size = 128,
 155                                 .key_size = {
 156                                         .min = 128,
 157                                         .max = 128,
 158                                         .increment = 0
 159                                 },
 160                                 .digest_size = {
 161                                         .min = 32,
 162                                         .max = 32,
 163                                         .increment = 0
 164                                 },
 165                                 .aad_size = { 0 }
 166                         }, }
 167                 }, }
 168         },
 169         {       /* AES XCBC HMAC */
 170                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 171                 {.sym = {
 172                         .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
 173                         {.auth = {
 174                                 .algo = RTE_CRYPTO_AUTH_AES_XCBC_MAC,
 175                                 .block_size = 16,
 176                                 .key_size = {
 177                                         .min = 16,
 178                                         .max = 16,
 179                                         .increment = 0
 180                                 },
 181                                 .digest_size = {
 182                                         .min = 12,
 183                                         .max = 12,
 184                                         .increment = 0
 185                                 },
 186                                 .aad_size = { 0 }
 187                         }, }
 188                 }, }
 189         },
 190         {       /* AES CBC */
 191                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 192                 {.sym = {
 193                         .xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,
 194                         {.cipher = {
 195                                 .algo = RTE_CRYPTO_CIPHER_AES_CBC,
 196                                 .block_size = 16,
 197                                 .key_size = {
 198                                         .min = 16,
 199                                         .max = 32,
 200                                         .increment = 8
 201                                 },
 202                                 .iv_size = {
 203                                         .min = 16,
 204                                         .max = 16,
 205                                         .increment = 0
 206                                 }
 207                         }, }
 208                 }, }
 209         },
 210         {       /* AES CTR */
 211                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 212                 {.sym = {
 213                         .xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,
 214                         {.cipher = {
 215                                 .algo = RTE_CRYPTO_CIPHER_AES_CTR,
 216                                 .block_size = 16,
 217                                 .key_size = {
 218                                         .min = 16,
 219                                         .max = 32,
 220                                         .increment = 8
 221                                 },
 222                                 .iv_size = {
 223                                         .min = 16,
 224                                         .max = 16,
 225                                         .increment = 0
 226                                 }
 227                         }, }
 228                 }, }
 229         },
 230         RTE_CRYPTODEV_END_OF_CAPABILITIES_LIST()
 231 };
 232
 233
 234 /** Configure device */
 235 static int
 236 aesni_mb_pmd_config(__rte_unused struct rte_cryptodev *dev)
 237 {
 238         return 0;
 239 }
 240
 241 /** Start device */
 242 static int
 243 aesni_mb_pmd_start(__rte_unused struct rte_cryptodev *dev)
 244 {
 245         return 0;
 246 }
 247
 248 /** Stop device */
 249 static void
 250 aesni_mb_pmd_stop(__rte_unused struct rte_cryptodev *dev)
 251 {
 252 }
 253
 254 /** Close device */
 255 static int
 256 aesni_mb_pmd_close(__rte_unused struct rte_cryptodev *dev)
 257 {
 258         return 0;
 259 }
 260
 261
 262 /** Get device statistics */
 263 static void
 264 aesni_mb_pmd_stats_get(struct rte_cryptodev *dev,
 265                 struct rte_cryptodev_stats *stats)
 266 {
 267         int qp_id;
 268
 269         for (qp_id = 0; qp_id < dev->data->nb_queue_pairs; qp_id++) {
 270                 struct aesni_mb_qp *qp = dev->data->queue_pairs[qp_id];
 271
 272                 stats->enqueued_count += qp->stats.enqueued_count;
 273                 stats->dequeued_count += qp->stats.dequeued_count;
 274
 275                 stats->enqueue_err_count += qp->stats.enqueue_err_count;
 276                 stats->dequeue_err_count += qp->stats.dequeue_err_count;
 277         }
 278 }
 279
 280 /** Reset device statistics */
 281 static void
 282 aesni_mb_pmd_stats_reset(struct rte_cryptodev *dev)
 283 {
 284         int qp_id;
 285
 286         for (qp_id = 0; qp_id < dev->data->nb_queue_pairs; qp_id++) {
 287                 struct aesni_mb_qp *qp = dev->data->queue_pairs[qp_id];
 288
 289                 memset(&qp->stats, 0, sizeof(qp->stats));
 290         }
 291 }
 292
 293
 294 /** Get device info */
 295 static void
 296 aesni_mb_pmd_info_get(struct rte_cryptodev *dev,
 297                 struct rte_cryptodev_info *dev_info)
 298 {
 299         struct aesni_mb_private *internals = dev->data->dev_private;
 300
 301         if (dev_info != NULL) {
 302                 dev_info->dev_type = dev->dev_type;
 303                 dev_info->feature_flags = dev->feature_flags;
 304                 dev_info->capabilities = aesni_mb_pmd_capabilities;
 305                 dev_info->max_nb_queue_pairs = internals->max_nb_queue_pairs;
 306                 dev_info->sym.max_nb_sessions = internals->max_nb_sessions;
 307         }
 308 }
 309
 310 /** Release queue pair */
 311 static int
 312 aesni_mb_pmd_qp_release(struct rte_cryptodev *dev, uint16_t qp_id)
 313 {
 314         if (dev->data->queue_pairs[qp_id] != NULL) {
 315                 rte_free(dev->data->queue_pairs[qp_id]);
 316                 dev->data->queue_pairs[qp_id] = NULL;
 317         }
 318         return 0;
 319 }
 320
 321 /** set a unique name for the queue pair based on it's name, dev_id and qp_id */
 322 static int
 323 aesni_mb_pmd_qp_set_unique_name(struct rte_cryptodev *dev,
 324                 struct aesni_mb_qp *qp)
 325 {
 326         unsigned n = snprintf(qp->name, sizeof(qp->name),
 327                         "aesni_mb_pmd_%u_qp_%u",
 328                         dev->data->dev_id, qp->id);
 329
 330         if (n > sizeof(qp->name))
 331                 return -1;
 332
 333         return 0;
 334 }
 335
 336 /** Create a ring to place processed operations on */
 337 static struct rte_ring *
 338 aesni_mb_pmd_qp_create_processed_ops_ring(struct aesni_mb_qp *qp,
 339                 unsigned ring_size, int socket_id)
 340 {
 341         struct rte_ring *r;
 342
 343         r = rte_ring_lookup(qp->name);
 344         if (r) {
 345                 if (r->prod.size >= ring_size) {
 346                         MB_LOG_INFO("Reusing existing ring %s for processed ops",
 347                                          qp->name);
 348                         return r;
 349                 }
 350
 351                 MB_LOG_ERR("Unable to reuse existing ring %s for processed ops",
 352                                  qp->name);
 353                 return NULL;
 354         }
 355
 356         return rte_ring_create(qp->name, ring_size, socket_id,
 357                         RING_F_SP_ENQ | RING_F_SC_DEQ);
 358 }
 359
 360 /** Setup a queue pair */
 361 static int
 362 aesni_mb_pmd_qp_setup(struct rte_cryptodev *dev, uint16_t qp_id,
 363                 const struct rte_cryptodev_qp_conf *qp_conf,
 364                  int socket_id)
 365 {
 366         struct aesni_mb_qp *qp = NULL;
 367         struct aesni_mb_private *internals = dev->data->dev_private;
 368
 369         /* Free memory prior to re-allocation if needed. */
 370         if (dev->data->queue_pairs[qp_id] != NULL)
 371                 aesni_mb_pmd_qp_release(dev, qp_id);
 372
 373         /* Allocate the queue pair data structure. */
 374         qp = rte_zmalloc_socket("AES-NI PMD Queue Pair", sizeof(*qp),
 375                                         RTE_CACHE_LINE_SIZE, socket_id);
 376         if (qp == NULL)
 377                 return -ENOMEM;
 378
 379         qp->id = qp_id;
 380         dev->data->queue_pairs[qp_id] = qp;
 381
 382         if (aesni_mb_pmd_qp_set_unique_name(dev, qp))
 383                 goto qp_setup_cleanup;
 384
 385         qp->ops = &job_ops[internals->vector_mode];
 386
 387         qp->processed_ops = aesni_mb_pmd_qp_create_processed_ops_ring(qp,
 388                         qp_conf->nb_descriptors, socket_id);
 389         if (qp->processed_ops == NULL)
 390                 goto qp_setup_cleanup;
 391
 392         qp->sess_mp = dev->data->session_pool;
 393
 394         memset(&qp->stats, 0, sizeof(qp->stats));
 395
 396         /* Initialise multi-buffer manager */
 397         (*qp->ops->job.init_mgr)(&qp->mb_mgr);
 398
 399         return 0;
 400
 401 qp_setup_cleanup:
 402         if (qp)
 403                 rte_free(qp);
 404
 405         return -1;
 406 }
 407
 408 /** Start queue pair */
 409 static int
 410 aesni_mb_pmd_qp_start(__rte_unused struct rte_cryptodev *dev,
 411                 __rte_unused uint16_t queue_pair_id)
 412 {
 413         return -ENOTSUP;
 414 }
 415
 416 /** Stop queue pair */
 417 static int
 418 aesni_mb_pmd_qp_stop(__rte_unused struct rte_cryptodev *dev,
 419                 __rte_unused uint16_t queue_pair_id)
 420 {
 421         return -ENOTSUP;
 422 }
 423
 424 /** Return the number of allocated queue pairs */
 425 static uint32_t
 426 aesni_mb_pmd_qp_count(struct rte_cryptodev *dev)
 427 {
 428         return dev->data->nb_queue_pairs;
 429 }
 430
 431 /** Returns the size of the aesni multi-buffer session structure */
 432 static unsigned
 433 aesni_mb_pmd_session_get_size(struct rte_cryptodev *dev __rte_unused)
 434 {
 435         return sizeof(struct aesni_mb_session);
 436 }
 437
 438 /** Configure a aesni multi-buffer session from a crypto xform chain */
 439 static void *
 440 aesni_mb_pmd_session_configure(struct rte_cryptodev *dev,
 441                 struct rte_crypto_sym_xform *xform,     void *sess)
 442 {
 443         struct aesni_mb_private *internals = dev->data->dev_private;
 444
 445         if (unlikely(sess == NULL)) {
 446                 MB_LOG_ERR("invalid session struct");
 447                 return NULL;
 448         }
 449
 450         if (aesni_mb_set_session_parameters(&job_ops[internals->vector_mode],
 451                         sess, xform) != 0) {
 452                 MB_LOG_ERR("failed configure session parameters");
 453                 return NULL;
 454         }
 455
 456         return sess;
 457 }
 458
 459 /** Clear the memory of session so it doesn't leave key material behind */
 460 static void
 461 aesni_mb_pmd_session_clear(struct rte_cryptodev *dev __rte_unused, void *sess)
 462 {
 463         /*
 464          * Current just resetting the whole data structure, need to investigate
 465          * whether a more selective reset of key would be more performant
 466          */
 467         if (sess)
 468                 memset(sess, 0, sizeof(struct aesni_mb_session));
 469 }
 470
 471 struct rte_cryptodev_ops aesni_mb_pmd_ops = {
 472                 .dev_configure          = aesni_mb_pmd_config,
 473                 .dev_start              = aesni_mb_pmd_start,
 474                 .dev_stop               = aesni_mb_pmd_stop,
 475                 .dev_close              = aesni_mb_pmd_close,
 476
 477                 .stats_get              = aesni_mb_pmd_stats_get,
 478                 .stats_reset            = aesni_mb_pmd_stats_reset,
 479
 480                 .dev_infos_get          = aesni_mb_pmd_info_get,
 481
 482                 .queue_pair_setup       = aesni_mb_pmd_qp_setup,
 483                 .queue_pair_release     = aesni_mb_pmd_qp_release,
 484                 .queue_pair_start       = aesni_mb_pmd_qp_start,
 485                 .queue_pair_stop        = aesni_mb_pmd_qp_stop,
 486                 .queue_pair_count       = aesni_mb_pmd_qp_count,
 487
 488                 .session_get_size       = aesni_mb_pmd_session_get_size,
 489                 .session_configure      = aesni_mb_pmd_session_configure,
 490                 .session_clear          = aesni_mb_pmd_session_clear
 491 };
 492
 493 struct rte_cryptodev_ops *rte_aesni_mb_pmd_ops = &aesni_mb_pmd_ops;