drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c

   1 /*-
   2  *   BSD LICENSE
   3  *
   4  *   Copyright (c) 2016 Freescale Semiconductor, Inc. All rights reserved.
   5  *   Copyright 2016 NXP.
   6  *
   7  *   Redistribution and use in source and binary forms, with or without
   8  *   modification, are permitted provided that the following conditions
   9  *   are met:
  10  *
  11  *     * Redistributions of source code must retain the above copyright
  12  *       notice, this list of conditions and the following disclaimer.
  13  *     * Redistributions in binary form must reproduce the above copyright
  14  *       notice, this list of conditions and the following disclaimer in
  15  *       the documentation and/or other materials provided with the
  16  *       distribution.
  17  *     * Neither the name of  Freescale Semiconductor, Inc nor the names of its
  18  *       contributors may be used to endorse or promote products derived
  19  *       from this software without specific prior written permission.
  20  *
  21  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  22  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  23  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  24  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  25  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  26  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  27  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  28  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  29  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32  */
  33
  34 #include <time.h>
  35 #include <net/if.h>
  36
  37 #include <rte_mbuf.h>
  38 #include <rte_cryptodev.h>
  39 #include <rte_security_driver.h>
  40 #include <rte_malloc.h>
  41 #include <rte_memcpy.h>
  42 #include <rte_string_fns.h>
  43 #include <rte_cycles.h>
  44 #include <rte_kvargs.h>
  45 #include <rte_dev.h>
  46 #include <rte_cryptodev_pmd.h>
  47 #include <rte_common.h>
  48 #include <rte_fslmc.h>
  49 #include <fslmc_vfio.h>
  50 #include <dpaa2_hw_pvt.h>
  51 #include <dpaa2_hw_dpio.h>
  52 #include <dpaa2_hw_mempool.h>
  53 #include <fsl_dpseci.h>
  54 #include <fsl_mc_sys.h>
  55
  56 #include "dpaa2_sec_priv.h"
  57 #include "dpaa2_sec_logs.h"
  58
  59 /* RTA header files */
  60 #include <hw/desc/ipsec.h>
  61 #include <hw/desc/algo.h>
  62
  63 /* Minimum job descriptor consists of a oneword job descriptor HEADER and
  64  * a pointer to the shared descriptor
  65  */
  66 #define MIN_JOB_DESC_SIZE       (CAAM_CMD_SZ + CAAM_PTR_SZ)
  67 #define FSL_VENDOR_ID           0x1957
  68 #define FSL_DEVICE_ID           0x410
  69 #define FSL_SUBSYSTEM_SEC       1
  70 #define FSL_MC_DPSECI_DEVID     3
  71
  72 #define NO_PREFETCH 0
  73 /* FLE_POOL_NUM_BUFS is set as per the ipsec-secgw application */
  74 #define FLE_POOL_NUM_BUFS       32000
  75 #define FLE_POOL_BUF_SIZE       256
  76 #define FLE_POOL_CACHE_SIZE     512
  77 #define SEC_FLC_DHR_OUTBOUND    -114
  78 #define SEC_FLC_DHR_INBOUND     0
  79
  80 enum rta_sec_era rta_sec_era = RTA_SEC_ERA_8;
  81
  82 static uint8_t cryptodev_driver_id;
  83
  84 static inline int
  85 build_proto_fd(dpaa2_sec_session *sess,
  86                struct rte_crypto_op *op,
  87                struct qbman_fd *fd, uint16_t bpid)
  88 {
  89         struct rte_crypto_sym_op *sym_op = op->sym;
  90         struct ctxt_priv *priv = sess->ctxt;
  91         struct sec_flow_context *flc;
  92         struct rte_mbuf *mbuf = sym_op->m_src;
  93
  94         if (likely(bpid < MAX_BPID))
  95                 DPAA2_SET_FD_BPID(fd, bpid);
  96         else
  97                 DPAA2_SET_FD_IVP(fd);
  98
  99         /* Save the shared descriptor */
 100         flc = &priv->flc_desc[0].flc;
 101
 102         DPAA2_SET_FD_ADDR(fd, DPAA2_MBUF_VADDR_TO_IOVA(sym_op->m_src));
 103         DPAA2_SET_FD_OFFSET(fd, sym_op->m_src->data_off);
 104         DPAA2_SET_FD_LEN(fd, sym_op->m_src->pkt_len);
 105         DPAA2_SET_FD_FLC(fd, ((uint64_t)flc));
 106
 107         /* save physical address of mbuf */
 108         op->sym->aead.digest.phys_addr = mbuf->buf_iova;
 109         mbuf->buf_iova = (uint64_t)op;
 110
 111         return 0;
 112 }
 113
 114 static inline int
 115 build_authenc_gcm_fd(dpaa2_sec_session *sess,
 116                      struct rte_crypto_op *op,
 117                      struct qbman_fd *fd, uint16_t bpid)
 118 {
 119         struct rte_crypto_sym_op *sym_op = op->sym;
 120         struct ctxt_priv *priv = sess->ctxt;
 121         struct qbman_fle *fle, *sge;
 122         struct sec_flow_context *flc;
 123         uint32_t auth_only_len = sess->ext_params.aead_ctxt.auth_only_len;
 124         int icv_len = sess->digest_length, retval;
 125         uint8_t *old_icv;
 126         struct rte_mbuf *dst;
 127         uint8_t *IV_ptr = rte_crypto_op_ctod_offset(op, uint8_t *,
 128                         sess->iv.offset);
 129
 130         PMD_INIT_FUNC_TRACE();
 131
 132         if (sym_op->m_dst)
 133                 dst = sym_op->m_dst;
 134         else
 135                 dst = sym_op->m_src;
 136
 137         /* TODO we are using the first FLE entry to store Mbuf and session ctxt.
 138          * Currently we donot know which FLE has the mbuf stored.
 139          * So while retreiving we can go back 1 FLE from the FD -ADDR
 140          * to get the MBUF Addr from the previous FLE.
 141          * We can have a better approach to use the inline Mbuf
 142          */
 143         retval = rte_mempool_get(priv->fle_pool, (void **)(&fle));
 144         if (retval) {
 145                 RTE_LOG(ERR, PMD, "Memory alloc failed for SGE\n");
 146                 return -1;
 147         }
 148         memset(fle, 0, FLE_POOL_BUF_SIZE);
 149         DPAA2_SET_FLE_ADDR(fle, DPAA2_OP_VADDR_TO_IOVA(op));
 150         DPAA2_FLE_SAVE_CTXT(fle, priv);
 151         fle = fle + 1;
 152         sge = fle + 2;
 153         if (likely(bpid < MAX_BPID)) {
 154                 DPAA2_SET_FD_BPID(fd, bpid);
 155                 DPAA2_SET_FLE_BPID(fle, bpid);
 156                 DPAA2_SET_FLE_BPID(fle + 1, bpid);
 157                 DPAA2_SET_FLE_BPID(sge, bpid);
 158                 DPAA2_SET_FLE_BPID(sge + 1, bpid);
 159                 DPAA2_SET_FLE_BPID(sge + 2, bpid);
 160                 DPAA2_SET_FLE_BPID(sge + 3, bpid);
 161         } else {
 162                 DPAA2_SET_FD_IVP(fd);
 163                 DPAA2_SET_FLE_IVP(fle);
 164                 DPAA2_SET_FLE_IVP((fle + 1));
 165                 DPAA2_SET_FLE_IVP(sge);
 166                 DPAA2_SET_FLE_IVP((sge + 1));
 167                 DPAA2_SET_FLE_IVP((sge + 2));
 168                 DPAA2_SET_FLE_IVP((sge + 3));
 169         }
 170
 171         /* Save the shared descriptor */
 172         flc = &priv->flc_desc[0].flc;
 173         /* Configure FD as a FRAME LIST */
 174         DPAA2_SET_FD_ADDR(fd, DPAA2_VADDR_TO_IOVA(fle));
 175         DPAA2_SET_FD_COMPOUND_FMT(fd);
 176         DPAA2_SET_FD_FLC(fd, DPAA2_VADDR_TO_IOVA(flc));
 177
 178         PMD_TX_LOG(DEBUG, "auth_off: 0x%x/length %d, digest-len=%d\n"
 179                    "iv-len=%d data_off: 0x%x\n",
 180                    sym_op->aead.data.offset,
 181                    sym_op->aead.data.length,
 182                    sym_op->aead.digest.length,
 183                    sess->iv.length,
 184                    sym_op->m_src->data_off);
 185
 186         /* Configure Output FLE with Scatter/Gather Entry */
 187         DPAA2_SET_FLE_ADDR(fle, DPAA2_VADDR_TO_IOVA(sge));
 188         if (auth_only_len)
 189                 DPAA2_SET_FLE_INTERNAL_JD(fle, auth_only_len);
 190         fle->length = (sess->dir == DIR_ENC) ?
 191                         (sym_op->aead.data.length + icv_len + auth_only_len) :
 192                         sym_op->aead.data.length + auth_only_len;
 193
 194         DPAA2_SET_FLE_SG_EXT(fle);
 195
 196         /* Configure Output SGE for Encap/Decap */
 197         DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(dst));
 198         DPAA2_SET_FLE_OFFSET(sge, sym_op->aead.data.offset +
 199                                 dst->data_off - auth_only_len);
 200         sge->length = sym_op->aead.data.length + auth_only_len;
 201
 202         if (sess->dir == DIR_ENC) {
 203                 sge++;
 204                 DPAA2_SET_FLE_ADDR(sge,
 205                                 DPAA2_VADDR_TO_IOVA(sym_op->aead.digest.data));
 206                 sge->length = sess->digest_length;
 207                 DPAA2_SET_FD_LEN(fd, (sym_op->aead.data.length +
 208                                         sess->iv.length + auth_only_len));
 209         }
 210         DPAA2_SET_FLE_FIN(sge);
 211
 212         sge++;
 213         fle++;
 214
 215         /* Configure Input FLE with Scatter/Gather Entry */
 216         DPAA2_SET_FLE_ADDR(fle, DPAA2_VADDR_TO_IOVA(sge));
 217         DPAA2_SET_FLE_SG_EXT(fle);
 218         DPAA2_SET_FLE_FIN(fle);
 219         fle->length = (sess->dir == DIR_ENC) ?
 220                 (sym_op->aead.data.length + sess->iv.length + auth_only_len) :
 221                 (sym_op->aead.data.length + sess->iv.length + auth_only_len +
 222                  sess->digest_length);
 223
 224         /* Configure Input SGE for Encap/Decap */
 225         DPAA2_SET_FLE_ADDR(sge, DPAA2_VADDR_TO_IOVA(IV_ptr));
 226         sge->length = sess->iv.length;
 227         sge++;
 228         if (auth_only_len) {
 229                 DPAA2_SET_FLE_ADDR(sge,
 230                                 DPAA2_VADDR_TO_IOVA(sym_op->aead.aad.data));
 231                 sge->length = auth_only_len;
 232                 DPAA2_SET_FLE_BPID(sge, bpid);
 233                 sge++;
 234         }
 235
 236         DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(sym_op->m_src));
 237         DPAA2_SET_FLE_OFFSET(sge, sym_op->aead.data.offset +
 238                                 sym_op->m_src->data_off);
 239         sge->length = sym_op->aead.data.length;
 240         if (sess->dir == DIR_DEC) {
 241                 sge++;
 242                 old_icv = (uint8_t *)(sge + 1);
 243                 memcpy(old_icv, sym_op->aead.digest.data,
 244                        sess->digest_length);
 245                 DPAA2_SET_FLE_ADDR(sge, DPAA2_VADDR_TO_IOVA(old_icv));
 246                 sge->length = sess->digest_length;
 247                 DPAA2_SET_FD_LEN(fd, (sym_op->aead.data.length +
 248                                  sess->digest_length +
 249                                  sess->iv.length +
 250                                  auth_only_len));
 251         }
 252         DPAA2_SET_FLE_FIN(sge);
 253
 254         if (auth_only_len) {
 255                 DPAA2_SET_FLE_INTERNAL_JD(fle, auth_only_len);
 256                 DPAA2_SET_FD_INTERNAL_JD(fd, auth_only_len);
 257         }
 258
 259         return 0;
 260 }
 261
 262 static inline int
 263 build_authenc_fd(dpaa2_sec_session *sess,
 264                  struct rte_crypto_op *op,
 265                  struct qbman_fd *fd, uint16_t bpid)
 266 {
 267         struct rte_crypto_sym_op *sym_op = op->sym;
 268         struct ctxt_priv *priv = sess->ctxt;
 269         struct qbman_fle *fle, *sge;
 270         struct sec_flow_context *flc;
 271         uint32_t auth_only_len = sym_op->auth.data.length -
 272                                 sym_op->cipher.data.length;
 273         int icv_len = sess->digest_length, retval;
 274         uint8_t *old_icv;
 275         uint8_t *iv_ptr = rte_crypto_op_ctod_offset(op, uint8_t *,
 276                         sess->iv.offset);
 277         struct rte_mbuf *dst;
 278
 279         PMD_INIT_FUNC_TRACE();
 280
 281         if (sym_op->m_dst)
 282                 dst = sym_op->m_dst;
 283         else
 284                 dst = sym_op->m_src;
 285
 286         /* we are using the first FLE entry to store Mbuf.
 287          * Currently we donot know which FLE has the mbuf stored.
 288          * So while retreiving we can go back 1 FLE from the FD -ADDR
 289          * to get the MBUF Addr from the previous FLE.
 290          * We can have a better approach to use the inline Mbuf
 291          */
 292         retval = rte_mempool_get(priv->fle_pool, (void **)(&fle));
 293         if (retval) {
 294                 RTE_LOG(ERR, PMD, "Memory alloc failed for SGE\n");
 295                 return -1;
 296         }
 297         memset(fle, 0, FLE_POOL_BUF_SIZE);
 298         DPAA2_SET_FLE_ADDR(fle, DPAA2_OP_VADDR_TO_IOVA(op));
 299         DPAA2_FLE_SAVE_CTXT(fle, priv);
 300         fle = fle + 1;
 301         sge = fle + 2;
 302         if (likely(bpid < MAX_BPID)) {
 303                 DPAA2_SET_FD_BPID(fd, bpid);
 304                 DPAA2_SET_FLE_BPID(fle, bpid);
 305                 DPAA2_SET_FLE_BPID(fle + 1, bpid);
 306                 DPAA2_SET_FLE_BPID(sge, bpid);
 307                 DPAA2_SET_FLE_BPID(sge + 1, bpid);
 308                 DPAA2_SET_FLE_BPID(sge + 2, bpid);
 309                 DPAA2_SET_FLE_BPID(sge + 3, bpid);
 310         } else {
 311                 DPAA2_SET_FD_IVP(fd);
 312                 DPAA2_SET_FLE_IVP(fle);
 313                 DPAA2_SET_FLE_IVP((fle + 1));
 314                 DPAA2_SET_FLE_IVP(sge);
 315                 DPAA2_SET_FLE_IVP((sge + 1));
 316                 DPAA2_SET_FLE_IVP((sge + 2));
 317                 DPAA2_SET_FLE_IVP((sge + 3));
 318         }
 319
 320         /* Save the shared descriptor */
 321         flc = &priv->flc_desc[0].flc;
 322         /* Configure FD as a FRAME LIST */
 323         DPAA2_SET_FD_ADDR(fd, DPAA2_VADDR_TO_IOVA(fle));
 324         DPAA2_SET_FD_COMPOUND_FMT(fd);
 325         DPAA2_SET_FD_FLC(fd, DPAA2_VADDR_TO_IOVA(flc));
 326
 327         PMD_TX_LOG(DEBUG, "auth_off: 0x%x/length %d, digest-len=%d\n"
 328                    "cipher_off: 0x%x/length %d, iv-len=%d data_off: 0x%x\n",
 329                    sym_op->auth.data.offset,
 330                    sym_op->auth.data.length,
 331                    sess->digest_length,
 332                    sym_op->cipher.data.offset,
 333                    sym_op->cipher.data.length,
 334                    sess->iv.length,
 335                    sym_op->m_src->data_off);
 336
 337         /* Configure Output FLE with Scatter/Gather Entry */
 338         DPAA2_SET_FLE_ADDR(fle, DPAA2_VADDR_TO_IOVA(sge));
 339         if (auth_only_len)
 340                 DPAA2_SET_FLE_INTERNAL_JD(fle, auth_only_len);
 341         fle->length = (sess->dir == DIR_ENC) ?
 342                         (sym_op->cipher.data.length + icv_len) :
 343                         sym_op->cipher.data.length;
 344
 345         DPAA2_SET_FLE_SG_EXT(fle);
 346
 347         /* Configure Output SGE for Encap/Decap */
 348         DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(dst));
 349         DPAA2_SET_FLE_OFFSET(sge, sym_op->cipher.data.offset +
 350                                 dst->data_off);
 351         sge->length = sym_op->cipher.data.length;
 352
 353         if (sess->dir == DIR_ENC) {
 354                 sge++;
 355                 DPAA2_SET_FLE_ADDR(sge,
 356                                 DPAA2_VADDR_TO_IOVA(sym_op->auth.digest.data));
 357                 sge->length = sess->digest_length;
 358                 DPAA2_SET_FD_LEN(fd, (sym_op->auth.data.length +
 359                                         sess->iv.length));
 360         }
 361         DPAA2_SET_FLE_FIN(sge);
 362
 363         sge++;
 364         fle++;
 365
 366         /* Configure Input FLE with Scatter/Gather Entry */
 367         DPAA2_SET_FLE_ADDR(fle, DPAA2_VADDR_TO_IOVA(sge));
 368         DPAA2_SET_FLE_SG_EXT(fle);
 369         DPAA2_SET_FLE_FIN(fle);
 370         fle->length = (sess->dir == DIR_ENC) ?
 371                         (sym_op->auth.data.length + sess->iv.length) :
 372                         (sym_op->auth.data.length + sess->iv.length +
 373                          sess->digest_length);
 374
 375         /* Configure Input SGE for Encap/Decap */
 376         DPAA2_SET_FLE_ADDR(sge, DPAA2_VADDR_TO_IOVA(iv_ptr));
 377         sge->length = sess->iv.length;
 378         sge++;
 379
 380         DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(sym_op->m_src));
 381         DPAA2_SET_FLE_OFFSET(sge, sym_op->auth.data.offset +
 382                                 sym_op->m_src->data_off);
 383         sge->length = sym_op->auth.data.length;
 384         if (sess->dir == DIR_DEC) {
 385                 sge++;
 386                 old_icv = (uint8_t *)(sge + 1);
 387                 memcpy(old_icv, sym_op->auth.digest.data,
 388                        sess->digest_length);
 389                 DPAA2_SET_FLE_ADDR(sge, DPAA2_VADDR_TO_IOVA(old_icv));
 390                 sge->length = sess->digest_length;
 391                 DPAA2_SET_FD_LEN(fd, (sym_op->auth.data.length +
 392                                  sess->digest_length +
 393                                  sess->iv.length));
 394         }
 395         DPAA2_SET_FLE_FIN(sge);
 396         if (auth_only_len) {
 397                 DPAA2_SET_FLE_INTERNAL_JD(fle, auth_only_len);
 398                 DPAA2_SET_FD_INTERNAL_JD(fd, auth_only_len);
 399         }
 400         return 0;
 401 }
 402
 403 static inline int
 404 build_auth_fd(dpaa2_sec_session *sess, struct rte_crypto_op *op,
 405               struct qbman_fd *fd, uint16_t bpid)
 406 {
 407         struct rte_crypto_sym_op *sym_op = op->sym;
 408         struct qbman_fle *fle, *sge;
 409         struct sec_flow_context *flc;
 410         struct ctxt_priv *priv = sess->ctxt;
 411         uint8_t *old_digest;
 412         int retval;
 413
 414         PMD_INIT_FUNC_TRACE();
 415
 416         retval = rte_mempool_get(priv->fle_pool, (void **)(&fle));
 417         if (retval) {
 418                 RTE_LOG(ERR, PMD, "Memory alloc failed for SGE\n");
 419                 return -1;
 420         }
 421         memset(fle, 0, FLE_POOL_BUF_SIZE);
 422         /* TODO we are using the first FLE entry to store Mbuf.
 423          * Currently we donot know which FLE has the mbuf stored.
 424          * So while retreiving we can go back 1 FLE from the FD -ADDR
 425          * to get the MBUF Addr from the previous FLE.
 426          * We can have a better approach to use the inline Mbuf
 427          */
 428         DPAA2_SET_FLE_ADDR(fle, DPAA2_OP_VADDR_TO_IOVA(op));
 429         DPAA2_FLE_SAVE_CTXT(fle, priv);
 430         fle = fle + 1;
 431
 432         if (likely(bpid < MAX_BPID)) {
 433                 DPAA2_SET_FD_BPID(fd, bpid);
 434                 DPAA2_SET_FLE_BPID(fle, bpid);
 435                 DPAA2_SET_FLE_BPID(fle + 1, bpid);
 436         } else {
 437                 DPAA2_SET_FD_IVP(fd);
 438                 DPAA2_SET_FLE_IVP(fle);
 439                 DPAA2_SET_FLE_IVP((fle + 1));
 440         }
 441         flc = &priv->flc_desc[DESC_INITFINAL].flc;
 442         DPAA2_SET_FD_FLC(fd, DPAA2_VADDR_TO_IOVA(flc));
 443
 444         DPAA2_SET_FLE_ADDR(fle, DPAA2_VADDR_TO_IOVA(sym_op->auth.digest.data));
 445         fle->length = sess->digest_length;
 446
 447         DPAA2_SET_FD_ADDR(fd, DPAA2_VADDR_TO_IOVA(fle));
 448         DPAA2_SET_FD_COMPOUND_FMT(fd);
 449         fle++;
 450
 451         if (sess->dir == DIR_ENC) {
 452                 DPAA2_SET_FLE_ADDR(fle,
 453                                    DPAA2_MBUF_VADDR_TO_IOVA(sym_op->m_src));
 454                 DPAA2_SET_FLE_OFFSET(fle, sym_op->auth.data.offset +
 455                                      sym_op->m_src->data_off);
 456                 DPAA2_SET_FD_LEN(fd, sym_op->auth.data.length);
 457                 fle->length = sym_op->auth.data.length;
 458         } else {
 459                 sge = fle + 2;
 460                 DPAA2_SET_FLE_SG_EXT(fle);
 461                 DPAA2_SET_FLE_ADDR(fle, DPAA2_VADDR_TO_IOVA(sge));
 462
 463                 if (likely(bpid < MAX_BPID)) {
 464                         DPAA2_SET_FLE_BPID(sge, bpid);
 465                         DPAA2_SET_FLE_BPID(sge + 1, bpid);
 466                 } else {
 467                         DPAA2_SET_FLE_IVP(sge);
 468                         DPAA2_SET_FLE_IVP((sge + 1));
 469                 }
 470                 DPAA2_SET_FLE_ADDR(sge,
 471                                    DPAA2_MBUF_VADDR_TO_IOVA(sym_op->m_src));
 472                 DPAA2_SET_FLE_OFFSET(sge, sym_op->auth.data.offset +
 473                                      sym_op->m_src->data_off);
 474
 475                 DPAA2_SET_FD_LEN(fd, sym_op->auth.data.length +
 476                                  sess->digest_length);
 477                 sge->length = sym_op->auth.data.length;
 478                 sge++;
 479                 old_digest = (uint8_t *)(sge + 1);
 480                 rte_memcpy(old_digest, sym_op->auth.digest.data,
 481                            sess->digest_length);
 482                 DPAA2_SET_FLE_ADDR(sge, DPAA2_VADDR_TO_IOVA(old_digest));
 483                 sge->length = sess->digest_length;
 484                 fle->length = sym_op->auth.data.length +
 485                                 sess->digest_length;
 486                 DPAA2_SET_FLE_FIN(sge);
 487         }
 488         DPAA2_SET_FLE_FIN(fle);
 489
 490         return 0;
 491 }
 492
 493 static int
 494 build_cipher_fd(dpaa2_sec_session *sess, struct rte_crypto_op *op,
 495                 struct qbman_fd *fd, uint16_t bpid)
 496 {
 497         struct rte_crypto_sym_op *sym_op = op->sym;
 498         struct qbman_fle *fle, *sge;
 499         int retval;
 500         struct sec_flow_context *flc;
 501         struct ctxt_priv *priv = sess->ctxt;
 502         uint8_t *iv_ptr = rte_crypto_op_ctod_offset(op, uint8_t *,
 503                         sess->iv.offset);
 504         struct rte_mbuf *dst;
 505
 506         PMD_INIT_FUNC_TRACE();
 507
 508         if (sym_op->m_dst)
 509                 dst = sym_op->m_dst;
 510         else
 511                 dst = sym_op->m_src;
 512
 513         retval = rte_mempool_get(priv->fle_pool, (void **)(&fle));
 514         if (retval) {
 515                 RTE_LOG(ERR, PMD, "Memory alloc failed for SGE\n");
 516                 return -1;
 517         }
 518         memset(fle, 0, FLE_POOL_BUF_SIZE);
 519         /* TODO we are using the first FLE entry to store Mbuf.
 520          * Currently we donot know which FLE has the mbuf stored.
 521          * So while retreiving we can go back 1 FLE from the FD -ADDR
 522          * to get the MBUF Addr from the previous FLE.
 523          * We can have a better approach to use the inline Mbuf
 524          */
 525         DPAA2_SET_FLE_ADDR(fle, DPAA2_OP_VADDR_TO_IOVA(op));
 526         DPAA2_FLE_SAVE_CTXT(fle, priv);
 527         fle = fle + 1;
 528         sge = fle + 2;
 529
 530         if (likely(bpid < MAX_BPID)) {
 531                 DPAA2_SET_FD_BPID(fd, bpid);
 532                 DPAA2_SET_FLE_BPID(fle, bpid);
 533                 DPAA2_SET_FLE_BPID(fle + 1, bpid);
 534                 DPAA2_SET_FLE_BPID(sge, bpid);
 535                 DPAA2_SET_FLE_BPID(sge + 1, bpid);
 536         } else {
 537                 DPAA2_SET_FD_IVP(fd);
 538                 DPAA2_SET_FLE_IVP(fle);
 539                 DPAA2_SET_FLE_IVP((fle + 1));
 540                 DPAA2_SET_FLE_IVP(sge);
 541                 DPAA2_SET_FLE_IVP((sge + 1));
 542         }
 543
 544         flc = &priv->flc_desc[0].flc;
 545         DPAA2_SET_FD_ADDR(fd, DPAA2_VADDR_TO_IOVA(fle));
 546         DPAA2_SET_FD_LEN(fd, sym_op->cipher.data.length +
 547                          sess->iv.length);
 548         DPAA2_SET_FD_COMPOUND_FMT(fd);
 549         DPAA2_SET_FD_FLC(fd, DPAA2_VADDR_TO_IOVA(flc));
 550
 551         PMD_TX_LOG(DEBUG, "cipher_off: 0x%x/length %d,ivlen=%d data_off: 0x%x",
 552                    sym_op->cipher.data.offset,
 553                    sym_op->cipher.data.length,
 554                    sess->iv.length,
 555                    sym_op->m_src->data_off);
 556
 557         DPAA2_SET_FLE_ADDR(fle, DPAA2_MBUF_VADDR_TO_IOVA(dst));
 558         DPAA2_SET_FLE_OFFSET(fle, sym_op->cipher.data.offset +
 559                              dst->data_off);
 560
 561         fle->length = sym_op->cipher.data.length + sess->iv.length;
 562
 563         PMD_TX_LOG(DEBUG, "1 - flc = %p, fle = %p FLEaddr = %x-%x, length %d",
 564                    flc, fle, fle->addr_hi, fle->addr_lo, fle->length);
 565
 566         fle++;
 567
 568         DPAA2_SET_FLE_ADDR(fle, DPAA2_VADDR_TO_IOVA(sge));
 569         fle->length = sym_op->cipher.data.length + sess->iv.length;
 570
 571         DPAA2_SET_FLE_SG_EXT(fle);
 572
 573         DPAA2_SET_FLE_ADDR(sge, DPAA2_VADDR_TO_IOVA(iv_ptr));
 574         sge->length = sess->iv.length;
 575
 576         sge++;
 577         DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(sym_op->m_src));
 578         DPAA2_SET_FLE_OFFSET(sge, sym_op->cipher.data.offset +
 579                              sym_op->m_src->data_off);
 580
 581         sge->length = sym_op->cipher.data.length;
 582         DPAA2_SET_FLE_FIN(sge);
 583         DPAA2_SET_FLE_FIN(fle);
 584
 585         PMD_TX_LOG(DEBUG, "fdaddr =%p bpid =%d meta =%d off =%d, len =%d",
 586                    (void *)DPAA2_GET_FD_ADDR(fd),
 587                    DPAA2_GET_FD_BPID(fd),
 588                    rte_dpaa2_bpid_info[bpid].meta_data_size,
 589                    DPAA2_GET_FD_OFFSET(fd),
 590                    DPAA2_GET_FD_LEN(fd));
 591
 592         return 0;
 593 }
 594
 595 static inline int
 596 build_sec_fd(struct rte_crypto_op *op,
 597              struct qbman_fd *fd, uint16_t bpid)
 598 {
 599         int ret = -1;
 600         dpaa2_sec_session *sess;
 601
 602         PMD_INIT_FUNC_TRACE();
 603         /*
 604          * Segmented buffer is not supported.
 605          */
 606         if (!rte_pktmbuf_is_contiguous(op->sym->m_src)) {
 607                 op->status = RTE_CRYPTO_OP_STATUS_ERROR;
 608                 return -ENOTSUP;
 609         }
 610
 611         if (op->sess_type == RTE_CRYPTO_OP_WITH_SESSION)
 612                 sess = (dpaa2_sec_session *)get_session_private_data(
 613                                 op->sym->session, cryptodev_driver_id);
 614         else if (op->sess_type == RTE_CRYPTO_OP_SECURITY_SESSION)
 615                 sess = (dpaa2_sec_session *)get_sec_session_private_data(
 616                                 op->sym->sec_session);
 617         else
 618                 return -1;
 619
 620         switch (sess->ctxt_type) {
 621         case DPAA2_SEC_CIPHER:
 622                 ret = build_cipher_fd(sess, op, fd, bpid);
 623                 break;
 624         case DPAA2_SEC_AUTH:
 625                 ret = build_auth_fd(sess, op, fd, bpid);
 626                 break;
 627         case DPAA2_SEC_AEAD:
 628                 ret = build_authenc_gcm_fd(sess, op, fd, bpid);
 629                 break;
 630         case DPAA2_SEC_CIPHER_HASH:
 631                 ret = build_authenc_fd(sess, op, fd, bpid);
 632                 break;
 633         case DPAA2_SEC_IPSEC:
 634                 ret = build_proto_fd(sess, op, fd, bpid);
 635                 break;
 636         case DPAA2_SEC_HASH_CIPHER:
 637         default:
 638                 RTE_LOG(ERR, PMD, "error: Unsupported session\n");
 639         }
 640         return ret;
 641 }
 642
 643 static uint16_t
 644 dpaa2_sec_enqueue_burst(void *qp, struct rte_crypto_op **ops,
 645                         uint16_t nb_ops)
 646 {
 647         /* Function to transmit the frames to given device and VQ*/
 648         uint32_t loop;
 649         int32_t ret;
 650         struct qbman_fd fd_arr[MAX_TX_RING_SLOTS];
 651         uint32_t frames_to_send;
 652         struct qbman_eq_desc eqdesc;
 653         struct dpaa2_sec_qp *dpaa2_qp = (struct dpaa2_sec_qp *)qp;
 654         struct qbman_swp *swp;
 655         uint16_t num_tx = 0;
 656         /*todo - need to support multiple buffer pools */
 657         uint16_t bpid;
 658         struct rte_mempool *mb_pool;
 659
 660         if (unlikely(nb_ops == 0))
 661                 return 0;
 662
 663         if (ops[0]->sess_type == RTE_CRYPTO_OP_SESSIONLESS) {
 664                 RTE_LOG(ERR, PMD, "sessionless crypto op not supported\n");
 665                 return 0;
 666         }
 667         /*Prepare enqueue descriptor*/
 668         qbman_eq_desc_clear(&eqdesc);
 669         qbman_eq_desc_set_no_orp(&eqdesc, DPAA2_EQ_RESP_ERR_FQ);
 670         qbman_eq_desc_set_response(&eqdesc, 0, 0);
 671         qbman_eq_desc_set_fq(&eqdesc, dpaa2_qp->tx_vq.fqid);
 672
 673         if (!DPAA2_PER_LCORE_SEC_DPIO) {
 674                 ret = dpaa2_affine_qbman_swp_sec();
 675                 if (ret) {
 676                         RTE_LOG(ERR, PMD, "Failure in affining portal\n");
 677                         return 0;
 678                 }
 679         }
 680         swp = DPAA2_PER_LCORE_SEC_PORTAL;
 681
 682         while (nb_ops) {
 683                 frames_to_send = (nb_ops >> 3) ? MAX_TX_RING_SLOTS : nb_ops;
 684
 685                 for (loop = 0; loop < frames_to_send; loop++) {
 686                         /*Clear the unused FD fields before sending*/
 687                         memset(&fd_arr[loop], 0, sizeof(struct qbman_fd));
 688                         mb_pool = (*ops)->sym->m_src->pool;
 689                         bpid = mempool_to_bpid(mb_pool);
 690                         ret = build_sec_fd(*ops, &fd_arr[loop], bpid);
 691                         if (ret) {
 692                                 PMD_DRV_LOG(ERR, "error: Improper packet"
 693                                             " contents for crypto operation\n");
 694                                 goto skip_tx;
 695                         }
 696                         ops++;
 697                 }
 698                 loop = 0;
 699                 while (loop < frames_to_send) {
 700                         loop += qbman_swp_enqueue_multiple(swp, &eqdesc,
 701                                                         &fd_arr[loop],
 702                                                         frames_to_send - loop);
 703                 }
 704
 705                 num_tx += frames_to_send;
 706                 nb_ops -= frames_to_send;
 707         }
 708 skip_tx:
 709         dpaa2_qp->tx_vq.tx_pkts += num_tx;
 710         dpaa2_qp->tx_vq.err_pkts += nb_ops;
 711         return num_tx;
 712 }
 713
 714 static inline struct rte_crypto_op *
 715 sec_simple_fd_to_mbuf(const struct qbman_fd *fd, __rte_unused uint8_t id)
 716 {
 717         struct rte_crypto_op *op;
 718         uint16_t len = DPAA2_GET_FD_LEN(fd);
 719         uint16_t diff = 0;
 720         dpaa2_sec_session *sess_priv;
 721
 722         struct rte_mbuf *mbuf = DPAA2_INLINE_MBUF_FROM_BUF(
 723                 DPAA2_IOVA_TO_VADDR(DPAA2_GET_FD_ADDR(fd)),
 724                 rte_dpaa2_bpid_info[DPAA2_GET_FD_BPID(fd)].meta_data_size);
 725
 726         op = (struct rte_crypto_op *)mbuf->buf_iova;
 727         mbuf->buf_iova = op->sym->aead.digest.phys_addr;
 728         op->sym->aead.digest.phys_addr = 0L;
 729
 730         sess_priv = (dpaa2_sec_session *)get_sec_session_private_data(
 731                                 op->sym->sec_session);
 732         if (sess_priv->dir == DIR_ENC)
 733                 mbuf->data_off += SEC_FLC_DHR_OUTBOUND;
 734         else
 735                 mbuf->data_off += SEC_FLC_DHR_INBOUND;
 736         diff = len - mbuf->pkt_len;
 737         mbuf->pkt_len += diff;
 738         mbuf->data_len += diff;
 739
 740         return op;
 741 }
 742
 743 static inline struct rte_crypto_op *
 744 sec_fd_to_mbuf(const struct qbman_fd *fd, uint8_t driver_id)
 745 {
 746         struct qbman_fle *fle;
 747         struct rte_crypto_op *op;
 748         struct ctxt_priv *priv;
 749         struct rte_mbuf *dst, *src;
 750
 751         if (DPAA2_FD_GET_FORMAT(fd) == qbman_fd_single)
 752                 return sec_simple_fd_to_mbuf(fd, driver_id);
 753
 754         fle = (struct qbman_fle *)DPAA2_IOVA_TO_VADDR(DPAA2_GET_FD_ADDR(fd));
 755
 756         PMD_RX_LOG(DEBUG, "FLE addr = %x - %x, offset = %x",
 757                    fle->addr_hi, fle->addr_lo, fle->fin_bpid_offset);
 758
 759         /* we are using the first FLE entry to store Mbuf.
 760          * Currently we donot know which FLE has the mbuf stored.
 761          * So while retreiving we can go back 1 FLE from the FD -ADDR
 762          * to get the MBUF Addr from the previous FLE.
 763          * We can have a better approach to use the inline Mbuf
 764          */
 765
 766         if (unlikely(DPAA2_GET_FD_IVP(fd))) {
 767                 /* TODO complete it. */
 768                 RTE_LOG(ERR, PMD, "error: Non inline buffer - WHAT to DO?\n");
 769                 return NULL;
 770         }
 771         op = (struct rte_crypto_op *)DPAA2_IOVA_TO_VADDR(
 772                         DPAA2_GET_FLE_ADDR((fle - 1)));
 773
 774         /* Prefeth op */
 775         src = op->sym->m_src;
 776         rte_prefetch0(src);
 777
 778         if (op->sym->m_dst) {
 779                 dst = op->sym->m_dst;
 780                 rte_prefetch0(dst);
 781         } else
 782                 dst = src;
 783
 784         PMD_RX_LOG(DEBUG, "mbuf %p BMAN buf addr %p",
 785                    (void *)dst, dst->buf_addr);
 786
 787         PMD_RX_LOG(DEBUG, "fdaddr =%p bpid =%d meta =%d off =%d, len =%d",
 788                    (void *)DPAA2_GET_FD_ADDR(fd),
 789                    DPAA2_GET_FD_BPID(fd),
 790                    rte_dpaa2_bpid_info[DPAA2_GET_FD_BPID(fd)].meta_data_size,
 791                    DPAA2_GET_FD_OFFSET(fd),
 792                    DPAA2_GET_FD_LEN(fd));
 793
 794         /* free the fle memory */
 795         priv = (struct ctxt_priv *)DPAA2_GET_FLE_CTXT(fle - 1);
 796         rte_mempool_put(priv->fle_pool, (void *)(fle - 1));
 797
 798         return op;
 799 }
 800
 801 static uint16_t
 802 dpaa2_sec_dequeue_burst(void *qp, struct rte_crypto_op **ops,
 803                         uint16_t nb_ops)
 804 {
 805         /* Function is responsible to receive frames for a given device and VQ*/
 806         struct dpaa2_sec_qp *dpaa2_qp = (struct dpaa2_sec_qp *)qp;
 807         struct rte_cryptodev *dev =
 808                         (struct rte_cryptodev *)(dpaa2_qp->rx_vq.dev);
 809         struct qbman_result *dq_storage;
 810         uint32_t fqid = dpaa2_qp->rx_vq.fqid;
 811         int ret, num_rx = 0;
 812         uint8_t is_last = 0, status;
 813         struct qbman_swp *swp;
 814         const struct qbman_fd *fd;
 815         struct qbman_pull_desc pulldesc;
 816
 817         if (!DPAA2_PER_LCORE_SEC_DPIO) {
 818                 ret = dpaa2_affine_qbman_swp_sec();
 819                 if (ret) {
 820                         RTE_LOG(ERR, PMD, "Failure in affining portal\n");
 821                         return 0;
 822                 }
 823         }
 824         swp = DPAA2_PER_LCORE_SEC_PORTAL;
 825         dq_storage = dpaa2_qp->rx_vq.q_storage->dq_storage[0];
 826
 827         qbman_pull_desc_clear(&pulldesc);
 828         qbman_pull_desc_set_numframes(&pulldesc,
 829                                       (nb_ops > DPAA2_DQRR_RING_SIZE) ?
 830                                       DPAA2_DQRR_RING_SIZE : nb_ops);
 831         qbman_pull_desc_set_fq(&pulldesc, fqid);
 832         qbman_pull_desc_set_storage(&pulldesc, dq_storage,
 833                                     (dma_addr_t)DPAA2_VADDR_TO_IOVA(dq_storage),
 834                                     1);
 835
 836         /*Issue a volatile dequeue command. */
 837         while (1) {
 838                 if (qbman_swp_pull(swp, &pulldesc)) {
 839                         RTE_LOG(WARNING, PMD,
 840                                 "SEC VDQ command is not issued : QBMAN busy\n");
 841                         /* Portal was busy, try again */
 842                         continue;
 843                 }
 844                 break;
 845         };
 846
 847         /* Receive the packets till Last Dequeue entry is found with
 848          * respect to the above issues PULL command.
 849          */
 850         while (!is_last) {
 851                 /* Check if the previous issued command is completed.
 852                  * Also seems like the SWP is shared between the Ethernet Driver
 853                  * and the SEC driver.
 854                  */
 855                 while (!qbman_check_command_complete(dq_storage))
 856                         ;
 857
 858                 /* Loop until the dq_storage is updated with
 859                  * new token by QBMAN
 860                  */
 861                 while (!qbman_check_new_result(dq_storage))
 862                         ;
 863                 /* Check whether Last Pull command is Expired and
 864                  * setting Condition for Loop termination
 865                  */
 866                 if (qbman_result_DQ_is_pull_complete(dq_storage)) {
 867                         is_last = 1;
 868                         /* Check for valid frame. */
 869                         status = (uint8_t)qbman_result_DQ_flags(dq_storage);
 870                         if (unlikely(
 871                                 (status & QBMAN_DQ_STAT_VALIDFRAME) == 0)) {
 872                                 PMD_RX_LOG(DEBUG, "No frame is delivered");
 873                                 continue;
 874                         }
 875                 }
 876
 877                 fd = qbman_result_DQ_fd(dq_storage);
 878                 ops[num_rx] = sec_fd_to_mbuf(fd, dev->driver_id);
 879
 880                 if (unlikely(fd->simple.frc)) {
 881                         /* TODO Parse SEC errors */
 882                         RTE_LOG(ERR, PMD, "SEC returned Error - %x\n",
 883                                 fd->simple.frc);
 884                         ops[num_rx]->status = RTE_CRYPTO_OP_STATUS_ERROR;
 885                 } else {
 886                         ops[num_rx]->status = RTE_CRYPTO_OP_STATUS_SUCCESS;
 887                 }
 888
 889                 num_rx++;
 890                 dq_storage++;
 891         } /* End of Packet Rx loop */
 892
 893         dpaa2_qp->rx_vq.rx_pkts += num_rx;
 894
 895         PMD_RX_LOG(DEBUG, "SEC Received %d Packets", num_rx);
 896         /*Return the total number of packets received to DPAA2 app*/
 897         return num_rx;
 898 }
 899
 900 /** Release queue pair */
 901 static int
 902 dpaa2_sec_queue_pair_release(struct rte_cryptodev *dev, uint16_t queue_pair_id)
 903 {
 904         struct dpaa2_sec_qp *qp =
 905                 (struct dpaa2_sec_qp *)dev->data->queue_pairs[queue_pair_id];
 906
 907         PMD_INIT_FUNC_TRACE();
 908
 909         if (qp->rx_vq.q_storage) {
 910                 dpaa2_free_dq_storage(qp->rx_vq.q_storage);
 911                 rte_free(qp->rx_vq.q_storage);
 912         }
 913         rte_free(qp);
 914
 915         dev->data->queue_pairs[queue_pair_id] = NULL;
 916
 917         return 0;
 918 }
 919
 920 /** Setup a queue pair */
 921 static int
 922 dpaa2_sec_queue_pair_setup(struct rte_cryptodev *dev, uint16_t qp_id,
 923                 __rte_unused const struct rte_cryptodev_qp_conf *qp_conf,
 924                 __rte_unused int socket_id,
 925                 __rte_unused struct rte_mempool *session_pool)
 926 {
 927         struct dpaa2_sec_dev_private *priv = dev->data->dev_private;
 928         struct dpaa2_sec_qp *qp;
 929         struct fsl_mc_io *dpseci = (struct fsl_mc_io *)priv->hw;
 930         struct dpseci_rx_queue_cfg cfg;
 931         int32_t retcode;
 932
 933         PMD_INIT_FUNC_TRACE();
 934
 935         /* If qp is already in use free ring memory and qp metadata. */
 936         if (dev->data->queue_pairs[qp_id] != NULL) {
 937                 PMD_DRV_LOG(INFO, "QP already setup");
 938                 return 0;
 939         }
 940
 941         PMD_DRV_LOG(DEBUG, "dev =%p, queue =%d, conf =%p",
 942                     dev, qp_id, qp_conf);
 943
 944         memset(&cfg, 0, sizeof(struct dpseci_rx_queue_cfg));
 945
 946         qp = rte_malloc(NULL, sizeof(struct dpaa2_sec_qp),
 947                         RTE_CACHE_LINE_SIZE);
 948         if (!qp) {
 949                 RTE_LOG(ERR, PMD, "malloc failed for rx/tx queues\n");
 950                 return -1;
 951         }
 952
 953         qp->rx_vq.dev = dev;
 954         qp->tx_vq.dev = dev;
 955         qp->rx_vq.q_storage = rte_malloc("sec dq storage",
 956                 sizeof(struct queue_storage_info_t),
 957                 RTE_CACHE_LINE_SIZE);
 958         if (!qp->rx_vq.q_storage) {
 959                 RTE_LOG(ERR, PMD, "malloc failed for q_storage\n");
 960                 return -1;
 961         }
 962         memset(qp->rx_vq.q_storage, 0, sizeof(struct queue_storage_info_t));
 963
 964         if (dpaa2_alloc_dq_storage(qp->rx_vq.q_storage)) {
 965                 RTE_LOG(ERR, PMD, "dpaa2_alloc_dq_storage failed\n");
 966                 return -1;
 967         }
 968
 969         dev->data->queue_pairs[qp_id] = qp;
 970
 971         cfg.options = cfg.options | DPSECI_QUEUE_OPT_USER_CTX;
 972         cfg.user_ctx = (uint64_t)(&qp->rx_vq);
 973         retcode = dpseci_set_rx_queue(dpseci, CMD_PRI_LOW, priv->token,
 974                                       qp_id, &cfg);
 975         return retcode;
 976 }
 977
 978 /** Start queue pair */
 979 static int
 980 dpaa2_sec_queue_pair_start(__rte_unused struct rte_cryptodev *dev,
 981                            __rte_unused uint16_t queue_pair_id)
 982 {
 983         PMD_INIT_FUNC_TRACE();
 984
 985         return 0;
 986 }
 987
 988 /** Stop queue pair */
 989 static int
 990 dpaa2_sec_queue_pair_stop(__rte_unused struct rte_cryptodev *dev,
 991                           __rte_unused uint16_t queue_pair_id)
 992 {
 993         PMD_INIT_FUNC_TRACE();
 994
 995         return 0;
 996 }
 997
 998 /** Return the number of allocated queue pairs */
 999 static uint32_t
1000 dpaa2_sec_queue_pair_count(struct rte_cryptodev *dev)
1001 {
1002         PMD_INIT_FUNC_TRACE();
1003
1004         return dev->data->nb_queue_pairs;
1005 }
1006
1007 /** Returns the size of the aesni gcm session structure */
1008 static unsigned int
1009 dpaa2_sec_session_get_size(struct rte_cryptodev *dev __rte_unused)
1010 {
1011         PMD_INIT_FUNC_TRACE();
1012
1013         return sizeof(dpaa2_sec_session);
1014 }
1015
1016 static int
1017 dpaa2_sec_cipher_init(struct rte_cryptodev *dev,
1018                       struct rte_crypto_sym_xform *xform,
1019                       dpaa2_sec_session *session)
1020 {
1021         struct dpaa2_sec_dev_private *dev_priv = dev->data->dev_private;
1022         struct alginfo cipherdata;
1023         int bufsize, i;
1024         struct ctxt_priv *priv;
1025         struct sec_flow_context *flc;
1026
1027         PMD_INIT_FUNC_TRACE();
1028
1029         /* For SEC CIPHER only one descriptor is required. */
1030         priv = (struct ctxt_priv *)rte_zmalloc(NULL,
1031                         sizeof(struct ctxt_priv) + sizeof(struct sec_flc_desc),
1032                         RTE_CACHE_LINE_SIZE);
1033         if (priv == NULL) {
1034                 RTE_LOG(ERR, PMD, "No Memory for priv CTXT\n");
1035                 return -1;
1036         }
1037
1038         priv->fle_pool = dev_priv->fle_pool;
1039
1040         flc = &priv->flc_desc[0].flc;
1041
1042         session->cipher_key.data = rte_zmalloc(NULL, xform->cipher.key.length,
1043                         RTE_CACHE_LINE_SIZE);
1044         if (session->cipher_key.data == NULL) {
1045                 RTE_LOG(ERR, PMD, "No Memory for cipher key\n");
1046                 rte_free(priv);
1047                 return -1;
1048         }
1049         session->cipher_key.length = xform->cipher.key.length;
1050
1051         memcpy(session->cipher_key.data, xform->cipher.key.data,
1052                xform->cipher.key.length);
1053         cipherdata.key = (uint64_t)session->cipher_key.data;
1054         cipherdata.keylen = session->cipher_key.length;
1055         cipherdata.key_enc_flags = 0;
1056         cipherdata.key_type = RTA_DATA_IMM;
1057
1058         /* Set IV parameters */
1059         session->iv.offset = xform->cipher.iv.offset;
1060         session->iv.length = xform->cipher.iv.length;
1061
1062         switch (xform->cipher.algo) {
1063         case RTE_CRYPTO_CIPHER_AES_CBC:
1064                 cipherdata.algtype = OP_ALG_ALGSEL_AES;
1065                 cipherdata.algmode = OP_ALG_AAI_CBC;
1066                 session->cipher_alg = RTE_CRYPTO_CIPHER_AES_CBC;
1067                 break;
1068         case RTE_CRYPTO_CIPHER_3DES_CBC:
1069                 cipherdata.algtype = OP_ALG_ALGSEL_3DES;
1070                 cipherdata.algmode = OP_ALG_AAI_CBC;
1071                 session->cipher_alg = RTE_CRYPTO_CIPHER_3DES_CBC;
1072                 break;
1073         case RTE_CRYPTO_CIPHER_AES_CTR:
1074                 cipherdata.algtype = OP_ALG_ALGSEL_AES;
1075                 cipherdata.algmode = OP_ALG_AAI_CTR;
1076                 session->cipher_alg = RTE_CRYPTO_CIPHER_AES_CTR;
1077                 break;
1078         case RTE_CRYPTO_CIPHER_3DES_CTR:
1079         case RTE_CRYPTO_CIPHER_AES_ECB:
1080         case RTE_CRYPTO_CIPHER_3DES_ECB:
1081         case RTE_CRYPTO_CIPHER_AES_XTS:
1082         case RTE_CRYPTO_CIPHER_AES_F8:
1083         case RTE_CRYPTO_CIPHER_ARC4:
1084         case RTE_CRYPTO_CIPHER_KASUMI_F8:
1085         case RTE_CRYPTO_CIPHER_SNOW3G_UEA2:
1086         case RTE_CRYPTO_CIPHER_ZUC_EEA3:
1087         case RTE_CRYPTO_CIPHER_NULL:
1088                 RTE_LOG(ERR, PMD, "Crypto: Unsupported Cipher alg %u\n",
1089                         xform->cipher.algo);
1090                 goto error_out;
1091         default:
1092                 RTE_LOG(ERR, PMD, "Crypto: Undefined Cipher specified %u\n",
1093                         xform->cipher.algo);
1094                 goto error_out;
1095         }
1096         session->dir = (xform->cipher.op == RTE_CRYPTO_CIPHER_OP_ENCRYPT) ?
1097                                 DIR_ENC : DIR_DEC;
1098
1099         bufsize = cnstr_shdsc_blkcipher(priv->flc_desc[0].desc, 1, 0,
1100                                         &cipherdata, NULL, session->iv.length,
1101                                         session->dir);
1102         if (bufsize < 0) {
1103                 RTE_LOG(ERR, PMD, "Crypto: Descriptor build failed\n");
1104                 goto error_out;
1105         }
1106         flc->dhr = 0;
1107         flc->bpv0 = 0x1;
1108         flc->mode_bits = 0x8000;
1109
1110         flc->word1_sdl = (uint8_t)bufsize;
1111         flc->word2_rflc_31_0 = lower_32_bits(
1112                         (uint64_t)&(((struct dpaa2_sec_qp *)
1113                         dev->data->queue_pairs[0])->rx_vq));
1114         flc->word3_rflc_63_32 = upper_32_bits(
1115                         (uint64_t)&(((struct dpaa2_sec_qp *)
1116                         dev->data->queue_pairs[0])->rx_vq));
1117         session->ctxt = priv;
1118
1119         for (i = 0; i < bufsize; i++)
1120                 PMD_DRV_LOG(DEBUG, "DESC[%d]:0x%x\n",
1121                             i, priv->flc_desc[0].desc[i]);
1122
1123         return 0;
1124
1125 error_out:
1126         rte_free(session->cipher_key.data);
1127         rte_free(priv);
1128         return -1;
1129 }
1130
1131 static int
1132 dpaa2_sec_auth_init(struct rte_cryptodev *dev,
1133                     struct rte_crypto_sym_xform *xform,
1134                     dpaa2_sec_session *session)
1135 {
1136         struct dpaa2_sec_dev_private *dev_priv = dev->data->dev_private;
1137         struct alginfo authdata;
1138         unsigned int bufsize, i;
1139         struct ctxt_priv *priv;
1140         struct sec_flow_context *flc;
1141
1142         PMD_INIT_FUNC_TRACE();
1143
1144         /* For SEC AUTH three descriptors are required for various stages */
1145         priv = (struct ctxt_priv *)rte_zmalloc(NULL,
1146                         sizeof(struct ctxt_priv) + 3 *
1147                         sizeof(struct sec_flc_desc),
1148                         RTE_CACHE_LINE_SIZE);
1149         if (priv == NULL) {
1150                 RTE_LOG(ERR, PMD, "No Memory for priv CTXT\n");
1151                 return -1;
1152         }
1153
1154         priv->fle_pool = dev_priv->fle_pool;
1155         flc = &priv->flc_desc[DESC_INITFINAL].flc;
1156
1157         session->auth_key.data = rte_zmalloc(NULL, xform->auth.key.length,
1158                         RTE_CACHE_LINE_SIZE);
1159         if (session->auth_key.data == NULL) {
1160                 RTE_LOG(ERR, PMD, "No Memory for auth key\n");
1161                 rte_free(priv);
1162                 return -1;
1163         }
1164         session->auth_key.length = xform->auth.key.length;
1165
1166         memcpy(session->auth_key.data, xform->auth.key.data,
1167                xform->auth.key.length);
1168         authdata.key = (uint64_t)session->auth_key.data;
1169         authdata.keylen = session->auth_key.length;
1170         authdata.key_enc_flags = 0;
1171         authdata.key_type = RTA_DATA_IMM;
1172
1173         session->digest_length = xform->auth.digest_length;
1174
1175         switch (xform->auth.algo) {
1176         case RTE_CRYPTO_AUTH_SHA1_HMAC:
1177                 authdata.algtype = OP_ALG_ALGSEL_SHA1;
1178                 authdata.algmode = OP_ALG_AAI_HMAC;
1179                 session->auth_alg = RTE_CRYPTO_AUTH_SHA1_HMAC;
1180                 break;
1181         case RTE_CRYPTO_AUTH_MD5_HMAC:
1182                 authdata.algtype = OP_ALG_ALGSEL_MD5;
1183                 authdata.algmode = OP_ALG_AAI_HMAC;
1184                 session->auth_alg = RTE_CRYPTO_AUTH_MD5_HMAC;
1185                 break;
1186         case RTE_CRYPTO_AUTH_SHA256_HMAC:
1187                 authdata.algtype = OP_ALG_ALGSEL_SHA256;
1188                 authdata.algmode = OP_ALG_AAI_HMAC;
1189                 session->auth_alg = RTE_CRYPTO_AUTH_SHA256_HMAC;
1190                 break;
1191         case RTE_CRYPTO_AUTH_SHA384_HMAC:
1192                 authdata.algtype = OP_ALG_ALGSEL_SHA384;
1193                 authdata.algmode = OP_ALG_AAI_HMAC;
1194                 session->auth_alg = RTE_CRYPTO_AUTH_SHA384_HMAC;
1195                 break;
1196         case RTE_CRYPTO_AUTH_SHA512_HMAC:
1197                 authdata.algtype = OP_ALG_ALGSEL_SHA512;
1198                 authdata.algmode = OP_ALG_AAI_HMAC;
1199                 session->auth_alg = RTE_CRYPTO_AUTH_SHA512_HMAC;
1200                 break;
1201         case RTE_CRYPTO_AUTH_SHA224_HMAC:
1202                 authdata.algtype = OP_ALG_ALGSEL_SHA224;
1203                 authdata.algmode = OP_ALG_AAI_HMAC;
1204                 session->auth_alg = RTE_CRYPTO_AUTH_SHA224_HMAC;
1205                 break;
1206         case RTE_CRYPTO_AUTH_AES_XCBC_MAC:
1207         case RTE_CRYPTO_AUTH_SNOW3G_UIA2:
1208         case RTE_CRYPTO_AUTH_NULL:
1209         case RTE_CRYPTO_AUTH_SHA1:
1210         case RTE_CRYPTO_AUTH_SHA256:
1211         case RTE_CRYPTO_AUTH_SHA512:
1212         case RTE_CRYPTO_AUTH_SHA224:
1213         case RTE_CRYPTO_AUTH_SHA384:
1214         case RTE_CRYPTO_AUTH_MD5:
1215         case RTE_CRYPTO_AUTH_AES_GMAC:
1216         case RTE_CRYPTO_AUTH_KASUMI_F9:
1217         case RTE_CRYPTO_AUTH_AES_CMAC:
1218         case RTE_CRYPTO_AUTH_AES_CBC_MAC:
1219         case RTE_CRYPTO_AUTH_ZUC_EIA3:
1220                 RTE_LOG(ERR, PMD, "Crypto: Unsupported auth alg %u\n",
1221                         xform->auth.algo);
1222                 goto error_out;
1223         default:
1224                 RTE_LOG(ERR, PMD, "Crypto: Undefined Auth specified %u\n",
1225                         xform->auth.algo);
1226                 goto error_out;
1227         }
1228         session->dir = (xform->auth.op == RTE_CRYPTO_AUTH_OP_GENERATE) ?
1229                                 DIR_ENC : DIR_DEC;
1230
1231         bufsize = cnstr_shdsc_hmac(priv->flc_desc[DESC_INITFINAL].desc,
1232                                    1, 0, &authdata, !session->dir,
1233                                    session->digest_length);
1234
1235         flc->word1_sdl = (uint8_t)bufsize;
1236         flc->word2_rflc_31_0 = lower_32_bits(
1237                         (uint64_t)&(((struct dpaa2_sec_qp *)
1238                         dev->data->queue_pairs[0])->rx_vq));
1239         flc->word3_rflc_63_32 = upper_32_bits(
1240                         (uint64_t)&(((struct dpaa2_sec_qp *)
1241                         dev->data->queue_pairs[0])->rx_vq));
1242         session->ctxt = priv;
1243         for (i = 0; i < bufsize; i++)
1244                 PMD_DRV_LOG(DEBUG, "DESC[%d]:0x%x\n",
1245                             i, priv->flc_desc[DESC_INITFINAL].desc[i]);
1246
1247
1248         return 0;
1249
1250 error_out:
1251         rte_free(session->auth_key.data);
1252         rte_free(priv);
1253         return -1;
1254 }
1255
1256 static int
1257 dpaa2_sec_aead_init(struct rte_cryptodev *dev,
1258                     struct rte_crypto_sym_xform *xform,
1259                     dpaa2_sec_session *session)
1260 {
1261         struct dpaa2_sec_aead_ctxt *ctxt = &session->ext_params.aead_ctxt;
1262         struct dpaa2_sec_dev_private *dev_priv = dev->data->dev_private;
1263         struct alginfo aeaddata;
1264         unsigned int bufsize, i;
1265         struct ctxt_priv *priv;
1266         struct sec_flow_context *flc;
1267         struct rte_crypto_aead_xform *aead_xform = &xform->aead;
1268         int err;
1269
1270         PMD_INIT_FUNC_TRACE();
1271
1272         /* Set IV parameters */
1273         session->iv.offset = aead_xform->iv.offset;
1274         session->iv.length = aead_xform->iv.length;
1275         session->ctxt_type = DPAA2_SEC_AEAD;
1276
1277         /* For SEC AEAD only one descriptor is required */
1278         priv = (struct ctxt_priv *)rte_zmalloc(NULL,
1279                         sizeof(struct ctxt_priv) + sizeof(struct sec_flc_desc),
1280                         RTE_CACHE_LINE_SIZE);
1281         if (priv == NULL) {
1282                 RTE_LOG(ERR, PMD, "No Memory for priv CTXT\n");
1283                 return -1;
1284         }
1285
1286         priv->fle_pool = dev_priv->fle_pool;
1287         flc = &priv->flc_desc[0].flc;
1288
1289         session->aead_key.data = rte_zmalloc(NULL, aead_xform->key.length,
1290                                                RTE_CACHE_LINE_SIZE);
1291         if (session->aead_key.data == NULL && aead_xform->key.length > 0) {
1292                 RTE_LOG(ERR, PMD, "No Memory for aead key\n");
1293                 rte_free(priv);
1294                 return -1;
1295         }
1296         memcpy(session->aead_key.data, aead_xform->key.data,
1297                aead_xform->key.length);
1298
1299         session->digest_length = aead_xform->digest_length;
1300         session->aead_key.length = aead_xform->key.length;
1301         ctxt->auth_only_len = aead_xform->aad_length;
1302
1303         aeaddata.key = (uint64_t)session->aead_key.data;
1304         aeaddata.keylen = session->aead_key.length;
1305         aeaddata.key_enc_flags = 0;
1306         aeaddata.key_type = RTA_DATA_IMM;
1307
1308         switch (aead_xform->algo) {
1309         case RTE_CRYPTO_AEAD_AES_GCM:
1310                 aeaddata.algtype = OP_ALG_ALGSEL_AES;
1311                 aeaddata.algmode = OP_ALG_AAI_GCM;
1312                 session->aead_alg = RTE_CRYPTO_AEAD_AES_GCM;
1313                 break;
1314         case RTE_CRYPTO_AEAD_AES_CCM:
1315                 RTE_LOG(ERR, PMD, "Crypto: Unsupported AEAD alg %u\n",
1316                         aead_xform->algo);
1317                 goto error_out;
1318         default:
1319                 RTE_LOG(ERR, PMD, "Crypto: Undefined AEAD specified %u\n",
1320                         aead_xform->algo);
1321                 goto error_out;
1322         }
1323         session->dir = (aead_xform->op == RTE_CRYPTO_AEAD_OP_ENCRYPT) ?
1324                                 DIR_ENC : DIR_DEC;
1325
1326         priv->flc_desc[0].desc[0] = aeaddata.keylen;
1327         err = rta_inline_query(IPSEC_AUTH_VAR_AES_DEC_BASE_DESC_LEN,
1328                                MIN_JOB_DESC_SIZE,
1329                                (unsigned int *)priv->flc_desc[0].desc,
1330                                &priv->flc_desc[0].desc[1], 1);
1331
1332         if (err < 0) {
1333                 PMD_DRV_LOG(ERR, "Crypto: Incorrect key lengths\n");
1334                 goto error_out;
1335         }
1336         if (priv->flc_desc[0].desc[1] & 1) {
1337                 aeaddata.key_type = RTA_DATA_IMM;
1338         } else {
1339                 aeaddata.key = DPAA2_VADDR_TO_IOVA(aeaddata.key);
1340                 aeaddata.key_type = RTA_DATA_PTR;
1341         }
1342         priv->flc_desc[0].desc[0] = 0;
1343         priv->flc_desc[0].desc[1] = 0;
1344
1345         if (session->dir == DIR_ENC)
1346                 bufsize = cnstr_shdsc_gcm_encap(
1347                                 priv->flc_desc[0].desc, 1, 0,
1348                                 &aeaddata, session->iv.length,
1349                                 session->digest_length);
1350         else
1351                 bufsize = cnstr_shdsc_gcm_decap(
1352                                 priv->flc_desc[0].desc, 1, 0,
1353                                 &aeaddata, session->iv.length,
1354                                 session->digest_length);
1355         flc->word1_sdl = (uint8_t)bufsize;
1356         flc->word2_rflc_31_0 = lower_32_bits(
1357                         (uint64_t)&(((struct dpaa2_sec_qp *)
1358                         dev->data->queue_pairs[0])->rx_vq));
1359         flc->word3_rflc_63_32 = upper_32_bits(
1360                         (uint64_t)&(((struct dpaa2_sec_qp *)
1361                         dev->data->queue_pairs[0])->rx_vq));
1362         session->ctxt = priv;
1363         for (i = 0; i < bufsize; i++)
1364                 PMD_DRV_LOG(DEBUG, "DESC[%d]:0x%x\n",
1365                             i, priv->flc_desc[0].desc[i]);
1366
1367         return 0;
1368
1369 error_out:
1370         rte_free(session->aead_key.data);
1371         rte_free(priv);
1372         return -1;
1373 }
1374
1375
1376 static int
1377 dpaa2_sec_aead_chain_init(struct rte_cryptodev *dev,
1378                     struct rte_crypto_sym_xform *xform,
1379                     dpaa2_sec_session *session)
1380 {
1381         struct dpaa2_sec_aead_ctxt *ctxt = &session->ext_params.aead_ctxt;
1382         struct dpaa2_sec_dev_private *dev_priv = dev->data->dev_private;
1383         struct alginfo authdata, cipherdata;
1384         unsigned int bufsize, i;
1385         struct ctxt_priv *priv;
1386         struct sec_flow_context *flc;
1387         struct rte_crypto_cipher_xform *cipher_xform;
1388         struct rte_crypto_auth_xform *auth_xform;
1389         int err;
1390
1391         PMD_INIT_FUNC_TRACE();
1392
1393         if (session->ext_params.aead_ctxt.auth_cipher_text) {
1394                 cipher_xform = &xform->cipher;
1395                 auth_xform = &xform->next->auth;
1396                 session->ctxt_type =
1397                         (cipher_xform->op == RTE_CRYPTO_CIPHER_OP_ENCRYPT) ?
1398                         DPAA2_SEC_CIPHER_HASH : DPAA2_SEC_HASH_CIPHER;
1399         } else {
1400                 cipher_xform = &xform->next->cipher;
1401                 auth_xform = &xform->auth;
1402                 session->ctxt_type =
1403                         (cipher_xform->op == RTE_CRYPTO_CIPHER_OP_ENCRYPT) ?
1404                         DPAA2_SEC_HASH_CIPHER : DPAA2_SEC_CIPHER_HASH;
1405         }
1406
1407         /* Set IV parameters */
1408         session->iv.offset = cipher_xform->iv.offset;
1409         session->iv.length = cipher_xform->iv.length;
1410
1411         /* For SEC AEAD only one descriptor is required */
1412         priv = (struct ctxt_priv *)rte_zmalloc(NULL,
1413                         sizeof(struct ctxt_priv) + sizeof(struct sec_flc_desc),
1414                         RTE_CACHE_LINE_SIZE);
1415         if (priv == NULL) {
1416                 RTE_LOG(ERR, PMD, "No Memory for priv CTXT\n");
1417                 return -1;
1418         }
1419
1420         priv->fle_pool = dev_priv->fle_pool;
1421         flc = &priv->flc_desc[0].flc;
1422
1423         session->cipher_key.data = rte_zmalloc(NULL, cipher_xform->key.length,
1424                                                RTE_CACHE_LINE_SIZE);
1425         if (session->cipher_key.data == NULL && cipher_xform->key.length > 0) {
1426                 RTE_LOG(ERR, PMD, "No Memory for cipher key\n");
1427                 rte_free(priv);
1428                 return -1;
1429         }
1430         session->cipher_key.length = cipher_xform->key.length;
1431         session->auth_key.data = rte_zmalloc(NULL, auth_xform->key.length,
1432                                              RTE_CACHE_LINE_SIZE);
1433         if (session->auth_key.data == NULL && auth_xform->key.length > 0) {
1434                 RTE_LOG(ERR, PMD, "No Memory for auth key\n");
1435                 rte_free(session->cipher_key.data);
1436                 rte_free(priv);
1437                 return -1;
1438         }
1439         session->auth_key.length = auth_xform->key.length;
1440         memcpy(session->cipher_key.data, cipher_xform->key.data,
1441                cipher_xform->key.length);
1442         memcpy(session->auth_key.data, auth_xform->key.data,
1443                auth_xform->key.length);
1444
1445         authdata.key = (uint64_t)session->auth_key.data;
1446         authdata.keylen = session->auth_key.length;
1447         authdata.key_enc_flags = 0;
1448         authdata.key_type = RTA_DATA_IMM;
1449
1450         session->digest_length = auth_xform->digest_length;
1451
1452         switch (auth_xform->algo) {
1453         case RTE_CRYPTO_AUTH_SHA1_HMAC:
1454                 authdata.algtype = OP_ALG_ALGSEL_SHA1;
1455                 authdata.algmode = OP_ALG_AAI_HMAC;
1456                 session->auth_alg = RTE_CRYPTO_AUTH_SHA1_HMAC;
1457                 break;
1458         case RTE_CRYPTO_AUTH_MD5_HMAC:
1459                 authdata.algtype = OP_ALG_ALGSEL_MD5;
1460                 authdata.algmode = OP_ALG_AAI_HMAC;
1461                 session->auth_alg = RTE_CRYPTO_AUTH_MD5_HMAC;
1462                 break;
1463         case RTE_CRYPTO_AUTH_SHA224_HMAC:
1464                 authdata.algtype = OP_ALG_ALGSEL_SHA224;
1465                 authdata.algmode = OP_ALG_AAI_HMAC;
1466                 session->auth_alg = RTE_CRYPTO_AUTH_SHA224_HMAC;
1467                 break;
1468         case RTE_CRYPTO_AUTH_SHA256_HMAC:
1469                 authdata.algtype = OP_ALG_ALGSEL_SHA256;
1470                 authdata.algmode = OP_ALG_AAI_HMAC;
1471                 session->auth_alg = RTE_CRYPTO_AUTH_SHA256_HMAC;
1472                 break;
1473         case RTE_CRYPTO_AUTH_SHA384_HMAC:
1474                 authdata.algtype = OP_ALG_ALGSEL_SHA384;
1475                 authdata.algmode = OP_ALG_AAI_HMAC;
1476                 session->auth_alg = RTE_CRYPTO_AUTH_SHA384_HMAC;
1477                 break;
1478         case RTE_CRYPTO_AUTH_SHA512_HMAC:
1479                 authdata.algtype = OP_ALG_ALGSEL_SHA512;
1480                 authdata.algmode = OP_ALG_AAI_HMAC;
1481                 session->auth_alg = RTE_CRYPTO_AUTH_SHA512_HMAC;
1482                 break;
1483         case RTE_CRYPTO_AUTH_AES_XCBC_MAC:
1484         case RTE_CRYPTO_AUTH_SNOW3G_UIA2:
1485         case RTE_CRYPTO_AUTH_NULL:
1486         case RTE_CRYPTO_AUTH_SHA1:
1487         case RTE_CRYPTO_AUTH_SHA256:
1488         case RTE_CRYPTO_AUTH_SHA512:
1489         case RTE_CRYPTO_AUTH_SHA224:
1490         case RTE_CRYPTO_AUTH_SHA384:
1491         case RTE_CRYPTO_AUTH_MD5:
1492         case RTE_CRYPTO_AUTH_AES_GMAC:
1493         case RTE_CRYPTO_AUTH_KASUMI_F9:
1494         case RTE_CRYPTO_AUTH_AES_CMAC:
1495         case RTE_CRYPTO_AUTH_AES_CBC_MAC:
1496         case RTE_CRYPTO_AUTH_ZUC_EIA3:
1497                 RTE_LOG(ERR, PMD, "Crypto: Unsupported auth alg %u\n",
1498                         auth_xform->algo);
1499                 goto error_out;
1500         default:
1501                 RTE_LOG(ERR, PMD, "Crypto: Undefined Auth specified %u\n",
1502                         auth_xform->algo);
1503                 goto error_out;
1504         }
1505         cipherdata.key = (uint64_t)session->cipher_key.data;
1506         cipherdata.keylen = session->cipher_key.length;
1507         cipherdata.key_enc_flags = 0;
1508         cipherdata.key_type = RTA_DATA_IMM;
1509
1510         switch (cipher_xform->algo) {
1511         case RTE_CRYPTO_CIPHER_AES_CBC:
1512                 cipherdata.algtype = OP_ALG_ALGSEL_AES;
1513                 cipherdata.algmode = OP_ALG_AAI_CBC;
1514                 session->cipher_alg = RTE_CRYPTO_CIPHER_AES_CBC;
1515                 break;
1516         case RTE_CRYPTO_CIPHER_3DES_CBC:
1517                 cipherdata.algtype = OP_ALG_ALGSEL_3DES;
1518                 cipherdata.algmode = OP_ALG_AAI_CBC;
1519                 session->cipher_alg = RTE_CRYPTO_CIPHER_3DES_CBC;
1520                 break;
1521         case RTE_CRYPTO_CIPHER_AES_CTR:
1522                 cipherdata.algtype = OP_ALG_ALGSEL_AES;
1523                 cipherdata.algmode = OP_ALG_AAI_CTR;
1524                 session->cipher_alg = RTE_CRYPTO_CIPHER_AES_CTR;
1525                 break;
1526         case RTE_CRYPTO_CIPHER_SNOW3G_UEA2:
1527         case RTE_CRYPTO_CIPHER_NULL:
1528         case RTE_CRYPTO_CIPHER_3DES_ECB:
1529         case RTE_CRYPTO_CIPHER_AES_ECB:
1530         case RTE_CRYPTO_CIPHER_KASUMI_F8:
1531                 RTE_LOG(ERR, PMD, "Crypto: Unsupported Cipher alg %u\n",
1532                         cipher_xform->algo);
1533                 goto error_out;
1534         default:
1535                 RTE_LOG(ERR, PMD, "Crypto: Undefined Cipher specified %u\n",
1536                         cipher_xform->algo);
1537                 goto error_out;
1538         }
1539         session->dir = (cipher_xform->op == RTE_CRYPTO_CIPHER_OP_ENCRYPT) ?
1540                                 DIR_ENC : DIR_DEC;
1541
1542         priv->flc_desc[0].desc[0] = cipherdata.keylen;
1543         priv->flc_desc[0].desc[1] = authdata.keylen;
1544         err = rta_inline_query(IPSEC_AUTH_VAR_AES_DEC_BASE_DESC_LEN,
1545                                MIN_JOB_DESC_SIZE,
1546                                (unsigned int *)priv->flc_desc[0].desc,
1547                                &priv->flc_desc[0].desc[2], 2);
1548
1549         if (err < 0) {
1550                 PMD_DRV_LOG(ERR, "Crypto: Incorrect key lengths\n");
1551                 goto error_out;
1552         }
1553         if (priv->flc_desc[0].desc[2] & 1) {
1554                 cipherdata.key_type = RTA_DATA_IMM;
1555         } else {
1556                 cipherdata.key = DPAA2_VADDR_TO_IOVA(cipherdata.key);
1557                 cipherdata.key_type = RTA_DATA_PTR;
1558         }
1559         if (priv->flc_desc[0].desc[2] & (1 << 1)) {
1560                 authdata.key_type = RTA_DATA_IMM;
1561         } else {
1562                 authdata.key = DPAA2_VADDR_TO_IOVA(authdata.key);
1563                 authdata.key_type = RTA_DATA_PTR;
1564         }
1565         priv->flc_desc[0].desc[0] = 0;
1566         priv->flc_desc[0].desc[1] = 0;
1567         priv->flc_desc[0].desc[2] = 0;
1568
1569         if (session->ctxt_type == DPAA2_SEC_CIPHER_HASH) {
1570                 bufsize = cnstr_shdsc_authenc(priv->flc_desc[0].desc, 1,
1571                                               0, &cipherdata, &authdata,
1572                                               session->iv.length,
1573                                               ctxt->auth_only_len,
1574                                               session->digest_length,
1575                                               session->dir);
1576         } else {
1577                 RTE_LOG(ERR, PMD, "Hash before cipher not supported\n");
1578                 goto error_out;
1579         }
1580
1581         flc->word1_sdl = (uint8_t)bufsize;
1582         flc->word2_rflc_31_0 = lower_32_bits(
1583                         (uint64_t)&(((struct dpaa2_sec_qp *)
1584                         dev->data->queue_pairs[0])->rx_vq));
1585         flc->word3_rflc_63_32 = upper_32_bits(
1586                         (uint64_t)&(((struct dpaa2_sec_qp *)
1587                         dev->data->queue_pairs[0])->rx_vq));
1588         session->ctxt = priv;
1589         for (i = 0; i < bufsize; i++)
1590                 PMD_DRV_LOG(DEBUG, "DESC[%d]:0x%x\n",
1591                             i, priv->flc_desc[0].desc[i]);
1592
1593         return 0;
1594
1595 error_out:
1596         rte_free(session->cipher_key.data);
1597         rte_free(session->auth_key.data);
1598         rte_free(priv);
1599         return -1;
1600 }
1601
1602 static int
1603 dpaa2_sec_set_session_parameters(struct rte_cryptodev *dev,
1604                             struct rte_crypto_sym_xform *xform, void *sess)
1605 {
1606         dpaa2_sec_session *session = sess;
1607
1608         PMD_INIT_FUNC_TRACE();
1609
1610         if (unlikely(sess == NULL)) {
1611                 RTE_LOG(ERR, PMD, "invalid session struct\n");
1612                 return -1;
1613         }
1614
1615         /* Default IV length = 0 */
1616         session->iv.length = 0;
1617
1618         /* Cipher Only */
1619         if (xform->type == RTE_CRYPTO_SYM_XFORM_CIPHER && xform->next == NULL) {
1620                 session->ctxt_type = DPAA2_SEC_CIPHER;
1621                 dpaa2_sec_cipher_init(dev, xform, session);
1622
1623         /* Authentication Only */
1624         } else if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH &&
1625                    xform->next == NULL) {
1626                 session->ctxt_type = DPAA2_SEC_AUTH;
1627                 dpaa2_sec_auth_init(dev, xform, session);
1628
1629         /* Cipher then Authenticate */
1630         } else if (xform->type == RTE_CRYPTO_SYM_XFORM_CIPHER &&
1631                    xform->next->type == RTE_CRYPTO_SYM_XFORM_AUTH) {
1632                 session->ext_params.aead_ctxt.auth_cipher_text = true;
1633                 dpaa2_sec_aead_chain_init(dev, xform, session);
1634
1635         /* Authenticate then Cipher */
1636         } else if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH &&
1637                    xform->next->type == RTE_CRYPTO_SYM_XFORM_CIPHER) {
1638                 session->ext_params.aead_ctxt.auth_cipher_text = false;
1639                 dpaa2_sec_aead_chain_init(dev, xform, session);
1640
1641         /* AEAD operation for AES-GCM kind of Algorithms */
1642         } else if (xform->type == RTE_CRYPTO_SYM_XFORM_AEAD &&
1643                    xform->next == NULL) {
1644                 dpaa2_sec_aead_init(dev, xform, session);
1645
1646         } else {
1647                 RTE_LOG(ERR, PMD, "Invalid crypto type\n");
1648                 return -EINVAL;
1649         }
1650
1651         return 0;
1652 }
1653
1654 static int
1655 dpaa2_sec_set_ipsec_session(struct rte_cryptodev *dev,
1656                             struct rte_security_session_conf *conf,
1657                             void *sess)
1658 {
1659         struct rte_security_ipsec_xform *ipsec_xform = &conf->ipsec;
1660         struct rte_crypto_auth_xform *auth_xform;
1661         struct rte_crypto_cipher_xform *cipher_xform;
1662         dpaa2_sec_session *session = (dpaa2_sec_session *)sess;
1663         struct ctxt_priv *priv;
1664         struct ipsec_encap_pdb encap_pdb;
1665         struct ipsec_decap_pdb decap_pdb;
1666         struct alginfo authdata, cipherdata;
1667         unsigned int bufsize;
1668         struct sec_flow_context *flc;
1669
1670         PMD_INIT_FUNC_TRACE();
1671
1672         if (ipsec_xform->direction == RTE_SECURITY_IPSEC_SA_DIR_EGRESS) {
1673                 cipher_xform = &conf->crypto_xform->cipher;
1674                 auth_xform = &conf->crypto_xform->next->auth;
1675         } else {
1676                 auth_xform = &conf->crypto_xform->auth;
1677                 cipher_xform = &conf->crypto_xform->next->cipher;
1678         }
1679         priv = (struct ctxt_priv *)rte_zmalloc(NULL,
1680                                 sizeof(struct ctxt_priv) +
1681                                 sizeof(struct sec_flc_desc),
1682                                 RTE_CACHE_LINE_SIZE);
1683
1684         if (priv == NULL) {
1685                 RTE_LOG(ERR, PMD, "\nNo memory for priv CTXT");
1686                 return -ENOMEM;
1687         }
1688
1689         flc = &priv->flc_desc[0].flc;
1690
1691         session->ctxt_type = DPAA2_SEC_IPSEC;
1692         session->cipher_key.data = rte_zmalloc(NULL,
1693                                                cipher_xform->key.length,
1694                                                RTE_CACHE_LINE_SIZE);
1695         if (session->cipher_key.data == NULL &&
1696                         cipher_xform->key.length > 0) {
1697                 RTE_LOG(ERR, PMD, "No Memory for cipher key\n");
1698                 rte_free(priv);
1699                 return -ENOMEM;
1700         }
1701
1702         session->cipher_key.length = cipher_xform->key.length;
1703         session->auth_key.data = rte_zmalloc(NULL,
1704                                         auth_xform->key.length,
1705                                         RTE_CACHE_LINE_SIZE);
1706         if (session->auth_key.data == NULL &&
1707                         auth_xform->key.length > 0) {
1708                 RTE_LOG(ERR, PMD, "No Memory for auth key\n");
1709                 rte_free(session->cipher_key.data);
1710                 rte_free(priv);
1711                 return -ENOMEM;
1712         }
1713         session->auth_key.length = auth_xform->key.length;
1714         memcpy(session->cipher_key.data, cipher_xform->key.data,
1715                         cipher_xform->key.length);
1716         memcpy(session->auth_key.data, auth_xform->key.data,
1717                         auth_xform->key.length);
1718
1719         authdata.key = (uint64_t)session->auth_key.data;
1720         authdata.keylen = session->auth_key.length;
1721         authdata.key_enc_flags = 0;
1722         authdata.key_type = RTA_DATA_IMM;
1723         switch (auth_xform->algo) {
1724         case RTE_CRYPTO_AUTH_SHA1_HMAC:
1725                 authdata.algtype = OP_PCL_IPSEC_HMAC_SHA1_96;
1726                 authdata.algmode = OP_ALG_AAI_HMAC;
1727                 session->auth_alg = RTE_CRYPTO_AUTH_SHA1_HMAC;
1728                 break;
1729         case RTE_CRYPTO_AUTH_MD5_HMAC:
1730                 authdata.algtype = OP_PCL_IPSEC_HMAC_MD5_96;
1731                 authdata.algmode = OP_ALG_AAI_HMAC;
1732                 session->auth_alg = RTE_CRYPTO_AUTH_MD5_HMAC;
1733                 break;
1734         case RTE_CRYPTO_AUTH_SHA256_HMAC:
1735                 authdata.algtype = OP_PCL_IPSEC_HMAC_SHA2_256_128;
1736                 authdata.algmode = OP_ALG_AAI_HMAC;
1737                 session->auth_alg = RTE_CRYPTO_AUTH_SHA256_HMAC;
1738                 break;
1739         case RTE_CRYPTO_AUTH_SHA384_HMAC:
1740                 authdata.algtype = OP_PCL_IPSEC_HMAC_SHA2_384_192;
1741                 authdata.algmode = OP_ALG_AAI_HMAC;
1742                 session->auth_alg = RTE_CRYPTO_AUTH_SHA384_HMAC;
1743                 break;
1744         case RTE_CRYPTO_AUTH_SHA512_HMAC:
1745                 authdata.algtype = OP_PCL_IPSEC_HMAC_SHA2_512_256;
1746                 authdata.algmode = OP_ALG_AAI_HMAC;
1747                 session->auth_alg = RTE_CRYPTO_AUTH_SHA512_HMAC;
1748                 break;
1749         case RTE_CRYPTO_AUTH_AES_CMAC:
1750                 authdata.algtype = OP_PCL_IPSEC_AES_CMAC_96;
1751                 session->auth_alg = RTE_CRYPTO_AUTH_AES_CMAC;
1752                 break;
1753         case RTE_CRYPTO_AUTH_NULL:
1754                 authdata.algtype = OP_PCL_IPSEC_HMAC_NULL;
1755                 session->auth_alg = RTE_CRYPTO_AUTH_NULL;
1756                 break;
1757         case RTE_CRYPTO_AUTH_SHA224_HMAC:
1758         case RTE_CRYPTO_AUTH_AES_XCBC_MAC:
1759         case RTE_CRYPTO_AUTH_SNOW3G_UIA2:
1760         case RTE_CRYPTO_AUTH_SHA1:
1761         case RTE_CRYPTO_AUTH_SHA256:
1762         case RTE_CRYPTO_AUTH_SHA512:
1763         case RTE_CRYPTO_AUTH_SHA224:
1764         case RTE_CRYPTO_AUTH_SHA384:
1765         case RTE_CRYPTO_AUTH_MD5:
1766         case RTE_CRYPTO_AUTH_AES_GMAC:
1767         case RTE_CRYPTO_AUTH_KASUMI_F9:
1768         case RTE_CRYPTO_AUTH_AES_CBC_MAC:
1769         case RTE_CRYPTO_AUTH_ZUC_EIA3:
1770                 RTE_LOG(ERR, PMD, "Crypto: Unsupported auth alg %u\n",
1771                         auth_xform->algo);
1772                 goto out;
1773         default:
1774                 RTE_LOG(ERR, PMD, "Crypto: Undefined Auth specified %u\n",
1775                         auth_xform->algo);
1776                 goto out;
1777         }
1778         cipherdata.key = (uint64_t)session->cipher_key.data;
1779         cipherdata.keylen = session->cipher_key.length;
1780         cipherdata.key_enc_flags = 0;
1781         cipherdata.key_type = RTA_DATA_IMM;
1782
1783         switch (cipher_xform->algo) {
1784         case RTE_CRYPTO_CIPHER_AES_CBC:
1785                 cipherdata.algtype = OP_PCL_IPSEC_AES_CBC;
1786                 cipherdata.algmode = OP_ALG_AAI_CBC;
1787                 session->cipher_alg = RTE_CRYPTO_CIPHER_AES_CBC;
1788                 break;
1789         case RTE_CRYPTO_CIPHER_3DES_CBC:
1790                 cipherdata.algtype = OP_PCL_IPSEC_3DES;
1791                 cipherdata.algmode = OP_ALG_AAI_CBC;
1792                 session->cipher_alg = RTE_CRYPTO_CIPHER_3DES_CBC;
1793                 break;
1794         case RTE_CRYPTO_CIPHER_AES_CTR:
1795                 cipherdata.algtype = OP_PCL_IPSEC_AES_CTR;
1796                 cipherdata.algmode = OP_ALG_AAI_CTR;
1797                 session->cipher_alg = RTE_CRYPTO_CIPHER_AES_CTR;
1798                 break;
1799         case RTE_CRYPTO_CIPHER_NULL:
1800                 cipherdata.algtype = OP_PCL_IPSEC_NULL;
1801                 break;
1802         case RTE_CRYPTO_CIPHER_SNOW3G_UEA2:
1803         case RTE_CRYPTO_CIPHER_3DES_ECB:
1804         case RTE_CRYPTO_CIPHER_AES_ECB:
1805         case RTE_CRYPTO_CIPHER_KASUMI_F8:
1806                 RTE_LOG(ERR, PMD, "Crypto: Unsupported Cipher alg %u\n",
1807                         cipher_xform->algo);
1808                 goto out;
1809         default:
1810                 RTE_LOG(ERR, PMD, "Crypto: Undefined Cipher specified %u\n",
1811                         cipher_xform->algo);
1812                 goto out;
1813         }
1814
1815         if (ipsec_xform->direction == RTE_SECURITY_IPSEC_SA_DIR_EGRESS) {
1816                 struct ip ip4_hdr;
1817
1818                 flc->dhr = SEC_FLC_DHR_OUTBOUND;
1819                 ip4_hdr.ip_v = IPVERSION;
1820                 ip4_hdr.ip_hl = 5;
1821                 ip4_hdr.ip_len = rte_cpu_to_be_16(sizeof(ip4_hdr));
1822                 ip4_hdr.ip_tos = ipsec_xform->tunnel.ipv4.dscp;
1823                 ip4_hdr.ip_id = 0;
1824                 ip4_hdr.ip_off = 0;
1825                 ip4_hdr.ip_ttl = ipsec_xform->tunnel.ipv4.ttl;
1826                 ip4_hdr.ip_p = 0x32;
1827                 ip4_hdr.ip_sum = 0;
1828                 ip4_hdr.ip_src = ipsec_xform->tunnel.ipv4.src_ip;
1829                 ip4_hdr.ip_dst = ipsec_xform->tunnel.ipv4.dst_ip;
1830                 ip4_hdr.ip_sum = calc_chksum((uint16_t *)(void *)&ip4_hdr,
1831                         sizeof(struct ip));
1832
1833                 /* For Sec Proto only one descriptor is required. */
1834                 memset(&encap_pdb, 0, sizeof(struct ipsec_encap_pdb));
1835                 encap_pdb.options = (IPVERSION << PDBNH_ESP_ENCAP_SHIFT) |
1836                         PDBOPTS_ESP_OIHI_PDB_INL |
1837                         PDBOPTS_ESP_IVSRC |
1838                         PDBHMO_ESP_ENCAP_DTTL;
1839                 encap_pdb.spi = ipsec_xform->spi;
1840                 encap_pdb.ip_hdr_len = sizeof(struct ip);
1841
1842                 session->dir = DIR_ENC;
1843                 bufsize = cnstr_shdsc_ipsec_new_encap(priv->flc_desc[0].desc,
1844                                 1, 0, &encap_pdb,
1845                                 (uint8_t *)&ip4_hdr,
1846                                 &cipherdata, &authdata);
1847         } else if (ipsec_xform->direction ==
1848                         RTE_SECURITY_IPSEC_SA_DIR_INGRESS) {
1849                 flc->dhr = SEC_FLC_DHR_INBOUND;
1850                 memset(&decap_pdb, 0, sizeof(struct ipsec_decap_pdb));
1851                 decap_pdb.options = sizeof(struct ip) << 16;
1852                 session->dir = DIR_DEC;
1853                 bufsize = cnstr_shdsc_ipsec_new_decap(priv->flc_desc[0].desc,
1854                                 1, 0, &decap_pdb, &cipherdata, &authdata);
1855         } else
1856                 goto out;
1857         flc->word1_sdl = (uint8_t)bufsize;
1858
1859         /* Enable the stashing control bit */
1860         DPAA2_SET_FLC_RSC(flc);
1861         flc->word2_rflc_31_0 = lower_32_bits(
1862                         (uint64_t)&(((struct dpaa2_sec_qp *)
1863                         dev->data->queue_pairs[0])->rx_vq) | 0x14);
1864         flc->word3_rflc_63_32 = upper_32_bits(
1865                         (uint64_t)&(((struct dpaa2_sec_qp *)
1866                         dev->data->queue_pairs[0])->rx_vq));
1867
1868         /* Set EWS bit i.e. enable write-safe */
1869         DPAA2_SET_FLC_EWS(flc);
1870         /* Set BS = 1 i.e reuse input buffers as output buffers */
1871         DPAA2_SET_FLC_REUSE_BS(flc);
1872         /* Set FF = 10; reuse input buffers if they provide sufficient space */
1873         DPAA2_SET_FLC_REUSE_FF(flc);
1874
1875         session->ctxt = priv;
1876
1877         return 0;
1878 out:
1879         rte_free(session->auth_key.data);
1880         rte_free(session->cipher_key.data);
1881         rte_free(priv);
1882         return -1;
1883 }
1884
1885 static int
1886 dpaa2_sec_security_session_create(void *dev,
1887                                   struct rte_security_session_conf *conf,
1888                                   struct rte_security_session *sess,
1889                                   struct rte_mempool *mempool)
1890 {
1891         void *sess_private_data;
1892         struct rte_cryptodev *cdev = (struct rte_cryptodev *)dev;
1893         int ret;
1894
1895         if (rte_mempool_get(mempool, &sess_private_data)) {
1896                 CDEV_LOG_ERR(
1897                         "Couldn't get object from session mempool");
1898                 return -ENOMEM;
1899         }
1900
1901         switch (conf->protocol) {
1902         case RTE_SECURITY_PROTOCOL_IPSEC:
1903                 ret = dpaa2_sec_set_ipsec_session(cdev, conf,
1904                                 sess_private_data);
1905                 break;
1906         case RTE_SECURITY_PROTOCOL_MACSEC:
1907                 return -ENOTSUP;
1908         default:
1909                 return -EINVAL;
1910         }
1911         if (ret != 0) {
1912                 PMD_DRV_LOG(ERR,
1913                         "DPAA2 PMD: failed to configure session parameters");
1914
1915                 /* Return session to mempool */
1916                 rte_mempool_put(mempool, sess_private_data);
1917                 return ret;
1918         }
1919
1920         set_sec_session_private_data(sess, sess_private_data);
1921
1922         return ret;
1923 }
1924
1925 /** Clear the memory of session so it doesn't leave key material behind */
1926 static int
1927 dpaa2_sec_security_session_destroy(void *dev __rte_unused,
1928                 struct rte_security_session *sess)
1929 {
1930         PMD_INIT_FUNC_TRACE();
1931         void *sess_priv = get_sec_session_private_data(sess);
1932
1933         dpaa2_sec_session *s = (dpaa2_sec_session *)sess_priv;
1934
1935         if (sess_priv) {
1936                 struct rte_mempool *sess_mp = rte_mempool_from_obj(sess_priv);
1937
1938                 rte_free(s->ctxt);
1939                 rte_free(s->cipher_key.data);
1940                 rte_free(s->auth_key.data);
1941                 memset(sess, 0, sizeof(dpaa2_sec_session));
1942                 set_sec_session_private_data(sess, NULL);
1943                 rte_mempool_put(sess_mp, sess_priv);
1944         }
1945         return 0;
1946 }
1947
1948 static int
1949 dpaa2_sec_session_configure(struct rte_cryptodev *dev,
1950                 struct rte_crypto_sym_xform *xform,
1951                 struct rte_cryptodev_sym_session *sess,
1952                 struct rte_mempool *mempool)
1953 {
1954         void *sess_private_data;
1955         int ret;
1956
1957         if (rte_mempool_get(mempool, &sess_private_data)) {
1958                 CDEV_LOG_ERR(
1959                         "Couldn't get object from session mempool");
1960                 return -ENOMEM;
1961         }
1962
1963         ret = dpaa2_sec_set_session_parameters(dev, xform, sess_private_data);
1964         if (ret != 0) {
1965                 PMD_DRV_LOG(ERR, "DPAA2 PMD: failed to configure "
1966                                 "session parameters");
1967
1968                 /* Return session to mempool */
1969                 rte_mempool_put(mempool, sess_private_data);
1970                 return ret;
1971         }
1972
1973         set_session_private_data(sess, dev->driver_id,
1974                 sess_private_data);
1975
1976         return 0;
1977 }
1978
1979 /** Clear the memory of session so it doesn't leave key material behind */
1980 static void
1981 dpaa2_sec_session_clear(struct rte_cryptodev *dev,
1982                 struct rte_cryptodev_sym_session *sess)
1983 {
1984         PMD_INIT_FUNC_TRACE();
1985         uint8_t index = dev->driver_id;
1986         void *sess_priv = get_session_private_data(sess, index);
1987         dpaa2_sec_session *s = (dpaa2_sec_session *)sess_priv;
1988
1989         if (sess_priv) {
1990                 rte_free(s->ctxt);
1991                 rte_free(s->cipher_key.data);
1992                 rte_free(s->auth_key.data);
1993                 memset(sess, 0, sizeof(dpaa2_sec_session));
1994                 struct rte_mempool *sess_mp = rte_mempool_from_obj(sess_priv);
1995                 set_session_private_data(sess, index, NULL);
1996                 rte_mempool_put(sess_mp, sess_priv);
1997         }
1998 }
1999
2000 static int
2001 dpaa2_sec_dev_configure(struct rte_cryptodev *dev __rte_unused,
2002                         struct rte_cryptodev_config *config __rte_unused)
2003 {
2004         PMD_INIT_FUNC_TRACE();
2005
2006         return 0;
2007 }
2008
2009 static int
2010 dpaa2_sec_dev_start(struct rte_cryptodev *dev)
2011 {
2012         struct dpaa2_sec_dev_private *priv = dev->data->dev_private;
2013         struct fsl_mc_io *dpseci = (struct fsl_mc_io *)priv->hw;
2014         struct dpseci_attr attr;
2015         struct dpaa2_queue *dpaa2_q;
2016         struct dpaa2_sec_qp **qp = (struct dpaa2_sec_qp **)
2017                                         dev->data->queue_pairs;
2018         struct dpseci_rx_queue_attr rx_attr;
2019         struct dpseci_tx_queue_attr tx_attr;
2020         int ret, i;
2021
2022         PMD_INIT_FUNC_TRACE();
2023
2024         memset(&attr, 0, sizeof(struct dpseci_attr));
2025
2026         ret = dpseci_enable(dpseci, CMD_PRI_LOW, priv->token);
2027         if (ret) {
2028                 PMD_INIT_LOG(ERR, "DPSECI with HW_ID = %d ENABLE FAILED\n",
2029                              priv->hw_id);
2030                 goto get_attr_failure;
2031         }
2032         ret = dpseci_get_attributes(dpseci, CMD_PRI_LOW, priv->token, &attr);
2033         if (ret) {
2034                 PMD_INIT_LOG(ERR,
2035                              "DPSEC ATTRIBUTE READ FAILED, disabling DPSEC\n");
2036                 goto get_attr_failure;
2037         }
2038         for (i = 0; i < attr.num_rx_queues && qp[i]; i++) {
2039                 dpaa2_q = &qp[i]->rx_vq;
2040                 dpseci_get_rx_queue(dpseci, CMD_PRI_LOW, priv->token, i,
2041                                     &rx_attr);
2042                 dpaa2_q->fqid = rx_attr.fqid;
2043                 PMD_INIT_LOG(DEBUG, "rx_fqid: %d", dpaa2_q->fqid);
2044         }
2045         for (i = 0; i < attr.num_tx_queues && qp[i]; i++) {
2046                 dpaa2_q = &qp[i]->tx_vq;
2047                 dpseci_get_tx_queue(dpseci, CMD_PRI_LOW, priv->token, i,
2048                                     &tx_attr);
2049                 dpaa2_q->fqid = tx_attr.fqid;
2050                 PMD_INIT_LOG(DEBUG, "tx_fqid: %d", dpaa2_q->fqid);
2051         }
2052
2053         return 0;
2054 get_attr_failure:
2055         dpseci_disable(dpseci, CMD_PRI_LOW, priv->token);
2056         return -1;
2057 }
2058
2059 static void
2060 dpaa2_sec_dev_stop(struct rte_cryptodev *dev)
2061 {
2062         struct dpaa2_sec_dev_private *priv = dev->data->dev_private;
2063         struct fsl_mc_io *dpseci = (struct fsl_mc_io *)priv->hw;
2064         int ret;
2065
2066         PMD_INIT_FUNC_TRACE();
2067
2068         ret = dpseci_disable(dpseci, CMD_PRI_LOW, priv->token);
2069         if (ret) {
2070                 PMD_INIT_LOG(ERR, "Failure in disabling dpseci %d device",
2071                              priv->hw_id);
2072                 return;
2073         }
2074
2075         ret = dpseci_reset(dpseci, CMD_PRI_LOW, priv->token);
2076         if (ret < 0) {
2077                 PMD_INIT_LOG(ERR, "SEC Device cannot be reset:Error = %0x\n",
2078                              ret);
2079                 return;
2080         }
2081 }
2082
2083 static int
2084 dpaa2_sec_dev_close(struct rte_cryptodev *dev)
2085 {
2086         struct dpaa2_sec_dev_private *priv = dev->data->dev_private;
2087         struct fsl_mc_io *dpseci = (struct fsl_mc_io *)priv->hw;
2088         int ret;
2089
2090         PMD_INIT_FUNC_TRACE();
2091
2092         /* Function is reverse of dpaa2_sec_dev_init.
2093          * It does the following:
2094          * 1. Detach a DPSECI from attached resources i.e. buffer pools, dpbp_id
2095          * 2. Close the DPSECI device
2096          * 3. Free the allocated resources.
2097          */
2098
2099         /*Close the device at underlying layer*/
2100         ret = dpseci_close(dpseci, CMD_PRI_LOW, priv->token);
2101         if (ret) {
2102                 PMD_INIT_LOG(ERR, "Failure closing dpseci device with"
2103                              " error code %d\n", ret);
2104                 return -1;
2105         }
2106
2107         /*Free the allocated memory for ethernet private data and dpseci*/
2108         priv->hw = NULL;
2109         rte_free(dpseci);
2110
2111         return 0;
2112 }
2113
2114 static void
2115 dpaa2_sec_dev_infos_get(struct rte_cryptodev *dev,
2116                         struct rte_cryptodev_info *info)
2117 {
2118         struct dpaa2_sec_dev_private *internals = dev->data->dev_private;
2119
2120         PMD_INIT_FUNC_TRACE();
2121         if (info != NULL) {
2122                 info->max_nb_queue_pairs = internals->max_nb_queue_pairs;
2123                 info->feature_flags = dev->feature_flags;
2124                 info->capabilities = dpaa2_sec_capabilities;
2125                 info->sym.max_nb_sessions = internals->max_nb_sessions;
2126                 info->driver_id = cryptodev_driver_id;
2127         }
2128 }
2129
2130 static
2131 void dpaa2_sec_stats_get(struct rte_cryptodev *dev,
2132                          struct rte_cryptodev_stats *stats)
2133 {
2134         struct dpaa2_sec_dev_private *priv = dev->data->dev_private;
2135         struct fsl_mc_io *dpseci = (struct fsl_mc_io *)priv->hw;
2136         struct dpseci_sec_counters counters = {0};
2137         struct dpaa2_sec_qp **qp = (struct dpaa2_sec_qp **)
2138                                         dev->data->queue_pairs;
2139         int ret, i;
2140
2141         PMD_INIT_FUNC_TRACE();
2142         if (stats == NULL) {
2143                 PMD_DRV_LOG(ERR, "invalid stats ptr NULL");
2144                 return;
2145         }
2146         for (i = 0; i < dev->data->nb_queue_pairs; i++) {
2147                 if (qp[i] == NULL) {
2148                         PMD_DRV_LOG(DEBUG, "Uninitialised queue pair");
2149                         continue;
2150                 }
2151
2152                 stats->enqueued_count += qp[i]->tx_vq.tx_pkts;
2153                 stats->dequeued_count += qp[i]->rx_vq.rx_pkts;
2154                 stats->enqueue_err_count += qp[i]->tx_vq.err_pkts;
2155                 stats->dequeue_err_count += qp[i]->rx_vq.err_pkts;
2156         }
2157
2158         ret = dpseci_get_sec_counters(dpseci, CMD_PRI_LOW, priv->token,
2159                                       &counters);
2160         if (ret) {
2161                 PMD_DRV_LOG(ERR, "dpseci_get_sec_counters failed\n");
2162         } else {
2163                 PMD_DRV_LOG(INFO, "dpseci hw stats:"
2164                             "\n\tNumber of Requests Dequeued = %lu"
2165                             "\n\tNumber of Outbound Encrypt Requests = %lu"
2166                             "\n\tNumber of Inbound Decrypt Requests = %lu"
2167                             "\n\tNumber of Outbound Bytes Encrypted = %lu"
2168                             "\n\tNumber of Outbound Bytes Protected = %lu"
2169                             "\n\tNumber of Inbound Bytes Decrypted = %lu"
2170                             "\n\tNumber of Inbound Bytes Validated = %lu",
2171                             counters.dequeued_requests,
2172                             counters.ob_enc_requests,
2173                             counters.ib_dec_requests,
2174                             counters.ob_enc_bytes,
2175                             counters.ob_prot_bytes,
2176                             counters.ib_dec_bytes,
2177                             counters.ib_valid_bytes);
2178         }
2179 }
2180
2181 static
2182 void dpaa2_sec_stats_reset(struct rte_cryptodev *dev)
2183 {
2184         int i;
2185         struct dpaa2_sec_qp **qp = (struct dpaa2_sec_qp **)
2186                                    (dev->data->queue_pairs);
2187
2188         PMD_INIT_FUNC_TRACE();
2189
2190         for (i = 0; i < dev->data->nb_queue_pairs; i++) {
2191                 if (qp[i] == NULL) {
2192                         PMD_DRV_LOG(DEBUG, "Uninitialised queue pair");
2193                         continue;
2194                 }
2195                 qp[i]->tx_vq.rx_pkts = 0;
2196                 qp[i]->tx_vq.tx_pkts = 0;
2197                 qp[i]->tx_vq.err_pkts = 0;
2198                 qp[i]->rx_vq.rx_pkts = 0;
2199                 qp[i]->rx_vq.tx_pkts = 0;
2200                 qp[i]->rx_vq.err_pkts = 0;
2201         }
2202 }
2203
2204 static struct rte_cryptodev_ops crypto_ops = {
2205         .dev_configure        = dpaa2_sec_dev_configure,
2206         .dev_start            = dpaa2_sec_dev_start,
2207         .dev_stop             = dpaa2_sec_dev_stop,
2208         .dev_close            = dpaa2_sec_dev_close,
2209         .dev_infos_get        = dpaa2_sec_dev_infos_get,
2210         .stats_get            = dpaa2_sec_stats_get,
2211         .stats_reset          = dpaa2_sec_stats_reset,
2212         .queue_pair_setup     = dpaa2_sec_queue_pair_setup,
2213         .queue_pair_release   = dpaa2_sec_queue_pair_release,
2214         .queue_pair_start     = dpaa2_sec_queue_pair_start,
2215         .queue_pair_stop      = dpaa2_sec_queue_pair_stop,
2216         .queue_pair_count     = dpaa2_sec_queue_pair_count,
2217         .session_get_size     = dpaa2_sec_session_get_size,
2218         .session_configure    = dpaa2_sec_session_configure,
2219         .session_clear        = dpaa2_sec_session_clear,
2220 };
2221
2222 static const struct rte_security_capability *
2223 dpaa2_sec_capabilities_get(void *device __rte_unused)
2224 {
2225         return dpaa2_sec_security_cap;
2226 }
2227
2228 struct rte_security_ops dpaa2_sec_security_ops = {
2229         .session_create = dpaa2_sec_security_session_create,
2230         .session_update = NULL,
2231         .session_stats_get = NULL,
2232         .session_destroy = dpaa2_sec_security_session_destroy,
2233         .set_pkt_metadata = NULL,
2234         .capabilities_get = dpaa2_sec_capabilities_get
2235 };
2236
2237 static int
2238 dpaa2_sec_uninit(const struct rte_cryptodev *dev)
2239 {
2240         struct dpaa2_sec_dev_private *internals = dev->data->dev_private;
2241
2242         rte_free(dev->security_ctx);
2243
2244         rte_mempool_free(internals->fle_pool);
2245
2246         PMD_INIT_LOG(INFO, "Closing DPAA2_SEC device %s on numa socket %u\n",
2247                      dev->data->name, rte_socket_id());
2248
2249         return 0;
2250 }
2251
2252 static int
2253 dpaa2_sec_dev_init(struct rte_cryptodev *cryptodev)
2254 {
2255         struct dpaa2_sec_dev_private *internals;
2256         struct rte_device *dev = cryptodev->device;
2257         struct rte_dpaa2_device *dpaa2_dev;
2258         struct rte_security_ctx *security_instance;
2259         struct fsl_mc_io *dpseci;
2260         uint16_t token;
2261         struct dpseci_attr attr;
2262         int retcode, hw_id;
2263         char str[20];
2264
2265         PMD_INIT_FUNC_TRACE();
2266         dpaa2_dev = container_of(dev, struct rte_dpaa2_device, device);
2267         if (dpaa2_dev == NULL) {
2268                 PMD_INIT_LOG(ERR, "dpaa2_device not found\n");
2269                 return -1;
2270         }
2271         hw_id = dpaa2_dev->object_id;
2272
2273         cryptodev->driver_id = cryptodev_driver_id;
2274         cryptodev->dev_ops = &crypto_ops;
2275
2276         cryptodev->enqueue_burst = dpaa2_sec_enqueue_burst;
2277         cryptodev->dequeue_burst = dpaa2_sec_dequeue_burst;
2278         cryptodev->feature_flags = RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO |
2279                         RTE_CRYPTODEV_FF_HW_ACCELERATED |
2280                         RTE_CRYPTODEV_FF_SYM_OPERATION_CHAINING |
2281                         RTE_CRYPTODEV_FF_SECURITY;
2282
2283         internals = cryptodev->data->dev_private;
2284         internals->max_nb_sessions = RTE_DPAA2_SEC_PMD_MAX_NB_SESSIONS;
2285
2286         /*
2287          * For secondary processes, we don't initialise any further as primary
2288          * has already done this work. Only check we don't need a different
2289          * RX function
2290          */
2291         if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
2292                 PMD_INIT_LOG(DEBUG, "Device already init by primary process");
2293                 return 0;
2294         }
2295
2296         /* Initialize security_ctx only for primary process*/
2297         security_instance = rte_malloc("rte_security_instances_ops",
2298                                 sizeof(struct rte_security_ctx), 0);
2299         if (security_instance == NULL)
2300                 return -ENOMEM;
2301         security_instance->device = (void *)cryptodev;
2302         security_instance->ops = &dpaa2_sec_security_ops;
2303         security_instance->sess_cnt = 0;
2304         cryptodev->security_ctx = security_instance;
2305
2306         /*Open the rte device via MC and save the handle for further use*/
2307         dpseci = (struct fsl_mc_io *)rte_calloc(NULL, 1,
2308                                 sizeof(struct fsl_mc_io), 0);
2309         if (!dpseci) {
2310                 PMD_INIT_LOG(ERR,
2311                              "Error in allocating the memory for dpsec object");
2312                 return -1;
2313         }
2314         dpseci->regs = rte_mcp_ptr_list[0];
2315
2316         retcode = dpseci_open(dpseci, CMD_PRI_LOW, hw_id, &token);
2317         if (retcode != 0) {
2318                 PMD_INIT_LOG(ERR, "Cannot open the dpsec device: Error = %x",
2319                              retcode);
2320                 goto init_error;
2321         }
2322         retcode = dpseci_get_attributes(dpseci, CMD_PRI_LOW, token, &attr);
2323         if (retcode != 0) {
2324                 PMD_INIT_LOG(ERR,
2325                              "Cannot get dpsec device attributed: Error = %x",
2326                              retcode);
2327                 goto init_error;
2328         }
2329         sprintf(cryptodev->data->name, "dpsec-%u", hw_id);
2330
2331         internals->max_nb_queue_pairs = attr.num_tx_queues;
2332         cryptodev->data->nb_queue_pairs = internals->max_nb_queue_pairs;
2333         internals->hw = dpseci;
2334         internals->token = token;
2335
2336         sprintf(str, "fle_pool_%d", cryptodev->data->dev_id);
2337         internals->fle_pool = rte_mempool_create((const char *)str,
2338                         FLE_POOL_NUM_BUFS,
2339                         FLE_POOL_BUF_SIZE,
2340                         FLE_POOL_CACHE_SIZE, 0,
2341                         NULL, NULL, NULL, NULL,
2342                         SOCKET_ID_ANY, 0);
2343         if (!internals->fle_pool) {
2344                 RTE_LOG(ERR, PMD, "%s create failed\n", str);
2345                 goto init_error;
2346         }
2347
2348         PMD_INIT_LOG(DEBUG, "driver %s: created\n", cryptodev->data->name);
2349         return 0;
2350
2351 init_error:
2352         PMD_INIT_LOG(ERR, "driver %s: create failed\n", cryptodev->data->name);
2353
2354         /* dpaa2_sec_uninit(crypto_dev_name); */
2355         return -EFAULT;
2356 }
2357
2358 static int
2359 cryptodev_dpaa2_sec_probe(struct rte_dpaa2_driver *dpaa2_drv,
2360                           struct rte_dpaa2_device *dpaa2_dev)
2361 {
2362         struct rte_cryptodev *cryptodev;
2363         char cryptodev_name[RTE_CRYPTODEV_NAME_MAX_LEN];
2364
2365         int retval;
2366
2367         sprintf(cryptodev_name, "dpsec-%d", dpaa2_dev->object_id);
2368
2369         cryptodev = rte_cryptodev_pmd_allocate(cryptodev_name, rte_socket_id());
2370         if (cryptodev == NULL)
2371                 return -ENOMEM;
2372
2373         if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
2374                 cryptodev->data->dev_private = rte_zmalloc_socket(
2375                                         "cryptodev private structure",
2376                                         sizeof(struct dpaa2_sec_dev_private),
2377                                         RTE_CACHE_LINE_SIZE,
2378                                         rte_socket_id());
2379
2380                 if (cryptodev->data->dev_private == NULL)
2381                         rte_panic("Cannot allocate memzone for private "
2382                                         "device data");
2383         }
2384
2385         dpaa2_dev->cryptodev = cryptodev;
2386         cryptodev->device = &dpaa2_dev->device;
2387         cryptodev->device->driver = &dpaa2_drv->driver;
2388
2389         /* init user callbacks */
2390         TAILQ_INIT(&(cryptodev->link_intr_cbs));
2391
2392         /* Invoke PMD device initialization function */
2393         retval = dpaa2_sec_dev_init(cryptodev);
2394         if (retval == 0)
2395                 return 0;
2396
2397         if (rte_eal_process_type() == RTE_PROC_PRIMARY)
2398                 rte_free(cryptodev->data->dev_private);
2399
2400         cryptodev->attached = RTE_CRYPTODEV_DETACHED;
2401
2402         return -ENXIO;
2403 }
2404
2405 static int
2406 cryptodev_dpaa2_sec_remove(struct rte_dpaa2_device *dpaa2_dev)
2407 {
2408         struct rte_cryptodev *cryptodev;
2409         int ret;
2410
2411         cryptodev = dpaa2_dev->cryptodev;
2412         if (cryptodev == NULL)
2413                 return -ENODEV;
2414
2415         ret = dpaa2_sec_uninit(cryptodev);
2416         if (ret)
2417                 return ret;
2418
2419         return rte_cryptodev_pmd_destroy(cryptodev);
2420 }
2421
2422 static struct rte_dpaa2_driver rte_dpaa2_sec_driver = {
2423         .drv_type = DPAA2_CRYPTO,
2424         .driver = {
2425                 .name = "DPAA2 SEC PMD"
2426         },
2427         .probe = cryptodev_dpaa2_sec_probe,
2428         .remove = cryptodev_dpaa2_sec_remove,
2429 };
2430
2431 static struct cryptodev_driver dpaa2_sec_crypto_drv;
2432
2433 RTE_PMD_REGISTER_DPAA2(CRYPTODEV_NAME_DPAA2_SEC_PMD, rte_dpaa2_sec_driver);
2434 RTE_PMD_REGISTER_CRYPTO_DRIVER(dpaa2_sec_crypto_drv, rte_dpaa2_sec_driver,
2435                 cryptodev_driver_id);