Imported Upstream version 17.05.2
[deb_dpdk.git] / drivers / crypto / dpaa2_sec / dpaa2_sec_priv.h
1 /*-
2  *   BSD LICENSE
3  *
4  *   Copyright (c) 2016 Freescale Semiconductor, Inc. All rights reserved.
5  *   Copyright (c) 2016 NXP. All rights reserved.
6  *
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8  *   modification, are permitted provided that the following conditions
9  *   are met:
10  *
11  *     * Redistributions of source code must retain the above copyright
12  *       notice, this list of conditions and the following disclaimer.
13  *     * Redistributions in binary form must reproduce the above copyright
14  *       notice, this list of conditions and the following disclaimer in
15  *       the documentation and/or other materials provided with the
16  *       distribution.
17  *     * Neither the name of  Freescale Semiconductor, Inc nor the names of its
18  *       contributors may be used to endorse or promote products derived
19  *       from this software without specific prior written permission.
20  *
21  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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29  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32  */
33
34 #ifndef _RTE_DPAA2_SEC_PMD_PRIVATE_H_
35 #define _RTE_DPAA2_SEC_PMD_PRIVATE_H_
36
37 #define MAX_QUEUES              64
38 #define MAX_DESC_SIZE           64
39 /** private data structure for each DPAA2_SEC device */
40 struct dpaa2_sec_dev_private {
41         void *mc_portal; /**< MC Portal for configuring this device */
42         void *hw; /**< Hardware handle for this device.Used by NADK framework */
43         int32_t hw_id; /**< An unique ID of this device instance */
44         int32_t vfio_fd; /**< File descriptor received via VFIO */
45         uint16_t token; /**< Token required by DPxxx objects */
46         unsigned int max_nb_queue_pairs;
47         /**< Max number of queue pairs supported by device */
48         unsigned int max_nb_sessions;
49         /**< Max number of sessions supported by device */
50 };
51
52 struct dpaa2_sec_qp {
53         struct dpaa2_queue rx_vq;
54         struct dpaa2_queue tx_vq;
55 };
56
57 enum shr_desc_type {
58         DESC_UPDATE,
59         DESC_FINAL,
60         DESC_INITFINAL,
61 };
62
63 #define DIR_ENC                 1
64 #define DIR_DEC                 0
65
66 /* SEC Flow Context Descriptor */
67 struct sec_flow_context {
68         /* word 0 */
69         uint16_t word0_sdid;            /* 11-0  SDID */
70         uint16_t word0_res;             /* 31-12 reserved */
71
72         /* word 1 */
73         uint8_t word1_sdl;              /* 5-0 SDL */
74                                         /* 7-6 reserved */
75
76         uint8_t word1_bits_15_8;        /* 11-8 CRID */
77                                         /* 14-12 reserved */
78                                         /* 15 CRJD */
79
80         uint8_t word1_bits23_16;        /* 16  EWS */
81                                         /* 17 DAC */
82                                         /* 18,19,20 ? */
83                                         /* 23-21 reserved */
84
85         uint8_t word1_bits31_24;        /* 24 RSC */
86                                         /* 25 RBMT */
87                                         /* 31-26 reserved */
88
89         /* word 2  RFLC[31-0] */
90         uint32_t word2_rflc_31_0;
91
92         /* word 3  RFLC[63-32] */
93         uint32_t word3_rflc_63_32;
94
95         /* word 4 */
96         uint16_t word4_iicid;           /* 15-0  IICID */
97         uint16_t word4_oicid;           /* 31-16 OICID */
98
99         /* word 5 */
100         uint32_t word5_ofqid:24;                /* 23-0 OFQID */
101         uint32_t word5_31_24:8;
102                                         /* 24 OSC */
103                                         /* 25 OBMT */
104                                         /* 29-26 reserved */
105                                         /* 31-30 ICR */
106
107         /* word 6 */
108         uint32_t word6_oflc_31_0;
109
110         /* word 7 */
111         uint32_t word7_oflc_63_32;
112
113         /* Word 8-15 storage profiles */
114         uint16_t dl;                    /**<  DataLength(correction) */
115         uint16_t reserved;              /**< reserved */
116         uint16_t dhr;                   /**< DataHeadRoom(correction) */
117         uint16_t mode_bits;             /**< mode bits */
118         uint16_t bpv0;                  /**< buffer pool0 valid */
119         uint16_t bpid0;                 /**< Bypass Memory Translation */
120         uint16_t bpv1;                  /**< buffer pool1 valid */
121         uint16_t bpid1;                 /**< Bypass Memory Translation */
122         uint64_t word_12_15[2];         /**< word 12-15 are reserved */
123 };
124
125 struct sec_flc_desc {
126         struct sec_flow_context flc;
127         uint32_t desc[MAX_DESC_SIZE];
128 };
129
130 struct ctxt_priv {
131         struct sec_flc_desc flc_desc[0];
132 };
133
134 enum dpaa2_sec_op_type {
135         DPAA2_SEC_NONE,  /*!< No Cipher operations*/
136         DPAA2_SEC_CIPHER,/*!< CIPHER operations */
137         DPAA2_SEC_AUTH,  /*!< Authentication Operations */
138         DPAA2_SEC_CIPHER_HASH,  /*!< Authenticated Encryption with
139                                  * associated data
140                                  */
141         DPAA2_SEC_HASH_CIPHER,  /*!< Encryption with Authenticated
142                                  * associated data
143                                  */
144         DPAA2_SEC_IPSEC, /*!< IPSEC protocol operations*/
145         DPAA2_SEC_PDCP,  /*!< PDCP protocol operations*/
146         DPAA2_SEC_PKC,   /*!< Public Key Cryptographic Operations */
147         DPAA2_SEC_MAX
148 };
149
150 struct dpaa2_sec_cipher_ctxt {
151         struct {
152                 uint8_t *data;
153                 uint16_t length;
154         } iv;   /**< Initialisation vector parameters */
155         uint8_t *init_counter;  /*!< Set initial counter for CTR mode */
156 };
157
158 struct dpaa2_sec_auth_ctxt {
159         uint8_t trunc_len;              /*!< Length for output ICV, should
160                                          * be 0 if no truncation required
161                                          */
162 };
163
164 struct dpaa2_sec_aead_ctxt {
165         struct {
166                 uint8_t *data;
167                 uint16_t length;
168         } iv;   /**< Initialisation vector parameters */
169         uint16_t auth_only_len; /*!< Length of data for Auth only */
170         uint8_t auth_cipher_text;       /**< Authenticate/cipher ordering */
171         uint8_t trunc_len;              /*!< Length for output ICV, should
172                                          * be 0 if no truncation required
173                                          */
174 };
175
176 typedef struct dpaa2_sec_session_entry {
177         void *ctxt;
178         uint8_t ctxt_type;
179         uint8_t dir;         /*!< Operation Direction */
180         enum rte_crypto_cipher_algorithm cipher_alg; /*!< Cipher Algorithm*/
181         enum rte_crypto_auth_algorithm auth_alg; /*!< Authentication Algorithm*/
182         struct {
183                 uint8_t *data;  /**< pointer to key data */
184                 size_t length;  /**< key length in bytes */
185         } cipher_key;
186         struct {
187                 uint8_t *data;  /**< pointer to key data */
188                 size_t length;  /**< key length in bytes */
189         } auth_key;
190         uint8_t status;
191         union {
192                 struct dpaa2_sec_cipher_ctxt cipher_ctxt;
193                 struct dpaa2_sec_auth_ctxt auth_ctxt;
194                 struct dpaa2_sec_aead_ctxt aead_ctxt;
195         } ext_params;
196 } dpaa2_sec_session;
197
198 static const struct rte_cryptodev_capabilities dpaa2_sec_capabilities[] = {
199         {       /* MD5 HMAC */
200                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
201                 {.sym = {
202                         .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
203                         {.auth = {
204                                 .algo = RTE_CRYPTO_AUTH_MD5_HMAC,
205                                 .block_size = 64,
206                                 .key_size = {
207                                         .min = 1,
208                                         .max = 64,
209                                         .increment = 1
210                                 },
211                                 .digest_size = {
212                                         .min = 16,
213                                         .max = 16,
214                                         .increment = 0
215                                 },
216                                 .aad_size = { 0 }
217                         }, }
218                 }, }
219         },
220         {       /* SHA1 HMAC */
221                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
222                 {.sym = {
223                         .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
224                         {.auth = {
225                                 .algo = RTE_CRYPTO_AUTH_SHA1_HMAC,
226                                 .block_size = 64,
227                                 .key_size = {
228                                         .min = 1,
229                                         .max = 64,
230                                         .increment = 1
231                                 },
232                                 .digest_size = {
233                                         .min = 20,
234                                         .max = 20,
235                                         .increment = 0
236                                 },
237                                 .aad_size = { 0 }
238                         }, }
239                 }, }
240         },
241         {       /* SHA224 HMAC */
242                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
243                 {.sym = {
244                         .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
245                         {.auth = {
246                                 .algo = RTE_CRYPTO_AUTH_SHA224_HMAC,
247                                 .block_size = 64,
248                                 .key_size = {
249                                         .min = 1,
250                                         .max = 64,
251                                         .increment = 1
252                                 },
253                                 .digest_size = {
254                                         .min = 28,
255                                         .max = 28,
256                                         .increment = 0
257                                 },
258                                 .aad_size = { 0 }
259                         }, }
260                 }, }
261         },
262         {       /* SHA256 HMAC */
263                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
264                 {.sym = {
265                         .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
266                         {.auth = {
267                                 .algo = RTE_CRYPTO_AUTH_SHA256_HMAC,
268                                 .block_size = 64,
269                                 .key_size = {
270                                         .min = 1,
271                                         .max = 64,
272                                         .increment = 1
273                                 },
274                                 .digest_size = {
275                                                 .min = 32,
276                                                 .max = 32,
277                                                 .increment = 0
278                                         },
279                                         .aad_size = { 0 }
280                                 }, }
281                         }, }
282                 },
283         {       /* SHA384 HMAC */
284                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
285                 {.sym = {
286                         .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
287                         {.auth = {
288                                 .algo = RTE_CRYPTO_AUTH_SHA384_HMAC,
289                                 .block_size = 128,
290                                 .key_size = {
291                                         .min = 1,
292                                         .max = 128,
293                                         .increment = 1
294                                 },
295                                 .digest_size = {
296                                         .min = 48,
297                                         .max = 48,
298                                         .increment = 0
299                                 },
300                                 .aad_size = { 0 }
301                         }, }
302                 }, }
303         },
304         {       /* SHA512 HMAC */
305                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
306                 {.sym = {
307                         .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
308                         {.auth = {
309                                 .algo = RTE_CRYPTO_AUTH_SHA512_HMAC,
310                                 .block_size = 128,
311                                 .key_size = {
312                                         .min = 1,
313                                         .max = 128,
314                                         .increment = 1
315                                 },
316                                 .digest_size = {
317                                         .min = 64,
318                                         .max = 64,
319                                         .increment = 0
320                                 },
321                                 .aad_size = { 0 }
322                         }, }
323                 }, }
324         },
325         {       /* AES CBC */
326                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
327                 {.sym = {
328                         .xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,
329                         {.cipher = {
330                                 .algo = RTE_CRYPTO_CIPHER_AES_CBC,
331                                 .block_size = 16,
332                                 .key_size = {
333                                         .min = 16,
334                                         .max = 32,
335                                         .increment = 8
336                                 },
337                                 .iv_size = {
338                                         .min = 16,
339                                         .max = 16,
340                                         .increment = 0
341                                 }
342                         }, }
343                 }, }
344         },
345         {       /* 3DES CBC */
346                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
347                 {.sym = {
348                         .xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,
349                         {.cipher = {
350                                 .algo = RTE_CRYPTO_CIPHER_3DES_CBC,
351                                 .block_size = 8,
352                                 .key_size = {
353                                         .min = 16,
354                                         .max = 24,
355                                         .increment = 8
356                                 },
357                                 .iv_size = {
358                                         .min = 8,
359                                         .max = 8,
360                                         .increment = 0
361                                 }
362                         }, }
363                 }, }
364         },
365
366         RTE_CRYPTODEV_END_OF_CAPABILITIES_LIST()
367 };
368 #endif /* _RTE_DPAA2_SEC_PMD_PRIVATE_H_ */