drivers/crypto/qat/qat_sym.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2015-2018 Intel Corporation
   3  */
   4
   5 #include <openssl/evp.h>
   6
   7 #include <rte_mempool.h>
   8 #include <rte_mbuf.h>
   9 #include <rte_crypto_sym.h>
  10 #include <rte_bus_pci.h>
  11 #include <rte_byteorder.h>
  12
  13 #include "qat_sym.h"
  14
  15 /** Decrypt a single partial block
  16  *  Depends on openssl libcrypto
  17  *  Uses ECB+XOR to do CFB encryption, same result, more performant
  18  */
  19 static inline int
  20 bpi_cipher_decrypt(uint8_t *src, uint8_t *dst,
  21                 uint8_t *iv, int ivlen, int srclen,
  22                 void *bpi_ctx)
  23 {
  24         EVP_CIPHER_CTX *ctx = (EVP_CIPHER_CTX *)bpi_ctx;
  25         int encrypted_ivlen;
  26         uint8_t encrypted_iv[BPI_MAX_ENCR_IV_LEN];
  27         uint8_t *encr = encrypted_iv;
  28
  29         /* ECB method: encrypt (not decrypt!) the IV, then XOR with plaintext */
  30         if (EVP_EncryptUpdate(ctx, encrypted_iv, &encrypted_ivlen, iv, ivlen)
  31                                                                 <= 0)
  32                 goto cipher_decrypt_err;
  33
  34         for (; srclen != 0; --srclen, ++dst, ++src, ++encr)
  35                 *dst = *src ^ *encr;
  36
  37         return 0;
  38
  39 cipher_decrypt_err:
  40         QAT_DP_LOG(ERR, "libcrypto ECB cipher decrypt for BPI IV failed");
  41         return -EINVAL;
  42 }
  43
  44
  45 static inline uint32_t
  46 qat_bpicipher_preprocess(struct qat_sym_session *ctx,
  47                                 struct rte_crypto_op *op)
  48 {
  49         int block_len = qat_cipher_get_block_size(ctx->qat_cipher_alg);
  50         struct rte_crypto_sym_op *sym_op = op->sym;
  51         uint8_t last_block_len = block_len > 0 ?
  52                         sym_op->cipher.data.length % block_len : 0;
  53
  54         if (last_block_len &&
  55                         ctx->qat_dir == ICP_QAT_HW_CIPHER_DECRYPT) {
  56
  57                 /* Decrypt last block */
  58                 uint8_t *last_block, *dst, *iv;
  59                 uint32_t last_block_offset = sym_op->cipher.data.offset +
  60                                 sym_op->cipher.data.length - last_block_len;
  61                 last_block = (uint8_t *) rte_pktmbuf_mtod_offset(sym_op->m_src,
  62                                 uint8_t *, last_block_offset);
  63
  64                 if (unlikely(sym_op->m_dst != NULL))
  65                         /* out-of-place operation (OOP) */
  66                         dst = (uint8_t *) rte_pktmbuf_mtod_offset(sym_op->m_dst,
  67                                                 uint8_t *, last_block_offset);
  68                 else
  69                         dst = last_block;
  70
  71                 if (last_block_len < sym_op->cipher.data.length)
  72                         /* use previous block ciphertext as IV */
  73                         iv = last_block - block_len;
  74                 else
  75                         /* runt block, i.e. less than one full block */
  76                         iv = rte_crypto_op_ctod_offset(op, uint8_t *,
  77                                         ctx->cipher_iv.offset);
  78
  79 #if RTE_LOG_DP_LEVEL >= RTE_LOG_DEBUG
  80                 QAT_DP_HEXDUMP_LOG(DEBUG, "BPI: src before pre-process:",
  81                         last_block, last_block_len);
  82                 if (sym_op->m_dst != NULL)
  83                         QAT_DP_HEXDUMP_LOG(DEBUG, "BPI:dst before pre-process:",
  84                         dst, last_block_len);
  85 #endif
  86                 bpi_cipher_decrypt(last_block, dst, iv, block_len,
  87                                 last_block_len, ctx->bpi_ctx);
  88 #if RTE_LOG_DP_LEVEL >= RTE_LOG_DEBUG
  89                 QAT_DP_HEXDUMP_LOG(DEBUG, "BPI: src after pre-process:",
  90                         last_block, last_block_len);
  91                 if (sym_op->m_dst != NULL)
  92                         QAT_DP_HEXDUMP_LOG(DEBUG, "BPI: dst after pre-process:",
  93                         dst, last_block_len);
  94 #endif
  95         }
  96
  97         return sym_op->cipher.data.length - last_block_len;
  98 }
  99
 100 static inline void
 101 set_cipher_iv(uint16_t iv_length, uint16_t iv_offset,
 102                 struct icp_qat_fw_la_cipher_req_params *cipher_param,
 103                 struct rte_crypto_op *op,
 104                 struct icp_qat_fw_la_bulk_req *qat_req)
 105 {
 106         /* copy IV into request if it fits */
 107         if (iv_length <= sizeof(cipher_param->u.cipher_IV_array)) {
 108                 rte_memcpy(cipher_param->u.cipher_IV_array,
 109                                 rte_crypto_op_ctod_offset(op, uint8_t *,
 110                                         iv_offset),
 111                                 iv_length);
 112         } else {
 113                 ICP_QAT_FW_LA_CIPH_IV_FLD_FLAG_SET(
 114                                 qat_req->comn_hdr.serv_specif_flags,
 115                                 ICP_QAT_FW_CIPH_IV_64BIT_PTR);
 116                 cipher_param->u.s.cipher_IV_ptr =
 117                                 rte_crypto_op_ctophys_offset(op,
 118                                         iv_offset);
 119         }
 120 }
 121
 122 /** Set IV for CCM is special case, 0th byte is set to q-1
 123  *  where q is padding of nonce in 16 byte block
 124  */
 125 static inline void
 126 set_cipher_iv_ccm(uint16_t iv_length, uint16_t iv_offset,
 127                 struct icp_qat_fw_la_cipher_req_params *cipher_param,
 128                 struct rte_crypto_op *op, uint8_t q, uint8_t aad_len_field_sz)
 129 {
 130         rte_memcpy(((uint8_t *)cipher_param->u.cipher_IV_array) +
 131                         ICP_QAT_HW_CCM_NONCE_OFFSET,
 132                         rte_crypto_op_ctod_offset(op, uint8_t *,
 133                                 iv_offset) + ICP_QAT_HW_CCM_NONCE_OFFSET,
 134                         iv_length);
 135         *(uint8_t *)&cipher_param->u.cipher_IV_array[0] =
 136                         q - ICP_QAT_HW_CCM_NONCE_OFFSET;
 137
 138         if (aad_len_field_sz)
 139                 rte_memcpy(&op->sym->aead.aad.data[ICP_QAT_HW_CCM_NONCE_OFFSET],
 140                         rte_crypto_op_ctod_offset(op, uint8_t *,
 141                                 iv_offset) + ICP_QAT_HW_CCM_NONCE_OFFSET,
 142                         iv_length);
 143 }
 144
 145 int
 146 qat_sym_build_request(void *in_op, uint8_t *out_msg,
 147                 void *op_cookie, enum qat_device_gen qat_dev_gen)
 148 {
 149         int ret = 0;
 150         struct qat_sym_session *ctx;
 151         struct icp_qat_fw_la_cipher_req_params *cipher_param;
 152         struct icp_qat_fw_la_auth_req_params *auth_param;
 153         register struct icp_qat_fw_la_bulk_req *qat_req;
 154         uint8_t do_auth = 0, do_cipher = 0, do_aead = 0;
 155         uint32_t cipher_len = 0, cipher_ofs = 0;
 156         uint32_t auth_len = 0, auth_ofs = 0;
 157         uint32_t min_ofs = 0;
 158         uint64_t src_buf_start = 0, dst_buf_start = 0;
 159         uint8_t do_sgl = 0;
 160         struct rte_crypto_op *op = (struct rte_crypto_op *)in_op;
 161         struct qat_sym_op_cookie *cookie =
 162                                 (struct qat_sym_op_cookie *)op_cookie;
 163
 164         if (unlikely(op->type != RTE_CRYPTO_OP_TYPE_SYMMETRIC)) {
 165                 QAT_DP_LOG(ERR, "QAT PMD only supports symmetric crypto "
 166                                 "operation requests, op (%p) is not a "
 167                                 "symmetric operation.", op);
 168                 return -EINVAL;
 169         }
 170
 171         if (unlikely(op->sess_type == RTE_CRYPTO_OP_SESSIONLESS)) {
 172                 QAT_DP_LOG(ERR, "QAT PMD only supports session oriented"
 173                                 " requests, op (%p) is sessionless.", op);
 174                 return -EINVAL;
 175         }
 176
 177         ctx = (struct qat_sym_session *)get_sym_session_private_data(
 178                         op->sym->session, cryptodev_qat_driver_id);
 179
 180         if (unlikely(ctx == NULL)) {
 181                 QAT_DP_LOG(ERR, "Session was not created for this device");
 182                 return -EINVAL;
 183         }
 184
 185         if (unlikely(ctx->min_qat_dev_gen > qat_dev_gen)) {
 186                 QAT_DP_LOG(ERR, "Session alg not supported on this device gen");
 187                 op->status = RTE_CRYPTO_OP_STATUS_INVALID_SESSION;
 188                 return -EINVAL;
 189         }
 190
 191         qat_req = (struct icp_qat_fw_la_bulk_req *)out_msg;
 192         rte_mov128((uint8_t *)qat_req, (const uint8_t *)&(ctx->fw_req));
 193         qat_req->comn_mid.opaque_data = (uint64_t)(uintptr_t)op;
 194         cipher_param = (void *)&qat_req->serv_specif_rqpars;
 195         auth_param = (void *)((uint8_t *)cipher_param + sizeof(*cipher_param));
 196
 197         if (ctx->qat_cmd == ICP_QAT_FW_LA_CMD_HASH_CIPHER ||
 198                         ctx->qat_cmd == ICP_QAT_FW_LA_CMD_CIPHER_HASH) {
 199                 /* AES-GCM or AES-CCM */
 200                 if (ctx->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_GALOIS_128 ||
 201                         ctx->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_GALOIS_64 ||
 202                         (ctx->qat_cipher_alg == ICP_QAT_HW_CIPHER_ALGO_AES128
 203                         && ctx->qat_mode == ICP_QAT_HW_CIPHER_CTR_MODE
 204                         && ctx->qat_hash_alg ==
 205                                         ICP_QAT_HW_AUTH_ALGO_AES_CBC_MAC)) {
 206                         do_aead = 1;
 207                 } else {
 208                         do_auth = 1;
 209                         do_cipher = 1;
 210                 }
 211         } else if (ctx->qat_cmd == ICP_QAT_FW_LA_CMD_AUTH) {
 212                 do_auth = 1;
 213                 do_cipher = 0;
 214         } else if (ctx->qat_cmd == ICP_QAT_FW_LA_CMD_CIPHER) {
 215                 do_auth = 0;
 216                 do_cipher = 1;
 217         }
 218
 219         if (do_cipher) {
 220
 221                 if (ctx->qat_cipher_alg ==
 222                                          ICP_QAT_HW_CIPHER_ALGO_SNOW_3G_UEA2 ||
 223                         ctx->qat_cipher_alg == ICP_QAT_HW_CIPHER_ALGO_KASUMI ||
 224                         ctx->qat_cipher_alg ==
 225                                 ICP_QAT_HW_CIPHER_ALGO_ZUC_3G_128_EEA3) {
 226
 227                         if (unlikely(
 228                             (op->sym->cipher.data.length % BYTE_LENGTH != 0) ||
 229                             (op->sym->cipher.data.offset % BYTE_LENGTH != 0))) {
 230                                 QAT_DP_LOG(ERR,
 231                   "SNOW3G/KASUMI/ZUC in QAT PMD only supports byte aligned values");
 232                                 op->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS;
 233                                 return -EINVAL;
 234                         }
 235                         cipher_len = op->sym->cipher.data.length >> 3;
 236                         cipher_ofs = op->sym->cipher.data.offset >> 3;
 237
 238                 } else if (ctx->bpi_ctx) {
 239                         /* DOCSIS - only send complete blocks to device
 240                          * Process any partial block using CFB mode.
 241                          * Even if 0 complete blocks, still send this to device
 242                          * to get into rx queue for post-process and dequeuing
 243                          */
 244                         cipher_len = qat_bpicipher_preprocess(ctx, op);
 245                         cipher_ofs = op->sym->cipher.data.offset;
 246                 } else {
 247                         cipher_len = op->sym->cipher.data.length;
 248                         cipher_ofs = op->sym->cipher.data.offset;
 249                 }
 250
 251                 set_cipher_iv(ctx->cipher_iv.length, ctx->cipher_iv.offset,
 252                                 cipher_param, op, qat_req);
 253                 min_ofs = cipher_ofs;
 254         }
 255
 256         if (do_auth) {
 257
 258                 if (ctx->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_SNOW_3G_UIA2 ||
 259                         ctx->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_KASUMI_F9 ||
 260                         ctx->qat_hash_alg ==
 261                                 ICP_QAT_HW_AUTH_ALGO_ZUC_3G_128_EIA3) {
 262                         if (unlikely(
 263                             (op->sym->auth.data.offset % BYTE_LENGTH != 0) ||
 264                             (op->sym->auth.data.length % BYTE_LENGTH != 0))) {
 265                                 QAT_DP_LOG(ERR,
 266                 "For SNOW3G/KASUMI/ZUC, QAT PMD only supports byte aligned values");
 267                                 op->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS;
 268                                 return -EINVAL;
 269                         }
 270                         auth_ofs = op->sym->auth.data.offset >> 3;
 271                         auth_len = op->sym->auth.data.length >> 3;
 272
 273                         auth_param->u1.aad_adr =
 274                                         rte_crypto_op_ctophys_offset(op,
 275                                                         ctx->auth_iv.offset);
 276
 277                 } else if (ctx->qat_hash_alg ==
 278                                         ICP_QAT_HW_AUTH_ALGO_GALOIS_128 ||
 279                                 ctx->qat_hash_alg ==
 280                                         ICP_QAT_HW_AUTH_ALGO_GALOIS_64) {
 281                         /* AES-GMAC */
 282                         set_cipher_iv(ctx->auth_iv.length,
 283                                 ctx->auth_iv.offset,
 284                                 cipher_param, op, qat_req);
 285                         auth_ofs = op->sym->auth.data.offset;
 286                         auth_len = op->sym->auth.data.length;
 287
 288                         auth_param->u1.aad_adr = 0;
 289                         auth_param->u2.aad_sz = 0;
 290
 291                         /*
 292                          * If len(iv)==12B fw computes J0
 293                          */
 294                         if (ctx->auth_iv.length == 12) {
 295                                 ICP_QAT_FW_LA_GCM_IV_LEN_FLAG_SET(
 296                                         qat_req->comn_hdr.serv_specif_flags,
 297                                         ICP_QAT_FW_LA_GCM_IV_LEN_12_OCTETS);
 298
 299                         }
 300                 } else {
 301                         auth_ofs = op->sym->auth.data.offset;
 302                         auth_len = op->sym->auth.data.length;
 303
 304                 }
 305                 min_ofs = auth_ofs;
 306
 307                 if (likely(ctx->qat_hash_alg != ICP_QAT_HW_AUTH_ALGO_NULL))
 308                         auth_param->auth_res_addr =
 309                                         op->sym->auth.digest.phys_addr;
 310
 311         }
 312
 313         if (do_aead) {
 314                 /*
 315                  * This address may used for setting AAD physical pointer
 316                  * into IV offset from op
 317                  */
 318                 rte_iova_t aad_phys_addr_aead = op->sym->aead.aad.phys_addr;
 319                 if (ctx->qat_hash_alg ==
 320                                 ICP_QAT_HW_AUTH_ALGO_GALOIS_128 ||
 321                                 ctx->qat_hash_alg ==
 322                                         ICP_QAT_HW_AUTH_ALGO_GALOIS_64) {
 323                         /*
 324                          * If len(iv)==12B fw computes J0
 325                          */
 326                         if (ctx->cipher_iv.length == 12) {
 327                                 ICP_QAT_FW_LA_GCM_IV_LEN_FLAG_SET(
 328                                         qat_req->comn_hdr.serv_specif_flags,
 329                                         ICP_QAT_FW_LA_GCM_IV_LEN_12_OCTETS);
 330                         }
 331                         set_cipher_iv(ctx->cipher_iv.length,
 332                                         ctx->cipher_iv.offset,
 333                                         cipher_param, op, qat_req);
 334
 335                 } else if (ctx->qat_hash_alg ==
 336                                 ICP_QAT_HW_AUTH_ALGO_AES_CBC_MAC) {
 337
 338                         /* In case of AES-CCM this may point to user selected
 339                          * memory or iv offset in cypto_op
 340                          */
 341                         uint8_t *aad_data = op->sym->aead.aad.data;
 342                         /* This is true AAD length, it not includes 18 bytes of
 343                          * preceding data
 344                          */
 345                         uint8_t aad_ccm_real_len = 0;
 346                         uint8_t aad_len_field_sz = 0;
 347                         uint32_t msg_len_be =
 348                                         rte_bswap32(op->sym->aead.data.length);
 349
 350                         if (ctx->aad_len > ICP_QAT_HW_CCM_AAD_DATA_OFFSET) {
 351                                 aad_len_field_sz = ICP_QAT_HW_CCM_AAD_LEN_INFO;
 352                                 aad_ccm_real_len = ctx->aad_len -
 353                                         ICP_QAT_HW_CCM_AAD_B0_LEN -
 354                                         ICP_QAT_HW_CCM_AAD_LEN_INFO;
 355                         } else {
 356                                 /*
 357                                  * aad_len not greater than 18, so no actual aad
 358                                  *  data, then use IV after op for B0 block
 359                                  */
 360                                 aad_data = rte_crypto_op_ctod_offset(op,
 361                                                 uint8_t *,
 362                                                 ctx->cipher_iv.offset);
 363                                 aad_phys_addr_aead =
 364                                                 rte_crypto_op_ctophys_offset(op,
 365                                                         ctx->cipher_iv.offset);
 366                         }
 367
 368                         uint8_t q = ICP_QAT_HW_CCM_NQ_CONST -
 369                                                         ctx->cipher_iv.length;
 370
 371                         aad_data[0] = ICP_QAT_HW_CCM_BUILD_B0_FLAGS(
 372                                                         aad_len_field_sz,
 373                                                         ctx->digest_length, q);
 374
 375                         if (q > ICP_QAT_HW_CCM_MSG_LEN_MAX_FIELD_SIZE) {
 376                                 memcpy(aad_data + ctx->cipher_iv.length +
 377                                     ICP_QAT_HW_CCM_NONCE_OFFSET +
 378                                     (q - ICP_QAT_HW_CCM_MSG_LEN_MAX_FIELD_SIZE),
 379                                     (uint8_t *)&msg_len_be,
 380                                     ICP_QAT_HW_CCM_MSG_LEN_MAX_FIELD_SIZE);
 381                         } else {
 382                                 memcpy(aad_data + ctx->cipher_iv.length +
 383                                     ICP_QAT_HW_CCM_NONCE_OFFSET,
 384                                     (uint8_t *)&msg_len_be
 385                                     + (ICP_QAT_HW_CCM_MSG_LEN_MAX_FIELD_SIZE
 386                                     - q), q);
 387                         }
 388
 389                         if (aad_len_field_sz > 0) {
 390                                 *(uint16_t *)&aad_data[ICP_QAT_HW_CCM_AAD_B0_LEN]
 391                                                 = rte_bswap16(aad_ccm_real_len);
 392
 393                                 if ((aad_ccm_real_len + aad_len_field_sz)
 394                                                 % ICP_QAT_HW_CCM_AAD_B0_LEN) {
 395                                         uint8_t pad_len = 0;
 396                                         uint8_t pad_idx = 0;
 397
 398                                         pad_len = ICP_QAT_HW_CCM_AAD_B0_LEN -
 399                                         ((aad_ccm_real_len + aad_len_field_sz) %
 400                                                 ICP_QAT_HW_CCM_AAD_B0_LEN);
 401                                         pad_idx = ICP_QAT_HW_CCM_AAD_B0_LEN +
 402                                             aad_ccm_real_len + aad_len_field_sz;
 403                                         memset(&aad_data[pad_idx],
 404                                                         0, pad_len);
 405                                 }
 406
 407                         }
 408
 409                         set_cipher_iv_ccm(ctx->cipher_iv.length,
 410                                         ctx->cipher_iv.offset,
 411                                         cipher_param, op, q,
 412                                         aad_len_field_sz);
 413
 414                 }
 415
 416                 cipher_len = op->sym->aead.data.length;
 417                 cipher_ofs = op->sym->aead.data.offset;
 418                 auth_len = op->sym->aead.data.length;
 419                 auth_ofs = op->sym->aead.data.offset;
 420
 421                 auth_param->u1.aad_adr = aad_phys_addr_aead;
 422                 auth_param->auth_res_addr = op->sym->aead.digest.phys_addr;
 423                 min_ofs = op->sym->aead.data.offset;
 424         }
 425
 426         if (op->sym->m_src->next || (op->sym->m_dst && op->sym->m_dst->next))
 427                 do_sgl = 1;
 428
 429         /* adjust for chain case */
 430         if (do_cipher && do_auth)
 431                 min_ofs = cipher_ofs < auth_ofs ? cipher_ofs : auth_ofs;
 432
 433         if (unlikely(min_ofs >= rte_pktmbuf_data_len(op->sym->m_src) && do_sgl))
 434                 min_ofs = 0;
 435
 436         if (unlikely(op->sym->m_dst != NULL)) {
 437                 /* Out-of-place operation (OOP)
 438                  * Don't align DMA start. DMA the minimum data-set
 439                  * so as not to overwrite data in dest buffer
 440                  */
 441                 src_buf_start =
 442                         rte_pktmbuf_iova_offset(op->sym->m_src, min_ofs);
 443                 dst_buf_start =
 444                         rte_pktmbuf_iova_offset(op->sym->m_dst, min_ofs);
 445
 446         } else {
 447                 /* In-place operation
 448                  * Start DMA at nearest aligned address below min_ofs
 449                  */
 450                 src_buf_start =
 451                         rte_pktmbuf_iova_offset(op->sym->m_src, min_ofs)
 452                                                 & QAT_64_BTYE_ALIGN_MASK;
 453
 454                 if (unlikely((rte_pktmbuf_iova(op->sym->m_src) -
 455                                         rte_pktmbuf_headroom(op->sym->m_src))
 456                                                         > src_buf_start)) {
 457                         /* alignment has pushed addr ahead of start of mbuf
 458                          * so revert and take the performance hit
 459                          */
 460                         src_buf_start =
 461                                 rte_pktmbuf_iova_offset(op->sym->m_src,
 462                                                                 min_ofs);
 463                 }
 464                 dst_buf_start = src_buf_start;
 465         }
 466
 467         if (do_cipher || do_aead) {
 468                 cipher_param->cipher_offset =
 469                                 (uint32_t)rte_pktmbuf_iova_offset(
 470                                 op->sym->m_src, cipher_ofs) - src_buf_start;
 471                 cipher_param->cipher_length = cipher_len;
 472         } else {
 473                 cipher_param->cipher_offset = 0;
 474                 cipher_param->cipher_length = 0;
 475         }
 476
 477         if (do_auth || do_aead) {
 478                 auth_param->auth_off = (uint32_t)rte_pktmbuf_iova_offset(
 479                                 op->sym->m_src, auth_ofs) - src_buf_start;
 480                 auth_param->auth_len = auth_len;
 481         } else {
 482                 auth_param->auth_off = 0;
 483                 auth_param->auth_len = 0;
 484         }
 485
 486         qat_req->comn_mid.dst_length =
 487                 qat_req->comn_mid.src_length =
 488                 (cipher_param->cipher_offset + cipher_param->cipher_length)
 489                 > (auth_param->auth_off + auth_param->auth_len) ?
 490                 (cipher_param->cipher_offset + cipher_param->cipher_length)
 491                 : (auth_param->auth_off + auth_param->auth_len);
 492
 493         if (do_sgl) {
 494
 495                 ICP_QAT_FW_COMN_PTR_TYPE_SET(qat_req->comn_hdr.comn_req_flags,
 496                                 QAT_COMN_PTR_TYPE_SGL);
 497                 ret = qat_sgl_fill_array(op->sym->m_src,
 498                    (int64_t)(src_buf_start - rte_pktmbuf_iova(op->sym->m_src)),
 499                    &cookie->qat_sgl_src,
 500                    qat_req->comn_mid.src_length,
 501                    QAT_SYM_SGL_MAX_NUMBER);
 502
 503                 if (unlikely(ret)) {
 504                         QAT_DP_LOG(ERR, "QAT PMD Cannot fill sgl array");
 505                         return ret;
 506                 }
 507
 508                 if (likely(op->sym->m_dst == NULL))
 509                         qat_req->comn_mid.dest_data_addr =
 510                                 qat_req->comn_mid.src_data_addr =
 511                                 cookie->qat_sgl_src_phys_addr;
 512                 else {
 513                         ret = qat_sgl_fill_array(op->sym->m_dst,
 514                                 (int64_t)(dst_buf_start -
 515                                           rte_pktmbuf_iova(op->sym->m_dst)),
 516                                  &cookie->qat_sgl_dst,
 517                                  qat_req->comn_mid.dst_length,
 518                                  QAT_SYM_SGL_MAX_NUMBER);
 519
 520                         if (unlikely(ret)) {
 521                                 QAT_DP_LOG(ERR, "QAT PMD can't fill sgl array");
 522                                 return ret;
 523                         }
 524
 525                         qat_req->comn_mid.src_data_addr =
 526                                 cookie->qat_sgl_src_phys_addr;
 527                         qat_req->comn_mid.dest_data_addr =
 528                                         cookie->qat_sgl_dst_phys_addr;
 529                 }
 530         } else {
 531                 qat_req->comn_mid.src_data_addr = src_buf_start;
 532                 qat_req->comn_mid.dest_data_addr = dst_buf_start;
 533         }
 534
 535 #if RTE_LOG_DP_LEVEL >= RTE_LOG_DEBUG
 536         QAT_DP_HEXDUMP_LOG(DEBUG, "qat_req:", qat_req,
 537                         sizeof(struct icp_qat_fw_la_bulk_req));
 538         QAT_DP_HEXDUMP_LOG(DEBUG, "src_data:",
 539                         rte_pktmbuf_mtod(op->sym->m_src, uint8_t*),
 540                         rte_pktmbuf_data_len(op->sym->m_src));
 541         if (do_cipher) {
 542                 uint8_t *cipher_iv_ptr = rte_crypto_op_ctod_offset(op,
 543                                                 uint8_t *,
 544                                                 ctx->cipher_iv.offset);
 545                 QAT_DP_HEXDUMP_LOG(DEBUG, "cipher iv:", cipher_iv_ptr,
 546                                 ctx->cipher_iv.length);
 547         }
 548
 549         if (do_auth) {
 550                 if (ctx->auth_iv.length) {
 551                         uint8_t *auth_iv_ptr = rte_crypto_op_ctod_offset(op,
 552                                                         uint8_t *,
 553                                                         ctx->auth_iv.offset);
 554                         QAT_DP_HEXDUMP_LOG(DEBUG, "auth iv:", auth_iv_ptr,
 555                                                 ctx->auth_iv.length);
 556                 }
 557                 QAT_DP_HEXDUMP_LOG(DEBUG, "digest:", op->sym->auth.digest.data,
 558                                 ctx->digest_length);
 559         }
 560
 561         if (do_aead) {
 562                 QAT_DP_HEXDUMP_LOG(DEBUG, "digest:", op->sym->aead.digest.data,
 563                                 ctx->digest_length);
 564                 QAT_DP_HEXDUMP_LOG(DEBUG, "aad:", op->sym->aead.aad.data,
 565                                 ctx->aad_len);
 566         }
 567 #endif
 568         return 0;
 569 }