drivers/event/dpaa/dpaa_eventdev.h

   1 /*   SPDX-License-Identifier:        BSD-3-Clause
   2  *   Copyright 2017 NXP
   3  */
   4
   5 #ifndef __DPAA_EVENTDEV_H__
   6 #define __DPAA_EVENTDEV_H__
   7
   8 #include <rte_eventdev_pmd.h>
   9 #include <rte_eventdev_pmd_vdev.h>
  10 #include <rte_atomic.h>
  11 #include <rte_per_lcore.h>
  12
  13 #define EVENTDEV_NAME_DPAA_PMD          event_dpaa1
  14
  15 #define EVENTDEV_DRV_LOG(fmt, args...)  \
  16                 DPAA_EVENTDEV_INFO(fmt, ## args)
  17 #define EVENTDEV_DRV_FUNC_TRACE()       \
  18                 DPAA_EVENTDEV_DEBUG("%s() Called:\n", __func__)
  19 #define EVENTDEV_DRV_ERR(fmt, args...)  \
  20                 DPAA_EVENTDEV_ERR("%s(): " fmt "\n", __func__, ## args)
  21
  22 #define DPAA_EVENT_MAX_PORTS                    8
  23 #define DPAA_EVENT_MAX_QUEUES                   16
  24 #define DPAA_EVENT_MIN_DEQUEUE_TIMEOUT  1
  25 #define DPAA_EVENT_MAX_DEQUEUE_TIMEOUT  (UINT32_MAX - 1)
  26 #define DPAA_EVENT_MAX_QUEUE_FLOWS              2048
  27 #define DPAA_EVENT_MAX_QUEUE_PRIORITY_LEVELS    8
  28 #define DPAA_EVENT_MAX_EVENT_PRIORITY_LEVELS    0
  29 #define DPAA_EVENT_MAX_EVENT_PORT               RTE_MIN(RTE_MAX_LCORE, INT8_MAX)
  30 #define DPAA_EVENT_MAX_PORT_DEQUEUE_DEPTH       8
  31 #define DPAA_EVENT_PORT_DEQUEUE_TIMEOUT_NS      100UL
  32 #define DPAA_EVENT_PORT_DEQUEUE_TIMEOUT_INVALID ((uint64_t)-1)
  33 #define DPAA_EVENT_MAX_PORT_ENQUEUE_DEPTH       1
  34 #define DPAA_EVENT_MAX_NUM_EVENTS               (INT32_MAX - 1)
  35
  36 #define DPAA_EVENT_DEV_CAP                      \
  37 do {                                            \
  38         RTE_EVENT_DEV_CAP_DISTRIBUTED_SCHED |   \
  39         RTE_EVENT_DEV_CAP_BURST_MODE;           \
  40 } while (0)
  41
  42 #define DPAA_EVENT_QUEUE_ATOMIC_FLOWS   0
  43 #define DPAA_EVENT_QUEUE_ORDER_SEQUENCES        2048
  44
  45 #define RTE_EVENT_ETH_RX_ADAPTER_DPAA_CAP \
  46                 (RTE_EVENT_ETH_RX_ADAPTER_CAP_INTERNAL_PORT | \
  47                 RTE_EVENT_ETH_RX_ADAPTER_CAP_MULTI_EVENTQ | \
  48                 RTE_EVENT_ETH_RX_ADAPTER_CAP_OVERRIDE_FLOW_ID)
  49
  50 struct dpaa_eventq {
  51         /* Channel Id */
  52         uint16_t ch_id;
  53         /* Configuration provided by the user */
  54         uint32_t event_queue_cfg;
  55         uint32_t event_queue_id;
  56         /* Event port */
  57         void *event_port;
  58 };
  59
  60 struct dpaa_port {
  61         struct dpaa_eventq evq_info[DPAA_EVENT_MAX_QUEUES];
  62         uint8_t num_linked_evq;
  63         uint8_t is_port_linked;
  64         uint64_t timeout;
  65 };
  66
  67 struct dpaa_eventdev {
  68         struct dpaa_eventq evq_info[DPAA_EVENT_MAX_QUEUES];
  69         struct dpaa_port ports[DPAA_EVENT_MAX_PORTS];
  70         uint32_t dequeue_timeout_ns;
  71         uint32_t nb_events_limit;
  72         uint8_t max_event_queues;
  73         uint8_t nb_event_queues;
  74         uint8_t nb_event_ports;
  75         uint8_t resvd;
  76         uint32_t nb_event_queue_flows;
  77         uint32_t nb_event_port_dequeue_depth;
  78         uint32_t nb_event_port_enqueue_depth;
  79         uint32_t event_dev_cfg;
  80 };
  81 #endif /* __DPAA_EVENTDEV_H__ */