4 * Copyright(c) 2016-2017 Intel Corporation. All rights reserved.
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
10 * * Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * * Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in
14 * the documentation and/or other materials provided with the
16 * * Neither the name of Intel Corporation nor the names of its
17 * contributors may be used to endorse or promote products derived
18 * from this software without specific prior written permission.
20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
21 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
23 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
25 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
26 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
30 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 #include <rte_bus_vdev.h>
37 #include <rte_kvargs.h>
39 #include <rte_errno.h>
40 #include <rte_event_ring.h>
41 #include <rte_service_component.h>
46 #define EVENTDEV_NAME_SW_PMD event_sw
47 #define NUMA_NODE_ARG "numa_node"
48 #define SCHED_QUANTA_ARG "sched_quanta"
49 #define CREDIT_QUANTA_ARG "credit_quanta"
52 sw_info_get(struct rte_eventdev *dev, struct rte_event_dev_info *info);
55 sw_port_link(struct rte_eventdev *dev, void *port, const uint8_t queues[],
56 const uint8_t priorities[], uint16_t num)
58 struct sw_port *p = port;
59 struct sw_evdev *sw = sw_pmd_priv(dev);
62 RTE_SET_USED(priorities);
63 for (i = 0; i < num; i++) {
64 struct sw_qid *q = &sw->qids[queues[i]];
67 /* check for qid map overflow */
68 if (q->cq_num_mapped_cqs >= RTE_DIM(q->cq_map)) {
73 if (p->is_directed && p->num_qids_mapped > 0) {
78 for (j = 0; j < q->cq_num_mapped_cqs; j++) {
79 if (q->cq_map[j] == p->id)
83 /* check if port is already linked */
84 if (j < q->cq_num_mapped_cqs)
87 if (q->type == SW_SCHED_TYPE_DIRECT) {
88 /* check directed qids only map to one port */
89 if (p->num_qids_mapped > 0) {
93 /* check port only takes a directed flow */
100 p->num_qids_mapped = 1;
101 } else if (q->type == RTE_SCHED_TYPE_ORDERED) {
102 p->num_ordered_qids++;
103 p->num_qids_mapped++;
104 } else if (q->type == RTE_SCHED_TYPE_ATOMIC ||
105 q->type == RTE_SCHED_TYPE_PARALLEL) {
106 p->num_qids_mapped++;
109 q->cq_map[q->cq_num_mapped_cqs] = p->id;
111 q->cq_num_mapped_cqs++;
117 sw_port_unlink(struct rte_eventdev *dev, void *port, uint8_t queues[],
120 struct sw_port *p = port;
121 struct sw_evdev *sw = sw_pmd_priv(dev);
125 for (i = 0; i < nb_unlinks; i++) {
126 struct sw_qid *q = &sw->qids[queues[i]];
127 for (j = 0; j < q->cq_num_mapped_cqs; j++) {
128 if (q->cq_map[j] == p->id) {
130 q->cq_map[q->cq_num_mapped_cqs - 1];
132 q->cq_num_mapped_cqs--;
135 p->num_qids_mapped--;
137 if (q->type == RTE_SCHED_TYPE_ORDERED)
138 p->num_ordered_qids--;
148 sw_port_setup(struct rte_eventdev *dev, uint8_t port_id,
149 const struct rte_event_port_conf *conf)
151 struct sw_evdev *sw = sw_pmd_priv(dev);
152 struct sw_port *p = &sw->ports[port_id];
153 char buf[RTE_RING_NAMESIZE];
156 struct rte_event_dev_info info;
157 sw_info_get(dev, &info);
159 /* detect re-configuring and return credits to instance if needed */
160 if (p->initialized) {
161 /* taking credits from pool is done one quanta at a time, and
162 * credits may be spend (counted in p->inflights) or still
163 * available in the port (p->inflight_credits). We must return
164 * the sum to no leak credits
166 int possible_inflights = p->inflight_credits + p->inflights;
167 rte_atomic32_sub(&sw->inflights, possible_inflights);
170 *p = (struct sw_port){0}; /* zero entire structure */
174 /* check to see if rings exists - port_setup() can be called multiple
175 * times legally (assuming device is stopped). If ring exists, free it
176 * to so it gets re-created with the correct size
178 snprintf(buf, sizeof(buf), "sw%d_p%u_%s", dev->data->dev_id,
179 port_id, "rx_worker_ring");
180 struct rte_event_ring *existing_ring = rte_event_ring_lookup(buf);
182 rte_event_ring_free(existing_ring);
184 p->rx_worker_ring = rte_event_ring_create(buf, MAX_SW_PROD_Q_DEPTH,
185 dev->data->socket_id,
186 RING_F_SP_ENQ | RING_F_SC_DEQ | RING_F_EXACT_SZ);
187 if (p->rx_worker_ring == NULL) {
188 SW_LOG_ERR("Error creating RX worker ring for port %d\n",
193 p->inflight_max = conf->new_event_threshold;
195 /* check if ring exists, same as rx_worker above */
196 snprintf(buf, sizeof(buf), "sw%d_p%u, %s", dev->data->dev_id,
197 port_id, "cq_worker_ring");
198 existing_ring = rte_event_ring_lookup(buf);
200 rte_event_ring_free(existing_ring);
202 p->cq_worker_ring = rte_event_ring_create(buf, conf->dequeue_depth,
203 dev->data->socket_id,
204 RING_F_SP_ENQ | RING_F_SC_DEQ | RING_F_EXACT_SZ);
205 if (p->cq_worker_ring == NULL) {
206 rte_event_ring_free(p->rx_worker_ring);
207 SW_LOG_ERR("Error creating CQ worker ring for port %d\n",
211 sw->cq_ring_space[port_id] = conf->dequeue_depth;
213 /* set hist list contents to empty */
214 for (i = 0; i < SW_PORT_HIST_LIST; i++) {
215 p->hist_list[i].fid = -1;
216 p->hist_list[i].qid = -1;
218 dev->data->ports[port_id] = p;
226 sw_port_release(void *port)
228 struct sw_port *p = (void *)port;
232 rte_event_ring_free(p->rx_worker_ring);
233 rte_event_ring_free(p->cq_worker_ring);
234 memset(p, 0, sizeof(*p));
238 qid_init(struct sw_evdev *sw, unsigned int idx, int type,
239 const struct rte_event_queue_conf *queue_conf)
242 int dev_id = sw->data->dev_id;
243 int socket_id = sw->data->socket_id;
244 char buf[IQ_RING_NAMESIZE];
245 struct sw_qid *qid = &sw->qids[idx];
247 for (i = 0; i < SW_IQS_MAX; i++) {
248 snprintf(buf, sizeof(buf), "q_%u_iq_%d", idx, i);
249 qid->iq[i] = iq_ring_create(buf, socket_id);
251 SW_LOG_DBG("ring create failed");
256 /* Initialize the FID structures to no pinning (-1), and zero packets */
257 const struct sw_fid_t fid = {.cq = -1, .pcount = 0};
258 for (i = 0; i < RTE_DIM(qid->fids); i++)
263 qid->priority = queue_conf->priority;
265 if (qid->type == RTE_SCHED_TYPE_ORDERED) {
266 char ring_name[RTE_RING_NAMESIZE];
267 uint32_t window_size;
269 /* rte_ring and window_size_mask require require window_size to
272 window_size = rte_align32pow2(
273 queue_conf->nb_atomic_order_sequences);
275 qid->window_size = window_size - 1;
279 "invalid reorder_window_size for ordered queue\n"
284 snprintf(buf, sizeof(buf), "sw%d_iq_%d_rob", dev_id, i);
285 qid->reorder_buffer = rte_zmalloc_socket(buf,
286 window_size * sizeof(qid->reorder_buffer[0]),
288 if (!qid->reorder_buffer) {
289 SW_LOG_DBG("reorder_buffer malloc failed\n");
293 memset(&qid->reorder_buffer[0],
295 window_size * sizeof(qid->reorder_buffer[0]));
297 snprintf(ring_name, sizeof(ring_name), "sw%d_q%d_freelist",
300 /* lookup the ring, and if it already exists, free it */
301 struct rte_ring *cleanup = rte_ring_lookup(ring_name);
303 rte_ring_free(cleanup);
305 qid->reorder_buffer_freelist = rte_ring_create(ring_name,
308 RING_F_SP_ENQ | RING_F_SC_DEQ);
309 if (!qid->reorder_buffer_freelist) {
310 SW_LOG_DBG("freelist ring create failed");
314 /* Populate the freelist with reorder buffer entries. Enqueue
315 * 'window_size - 1' entries because the rte_ring holds only
318 for (i = 0; i < window_size - 1; i++) {
319 if (rte_ring_sp_enqueue(qid->reorder_buffer_freelist,
320 &qid->reorder_buffer[i]) < 0)
324 qid->reorder_buffer_index = 0;
328 qid->initialized = 1;
333 for (i = 0; i < SW_IQS_MAX; i++) {
335 iq_ring_destroy(qid->iq[i]);
338 if (qid->reorder_buffer) {
339 rte_free(qid->reorder_buffer);
340 qid->reorder_buffer = NULL;
343 if (qid->reorder_buffer_freelist) {
344 rte_ring_free(qid->reorder_buffer_freelist);
345 qid->reorder_buffer_freelist = NULL;
352 sw_queue_release(struct rte_eventdev *dev, uint8_t id)
354 struct sw_evdev *sw = sw_pmd_priv(dev);
355 struct sw_qid *qid = &sw->qids[id];
358 for (i = 0; i < SW_IQS_MAX; i++)
359 iq_ring_destroy(qid->iq[i]);
361 if (qid->type == RTE_SCHED_TYPE_ORDERED) {
362 rte_free(qid->reorder_buffer);
363 rte_ring_free(qid->reorder_buffer_freelist);
365 memset(qid, 0, sizeof(*qid));
369 sw_queue_setup(struct rte_eventdev *dev, uint8_t queue_id,
370 const struct rte_event_queue_conf *conf)
374 type = conf->schedule_type;
376 if (RTE_EVENT_QUEUE_CFG_SINGLE_LINK & conf->event_queue_cfg) {
377 type = SW_SCHED_TYPE_DIRECT;
378 } else if (RTE_EVENT_QUEUE_CFG_ALL_TYPES
379 & conf->event_queue_cfg) {
380 SW_LOG_ERR("QUEUE_CFG_ALL_TYPES not supported\n");
384 struct sw_evdev *sw = sw_pmd_priv(dev);
386 if (sw->qids[queue_id].initialized)
387 sw_queue_release(dev, queue_id);
389 return qid_init(sw, queue_id, type, conf);
393 sw_queue_def_conf(struct rte_eventdev *dev, uint8_t queue_id,
394 struct rte_event_queue_conf *conf)
397 RTE_SET_USED(queue_id);
399 static const struct rte_event_queue_conf default_conf = {
400 .nb_atomic_flows = 4096,
401 .nb_atomic_order_sequences = 1,
402 .schedule_type = RTE_SCHED_TYPE_ATOMIC,
403 .priority = RTE_EVENT_DEV_PRIORITY_NORMAL,
406 *conf = default_conf;
410 sw_port_def_conf(struct rte_eventdev *dev, uint8_t port_id,
411 struct rte_event_port_conf *port_conf)
414 RTE_SET_USED(port_id);
416 port_conf->new_event_threshold = 1024;
417 port_conf->dequeue_depth = 16;
418 port_conf->enqueue_depth = 16;
422 sw_dev_configure(const struct rte_eventdev *dev)
424 struct sw_evdev *sw = sw_pmd_priv(dev);
425 const struct rte_eventdev_data *data = dev->data;
426 const struct rte_event_dev_config *conf = &data->dev_conf;
428 sw->qid_count = conf->nb_event_queues;
429 sw->port_count = conf->nb_event_ports;
430 sw->nb_events_limit = conf->nb_events_limit;
431 rte_atomic32_set(&sw->inflights, 0);
433 if (conf->event_dev_cfg & RTE_EVENT_DEV_CFG_PER_DEQUEUE_TIMEOUT)
442 sw_eth_rx_adapter_caps_get(const struct rte_eventdev *dev,
443 const struct rte_eth_dev *eth_dev,
447 RTE_SET_USED(eth_dev);
448 *caps = RTE_EVENT_ETH_RX_ADAPTER_SW_CAP;
453 sw_info_get(struct rte_eventdev *dev, struct rte_event_dev_info *info)
457 static const struct rte_event_dev_info evdev_sw_info = {
458 .driver_name = SW_PMD_NAME,
459 .max_event_queues = RTE_EVENT_MAX_QUEUES_PER_DEV,
460 .max_event_queue_flows = SW_QID_NUM_FIDS,
461 .max_event_queue_priority_levels = SW_Q_PRIORITY_MAX,
462 .max_event_priority_levels = SW_IQS_MAX,
463 .max_event_ports = SW_PORTS_MAX,
464 .max_event_port_dequeue_depth = MAX_SW_CONS_Q_DEPTH,
465 .max_event_port_enqueue_depth = MAX_SW_PROD_Q_DEPTH,
466 .max_num_events = SW_INFLIGHT_EVENTS_TOTAL,
467 .event_dev_cap = (RTE_EVENT_DEV_CAP_QUEUE_QOS |
468 RTE_EVENT_DEV_CAP_BURST_MODE |
469 RTE_EVENT_DEV_CAP_EVENT_QOS),
472 *info = evdev_sw_info;
476 sw_dump(struct rte_eventdev *dev, FILE *f)
478 const struct sw_evdev *sw = sw_pmd_priv(dev);
480 static const char * const q_type_strings[] = {
481 "Ordered", "Atomic", "Parallel", "Directed"
484 fprintf(f, "EventDev %s: ports %d, qids %d\n", "todo-fix-name",
485 sw->port_count, sw->qid_count);
487 fprintf(f, "\trx %"PRIu64"\n\tdrop %"PRIu64"\n\ttx %"PRIu64"\n",
488 sw->stats.rx_pkts, sw->stats.rx_dropped, sw->stats.tx_pkts);
489 fprintf(f, "\tsched calls: %"PRIu64"\n", sw->sched_called);
490 fprintf(f, "\tsched cq/qid call: %"PRIu64"\n", sw->sched_cq_qid_called);
491 fprintf(f, "\tsched no IQ enq: %"PRIu64"\n", sw->sched_no_iq_enqueues);
492 fprintf(f, "\tsched no CQ enq: %"PRIu64"\n", sw->sched_no_cq_enqueues);
493 uint32_t inflights = rte_atomic32_read(&sw->inflights);
494 uint32_t credits = sw->nb_events_limit - inflights;
495 fprintf(f, "\tinflight %d, credits: %d\n", inflights, credits);
497 #define COL_RED "\x1b[31m"
498 #define COL_RESET "\x1b[0m"
500 for (i = 0; i < sw->port_count; i++) {
502 const struct sw_port *p = &sw->ports[i];
503 if (!p->initialized) {
504 fprintf(f, " %sPort %d not initialized.%s\n",
505 COL_RED, i, COL_RESET);
508 fprintf(f, " Port %d %s\n", i,
509 p->is_directed ? " (SingleCons)" : "");
510 fprintf(f, "\trx %"PRIu64"\tdrop %"PRIu64"\ttx %"PRIu64
511 "\t%sinflight %d%s\n", sw->ports[i].stats.rx_pkts,
512 sw->ports[i].stats.rx_dropped,
513 sw->ports[i].stats.tx_pkts,
514 (p->inflights == p->inflight_max) ?
516 sw->ports[i].inflights, COL_RESET);
518 fprintf(f, "\tMax New: %u"
519 "\tAvg cycles PP: %"PRIu64"\tCredits: %u\n",
520 sw->ports[i].inflight_max,
521 sw->ports[i].avg_pkt_ticks,
522 sw->ports[i].inflight_credits);
523 fprintf(f, "\tReceive burst distribution:\n");
524 float zp_percent = p->zero_polls * 100.0 / p->total_polls;
525 fprintf(f, zp_percent < 10 ? "\t\t0:%.02f%% " : "\t\t0:%.0f%% ",
527 for (max = (int)RTE_DIM(p->poll_buckets); max-- > 0;)
528 if (p->poll_buckets[max] != 0)
530 for (j = 0; j <= max; j++) {
531 if (p->poll_buckets[j] != 0) {
532 float poll_pc = p->poll_buckets[j] * 100.0 /
534 fprintf(f, "%u-%u:%.02f%% ",
535 ((j << SW_DEQ_STAT_BUCKET_SHIFT) + 1),
536 ((j+1) << SW_DEQ_STAT_BUCKET_SHIFT),
542 if (p->rx_worker_ring) {
543 uint64_t used = rte_event_ring_count(p->rx_worker_ring);
544 uint64_t space = rte_event_ring_free_count(
546 const char *col = (space == 0) ? COL_RED : COL_RESET;
547 fprintf(f, "\t%srx ring used: %4"PRIu64"\tfree: %4"
548 PRIu64 COL_RESET"\n", col, used, space);
550 fprintf(f, "\trx ring not initialized.\n");
552 if (p->cq_worker_ring) {
553 uint64_t used = rte_event_ring_count(p->cq_worker_ring);
554 uint64_t space = rte_event_ring_free_count(
556 const char *col = (space == 0) ? COL_RED : COL_RESET;
557 fprintf(f, "\t%scq ring used: %4"PRIu64"\tfree: %4"
558 PRIu64 COL_RESET"\n", col, used, space);
560 fprintf(f, "\tcq ring not initialized.\n");
563 for (i = 0; i < sw->qid_count; i++) {
564 const struct sw_qid *qid = &sw->qids[i];
565 if (!qid->initialized) {
566 fprintf(f, " %sQueue %d not initialized.%s\n",
567 COL_RED, i, COL_RESET);
570 int affinities_per_port[SW_PORTS_MAX] = {0};
571 uint32_t inflights = 0;
573 fprintf(f, " Queue %d (%s)\n", i, q_type_strings[qid->type]);
574 fprintf(f, "\trx %"PRIu64"\tdrop %"PRIu64"\ttx %"PRIu64"\n",
575 qid->stats.rx_pkts, qid->stats.rx_dropped,
577 if (qid->type == RTE_SCHED_TYPE_ORDERED) {
578 struct rte_ring *rob_buf_free =
579 qid->reorder_buffer_freelist;
581 fprintf(f, "\tReorder entries in use: %u\n",
582 rte_ring_free_count(rob_buf_free));
585 "\tReorder buffer not initialized\n");
589 for (flow = 0; flow < RTE_DIM(qid->fids); flow++)
590 if (qid->fids[flow].cq != -1) {
591 affinities_per_port[qid->fids[flow].cq]++;
592 inflights += qid->fids[flow].pcount;
596 fprintf(f, "\tPer Port Stats:\n");
597 for (port = 0; port < sw->port_count; port++) {
598 fprintf(f, "\t Port %d: Pkts: %"PRIu64, port,
600 fprintf(f, "\tFlows: %d\n", affinities_per_port[port]);
604 uint32_t iq_printed = 0;
605 for (iq = 0; iq < SW_IQS_MAX; iq++) {
607 fprintf(f, "\tiq %d is not initialized.\n", iq);
611 uint32_t used = iq_ring_count(qid->iq[iq]);
612 uint32_t free = iq_ring_free_count(qid->iq[iq]);
613 const char *col = (free == 0) ? COL_RED : COL_RESET;
615 fprintf(f, "\t%siq %d: Used %d\tFree %d"
616 COL_RESET"\n", col, iq, used, free);
621 fprintf(f, "\t-- iqs empty --\n");
626 sw_start(struct rte_eventdev *dev)
629 struct sw_evdev *sw = sw_pmd_priv(dev);
631 rte_service_component_runstate_set(sw->service_id, 1);
633 /* check a service core is mapped to this service */
634 if (!rte_service_runstate_get(sw->service_id)) {
635 SW_LOG_ERR("Warning: No Service core enabled on service %s\n",
640 /* check all ports are set up */
641 for (i = 0; i < sw->port_count; i++)
642 if (sw->ports[i].rx_worker_ring == NULL) {
643 SW_LOG_ERR("Port %d not configured\n", i);
647 /* check all queues are configured and mapped to ports*/
648 for (i = 0; i < sw->qid_count; i++)
649 if (sw->qids[i].iq[0] == NULL ||
650 sw->qids[i].cq_num_mapped_cqs == 0) {
651 SW_LOG_ERR("Queue %d not configured\n", i);
655 /* build up our prioritized array of qids */
656 /* We don't use qsort here, as if all/multiple entries have the same
657 * priority, the result is non-deterministic. From "man 3 qsort":
658 * "If two members compare as equal, their order in the sorted
659 * array is undefined."
662 for (j = 0; j <= RTE_EVENT_DEV_PRIORITY_LOWEST; j++) {
663 for (i = 0; i < sw->qid_count; i++) {
664 if (sw->qids[i].priority == j) {
665 sw->qids_prioritized[qidx] = &sw->qids[i];
671 if (sw_xstats_init(sw) < 0)
681 sw_stop(struct rte_eventdev *dev)
683 struct sw_evdev *sw = sw_pmd_priv(dev);
684 sw_xstats_uninit(sw);
690 sw_close(struct rte_eventdev *dev)
692 struct sw_evdev *sw = sw_pmd_priv(dev);
695 for (i = 0; i < sw->qid_count; i++)
696 sw_queue_release(dev, i);
699 for (i = 0; i < sw->port_count; i++)
700 sw_port_release(&sw->ports[i]);
703 memset(&sw->stats, 0, sizeof(sw->stats));
704 sw->sched_called = 0;
705 sw->sched_no_iq_enqueues = 0;
706 sw->sched_no_cq_enqueues = 0;
707 sw->sched_cq_qid_called = 0;
713 assign_numa_node(const char *key __rte_unused, const char *value, void *opaque)
715 int *socket_id = opaque;
716 *socket_id = atoi(value);
717 if (*socket_id >= RTE_MAX_NUMA_NODES)
723 set_sched_quanta(const char *key __rte_unused, const char *value, void *opaque)
725 int *quanta = opaque;
726 *quanta = atoi(value);
727 if (*quanta < 0 || *quanta >= 4096)
733 set_credit_quanta(const char *key __rte_unused, const char *value, void *opaque)
735 int *credit = opaque;
736 *credit = atoi(value);
737 if (*credit < 0 || *credit >= 128)
743 static int32_t sw_sched_service_func(void *args)
745 struct rte_eventdev *dev = args;
746 sw_event_schedule(dev);
751 sw_probe(struct rte_vdev_device *vdev)
753 static const struct rte_eventdev_ops evdev_sw_ops = {
754 .dev_configure = sw_dev_configure,
755 .dev_infos_get = sw_info_get,
756 .dev_close = sw_close,
757 .dev_start = sw_start,
761 .queue_def_conf = sw_queue_def_conf,
762 .queue_setup = sw_queue_setup,
763 .queue_release = sw_queue_release,
764 .port_def_conf = sw_port_def_conf,
765 .port_setup = sw_port_setup,
766 .port_release = sw_port_release,
767 .port_link = sw_port_link,
768 .port_unlink = sw_port_unlink,
770 .eth_rx_adapter_caps_get = sw_eth_rx_adapter_caps_get,
772 .xstats_get = sw_xstats_get,
773 .xstats_get_names = sw_xstats_get_names,
774 .xstats_get_by_name = sw_xstats_get_by_name,
775 .xstats_reset = sw_xstats_reset,
778 static const char *const args[] = {
786 struct rte_eventdev *dev;
788 int socket_id = rte_socket_id();
789 int sched_quanta = SW_DEFAULT_SCHED_QUANTA;
790 int credit_quanta = SW_DEFAULT_CREDIT_QUANTA;
792 name = rte_vdev_device_name(vdev);
793 params = rte_vdev_device_args(vdev);
794 if (params != NULL && params[0] != '\0') {
795 struct rte_kvargs *kvlist = rte_kvargs_parse(params, args);
799 "Ignoring unsupported parameters when creating device '%s'\n",
802 int ret = rte_kvargs_process(kvlist, NUMA_NODE_ARG,
803 assign_numa_node, &socket_id);
806 "%s: Error parsing numa node parameter",
808 rte_kvargs_free(kvlist);
812 ret = rte_kvargs_process(kvlist, SCHED_QUANTA_ARG,
813 set_sched_quanta, &sched_quanta);
816 "%s: Error parsing sched quanta parameter",
818 rte_kvargs_free(kvlist);
822 ret = rte_kvargs_process(kvlist, CREDIT_QUANTA_ARG,
823 set_credit_quanta, &credit_quanta);
826 "%s: Error parsing credit quanta parameter",
828 rte_kvargs_free(kvlist);
832 rte_kvargs_free(kvlist);
837 "Creating eventdev sw device %s, numa_node=%d, sched_quanta=%d, credit_quanta=%d\n",
838 name, socket_id, sched_quanta, credit_quanta);
840 dev = rte_event_pmd_vdev_init(name,
841 sizeof(struct sw_evdev), socket_id);
843 SW_LOG_ERR("eventdev vdev init() failed");
846 dev->dev_ops = &evdev_sw_ops;
847 dev->enqueue = sw_event_enqueue;
848 dev->enqueue_burst = sw_event_enqueue_burst;
849 dev->enqueue_new_burst = sw_event_enqueue_burst;
850 dev->enqueue_forward_burst = sw_event_enqueue_burst;
851 dev->dequeue = sw_event_dequeue;
852 dev->dequeue_burst = sw_event_dequeue_burst;
854 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
857 sw = dev->data->dev_private;
858 sw->data = dev->data;
860 /* copy values passed from vdev command line to instance */
861 sw->credit_update_quanta = credit_quanta;
862 sw->sched_quanta = sched_quanta;
864 /* register service with EAL */
865 struct rte_service_spec service;
866 memset(&service, 0, sizeof(struct rte_service_spec));
867 snprintf(service.name, sizeof(service.name), "%s_service", name);
868 snprintf(sw->service_name, sizeof(sw->service_name), "%s_service",
870 service.socket_id = socket_id;
871 service.callback = sw_sched_service_func;
872 service.callback_userdata = (void *)dev;
874 int32_t ret = rte_service_component_register(&service, &sw->service_id);
876 SW_LOG_ERR("service register() failed");
880 dev->data->service_inited = 1;
881 dev->data->service_id = sw->service_id;
887 sw_remove(struct rte_vdev_device *vdev)
891 name = rte_vdev_device_name(vdev);
895 SW_LOG_INFO("Closing eventdev sw device %s\n", name);
897 return rte_event_pmd_vdev_uninit(name);
900 static struct rte_vdev_driver evdev_sw_pmd_drv = {
905 RTE_PMD_REGISTER_VDEV(EVENTDEV_NAME_SW_PMD, evdev_sw_pmd_drv);
906 RTE_PMD_REGISTER_PARAM_STRING(event_sw, NUMA_NODE_ARG "=<int> "
907 SCHED_QUANTA_ARG "=<int>" CREDIT_QUANTA_ARG "=<int>");