8a2c9d4f93ecabc8201e62530397184e58c2be90
[deb_dpdk.git] / drivers / event / sw / sw_evdev_scheduler.c
1 /*-
2  *   BSD LICENSE
3  *
4  *   Copyright(c) 2016-2017 Intel Corporation. All rights reserved.
5  *
6  *   Redistribution and use in source and binary forms, with or without
7  *   modification, are permitted provided that the following conditions
8  *   are met:
9  *
10  *     * Redistributions of source code must retain the above copyright
11  *       notice, this list of conditions and the following disclaimer.
12  *     * Redistributions in binary form must reproduce the above copyright
13  *       notice, this list of conditions and the following disclaimer in
14  *       the documentation and/or other materials provided with the
15  *       distribution.
16  *     * Neither the name of Intel Corporation nor the names of its
17  *       contributors may be used to endorse or promote products derived
18  *       from this software without specific prior written permission.
19  *
20  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
21  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
23  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
24  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
25  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
26  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
30  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31  */
32
33 #include <rte_ring.h>
34 #include <rte_hash_crc.h>
35 #include <rte_event_ring.h>
36 #include "sw_evdev.h"
37 #include "iq_ring.h"
38
39 #define SW_IQS_MASK (SW_IQS_MAX-1)
40
41 /* Retrieve the highest priority IQ or -1 if no pkts available. Doing the
42  * CLZ twice is faster than caching the value due to data dependencies
43  */
44 #define PKT_MASK_TO_IQ(pkts) \
45         (__builtin_ctz(pkts | (1 << SW_IQS_MAX)))
46
47 #if SW_IQS_MAX != 4
48 #error Misconfigured PRIO_TO_IQ caused by SW_IQS_MAX value change
49 #endif
50 #define PRIO_TO_IQ(prio) (prio >> 6)
51
52 #define MAX_PER_IQ_DEQUEUE 48
53 #define FLOWID_MASK (SW_QID_NUM_FIDS-1)
54 /* use cheap bit mixing, we only need to lose a few bits */
55 #define SW_HASH_FLOWID(f) (((f) ^ (f >> 10)) & FLOWID_MASK)
56
57 static inline uint32_t
58 sw_schedule_atomic_to_cq(struct sw_evdev *sw, struct sw_qid * const qid,
59                 uint32_t iq_num, unsigned int count)
60 {
61         struct rte_event qes[MAX_PER_IQ_DEQUEUE]; /* count <= MAX */
62         struct rte_event blocked_qes[MAX_PER_IQ_DEQUEUE];
63         uint32_t nb_blocked = 0;
64         uint32_t i;
65
66         if (count > MAX_PER_IQ_DEQUEUE)
67                 count = MAX_PER_IQ_DEQUEUE;
68
69         /* This is the QID ID. The QID ID is static, hence it can be
70          * used to identify the stage of processing in history lists etc
71          */
72         uint32_t qid_id = qid->id;
73
74         iq_ring_dequeue_burst(qid->iq[iq_num], qes, count);
75         for (i = 0; i < count; i++) {
76                 const struct rte_event *qe = &qes[i];
77                 const uint16_t flow_id = SW_HASH_FLOWID(qes[i].flow_id);
78                 struct sw_fid_t *fid = &qid->fids[flow_id];
79                 int cq = fid->cq;
80
81                 if (cq < 0) {
82                         uint32_t cq_idx = qid->cq_next_tx++;
83                         if (qid->cq_next_tx == qid->cq_num_mapped_cqs)
84                                 qid->cq_next_tx = 0;
85                         cq = qid->cq_map[cq_idx];
86
87                         /* find least used */
88                         int cq_free_cnt = sw->cq_ring_space[cq];
89                         for (cq_idx = 0; cq_idx < qid->cq_num_mapped_cqs;
90                                         cq_idx++) {
91                                 int test_cq = qid->cq_map[cq_idx];
92                                 int test_cq_free = sw->cq_ring_space[test_cq];
93                                 if (test_cq_free > cq_free_cnt) {
94                                         cq = test_cq;
95                                         cq_free_cnt = test_cq_free;
96                                 }
97                         }
98
99                         fid->cq = cq; /* this pins early */
100                 }
101
102                 if (sw->cq_ring_space[cq] == 0 ||
103                                 sw->ports[cq].inflights == SW_PORT_HIST_LIST) {
104                         blocked_qes[nb_blocked++] = *qe;
105                         continue;
106                 }
107
108                 struct sw_port *p = &sw->ports[cq];
109
110                 /* at this point we can queue up the packet on the cq_buf */
111                 fid->pcount++;
112                 p->cq_buf[p->cq_buf_count++] = *qe;
113                 p->inflights++;
114                 sw->cq_ring_space[cq]--;
115
116                 int head = (p->hist_head++ & (SW_PORT_HIST_LIST-1));
117                 p->hist_list[head].fid = flow_id;
118                 p->hist_list[head].qid = qid_id;
119
120                 p->stats.tx_pkts++;
121                 qid->stats.tx_pkts++;
122                 qid->to_port[cq]++;
123
124                 /* if we just filled in the last slot, flush the buffer */
125                 if (sw->cq_ring_space[cq] == 0) {
126                         struct rte_event_ring *worker = p->cq_worker_ring;
127                         rte_event_ring_enqueue_burst(worker, p->cq_buf,
128                                         p->cq_buf_count,
129                                         &sw->cq_ring_space[cq]);
130                         p->cq_buf_count = 0;
131                 }
132         }
133         iq_ring_put_back(qid->iq[iq_num], blocked_qes, nb_blocked);
134
135         return count - nb_blocked;
136 }
137
138 static inline uint32_t
139 sw_schedule_parallel_to_cq(struct sw_evdev *sw, struct sw_qid * const qid,
140                 uint32_t iq_num, unsigned int count, int keep_order)
141 {
142         uint32_t i;
143         uint32_t cq_idx = qid->cq_next_tx;
144
145         /* This is the QID ID. The QID ID is static, hence it can be
146          * used to identify the stage of processing in history lists etc
147          */
148         uint32_t qid_id = qid->id;
149
150         if (count > MAX_PER_IQ_DEQUEUE)
151                 count = MAX_PER_IQ_DEQUEUE;
152
153         if (keep_order)
154                 /* only schedule as many as we have reorder buffer entries */
155                 count = RTE_MIN(count,
156                                 rte_ring_count(qid->reorder_buffer_freelist));
157
158         for (i = 0; i < count; i++) {
159                 const struct rte_event *qe = iq_ring_peek(qid->iq[iq_num]);
160                 uint32_t cq_check_count = 0;
161                 uint32_t cq;
162
163                 /*
164                  *  for parallel, just send to next available CQ in round-robin
165                  * fashion. So scan for an available CQ. If all CQs are full
166                  * just return and move on to next QID
167                  */
168                 do {
169                         if (++cq_check_count > qid->cq_num_mapped_cqs)
170                                 goto exit;
171                         cq = qid->cq_map[cq_idx];
172                         if (++cq_idx == qid->cq_num_mapped_cqs)
173                                 cq_idx = 0;
174                 } while (rte_event_ring_free_count(
175                                 sw->ports[cq].cq_worker_ring) == 0 ||
176                                 sw->ports[cq].inflights == SW_PORT_HIST_LIST);
177
178                 struct sw_port *p = &sw->ports[cq];
179                 if (sw->cq_ring_space[cq] == 0 ||
180                                 p->inflights == SW_PORT_HIST_LIST)
181                         break;
182
183                 sw->cq_ring_space[cq]--;
184
185                 qid->stats.tx_pkts++;
186
187                 const int head = (p->hist_head & (SW_PORT_HIST_LIST-1));
188                 p->hist_list[head].fid = SW_HASH_FLOWID(qe->flow_id);
189                 p->hist_list[head].qid = qid_id;
190
191                 if (keep_order)
192                         rte_ring_sc_dequeue(qid->reorder_buffer_freelist,
193                                         (void *)&p->hist_list[head].rob_entry);
194
195                 sw->ports[cq].cq_buf[sw->ports[cq].cq_buf_count++] = *qe;
196                 iq_ring_pop(qid->iq[iq_num]);
197
198                 rte_compiler_barrier();
199                 p->inflights++;
200                 p->stats.tx_pkts++;
201                 p->hist_head++;
202         }
203 exit:
204         qid->cq_next_tx = cq_idx;
205         return i;
206 }
207
208 static uint32_t
209 sw_schedule_dir_to_cq(struct sw_evdev *sw, struct sw_qid * const qid,
210                 uint32_t iq_num, unsigned int count __rte_unused)
211 {
212         uint32_t cq_id = qid->cq_map[0];
213         struct sw_port *port = &sw->ports[cq_id];
214
215         /* get max burst enq size for cq_ring */
216         uint32_t count_free = sw->cq_ring_space[cq_id];
217         if (count_free == 0)
218                 return 0;
219
220         /* burst dequeue from the QID IQ ring */
221         struct iq_ring *ring = qid->iq[iq_num];
222         uint32_t ret = iq_ring_dequeue_burst(ring,
223                         &port->cq_buf[port->cq_buf_count], count_free);
224         port->cq_buf_count += ret;
225
226         /* Update QID, Port and Total TX stats */
227         qid->stats.tx_pkts += ret;
228         port->stats.tx_pkts += ret;
229
230         /* Subtract credits from cached value */
231         sw->cq_ring_space[cq_id] -= ret;
232
233         return ret;
234 }
235
236 static uint32_t
237 sw_schedule_qid_to_cq(struct sw_evdev *sw)
238 {
239         uint32_t pkts = 0;
240         uint32_t qid_idx;
241
242         sw->sched_cq_qid_called++;
243
244         for (qid_idx = 0; qid_idx < sw->qid_count; qid_idx++) {
245                 struct sw_qid *qid = sw->qids_prioritized[qid_idx];
246
247                 int type = qid->type;
248                 int iq_num = PKT_MASK_TO_IQ(qid->iq_pkt_mask);
249
250                 /* zero mapped CQs indicates directed */
251                 if (iq_num >= SW_IQS_MAX)
252                         continue;
253
254                 uint32_t pkts_done = 0;
255                 uint32_t count = iq_ring_count(qid->iq[iq_num]);
256
257                 if (count > 0) {
258                         if (type == SW_SCHED_TYPE_DIRECT)
259                                 pkts_done += sw_schedule_dir_to_cq(sw, qid,
260                                                 iq_num, count);
261                         else if (type == RTE_SCHED_TYPE_ATOMIC)
262                                 pkts_done += sw_schedule_atomic_to_cq(sw, qid,
263                                                 iq_num, count);
264                         else
265                                 pkts_done += sw_schedule_parallel_to_cq(sw, qid,
266                                                 iq_num, count,
267                                                 type == RTE_SCHED_TYPE_ORDERED);
268                 }
269
270                 /* Check if the IQ that was polled is now empty, and unset it
271                  * in the IQ mask if its empty.
272                  */
273                 int all_done = (pkts_done == count);
274
275                 qid->iq_pkt_mask &= ~(all_done << (iq_num));
276                 pkts += pkts_done;
277         }
278
279         return pkts;
280 }
281
282 /* This function will perform re-ordering of packets, and injecting into
283  * the appropriate QID IQ. As LB and DIR QIDs are in the same array, but *NOT*
284  * contiguous in that array, this function accepts a "range" of QIDs to scan.
285  */
286 static uint16_t
287 sw_schedule_reorder(struct sw_evdev *sw, int qid_start, int qid_end)
288 {
289         /* Perform egress reordering */
290         struct rte_event *qe;
291         uint32_t pkts_iter = 0;
292
293         for (; qid_start < qid_end; qid_start++) {
294                 struct sw_qid *qid = &sw->qids[qid_start];
295                 int i, num_entries_in_use;
296
297                 if (qid->type != RTE_SCHED_TYPE_ORDERED)
298                         continue;
299
300                 num_entries_in_use = rte_ring_free_count(
301                                         qid->reorder_buffer_freelist);
302
303                 for (i = 0; i < num_entries_in_use; i++) {
304                         struct reorder_buffer_entry *entry;
305                         int j;
306
307                         entry = &qid->reorder_buffer[qid->reorder_buffer_index];
308
309                         if (!entry->ready)
310                                 break;
311
312                         for (j = 0; j < entry->num_fragments; j++) {
313                                 uint16_t dest_qid;
314                                 uint16_t dest_iq;
315
316                                 int idx = entry->fragment_index + j;
317                                 qe = &entry->fragments[idx];
318
319                                 dest_qid = qe->queue_id;
320                                 dest_iq  = PRIO_TO_IQ(qe->priority);
321
322                                 if (dest_qid >= sw->qid_count) {
323                                         sw->stats.rx_dropped++;
324                                         continue;
325                                 }
326
327                                 struct sw_qid *dest_qid_ptr =
328                                         &sw->qids[dest_qid];
329                                 const struct iq_ring *dest_iq_ptr =
330                                         dest_qid_ptr->iq[dest_iq];
331                                 if (iq_ring_free_count(dest_iq_ptr) == 0)
332                                         break;
333
334                                 pkts_iter++;
335
336                                 struct sw_qid *q = &sw->qids[dest_qid];
337                                 struct iq_ring *r = q->iq[dest_iq];
338
339                                 /* we checked for space above, so enqueue must
340                                  * succeed
341                                  */
342                                 iq_ring_enqueue(r, qe);
343                                 q->iq_pkt_mask |= (1 << (dest_iq));
344                                 q->iq_pkt_count[dest_iq]++;
345                                 q->stats.rx_pkts++;
346                         }
347
348                         entry->ready = (j != entry->num_fragments);
349                         entry->num_fragments -= j;
350                         entry->fragment_index += j;
351
352                         if (!entry->ready) {
353                                 entry->fragment_index = 0;
354
355                                 rte_ring_sp_enqueue(
356                                                 qid->reorder_buffer_freelist,
357                                                 entry);
358
359                                 qid->reorder_buffer_index++;
360                                 qid->reorder_buffer_index %= qid->window_size;
361                         }
362                 }
363         }
364         return pkts_iter;
365 }
366
367 static __rte_always_inline void
368 sw_refill_pp_buf(struct sw_evdev *sw, struct sw_port *port)
369 {
370         RTE_SET_USED(sw);
371         struct rte_event_ring *worker = port->rx_worker_ring;
372         port->pp_buf_start = 0;
373         port->pp_buf_count = rte_event_ring_dequeue_burst(worker, port->pp_buf,
374                         RTE_DIM(port->pp_buf), NULL);
375 }
376
377 static __rte_always_inline uint32_t
378 __pull_port_lb(struct sw_evdev *sw, uint32_t port_id, int allow_reorder)
379 {
380         static struct reorder_buffer_entry dummy_rob;
381         uint32_t pkts_iter = 0;
382         struct sw_port *port = &sw->ports[port_id];
383
384         /* If shadow ring has 0 pkts, pull from worker ring */
385         if (port->pp_buf_count == 0)
386                 sw_refill_pp_buf(sw, port);
387
388         while (port->pp_buf_count) {
389                 const struct rte_event *qe = &port->pp_buf[port->pp_buf_start];
390                 struct sw_hist_list_entry *hist_entry = NULL;
391                 uint8_t flags = qe->op;
392                 const uint16_t eop = !(flags & QE_FLAG_NOT_EOP);
393                 int needs_reorder = 0;
394                 /* if no-reordering, having PARTIAL == NEW */
395                 if (!allow_reorder && !eop)
396                         flags = QE_FLAG_VALID;
397
398                 /*
399                  * if we don't have space for this packet in an IQ,
400                  * then move on to next queue. Technically, for a
401                  * packet that needs reordering, we don't need to check
402                  * here, but it simplifies things not to special-case
403                  */
404                 uint32_t iq_num = PRIO_TO_IQ(qe->priority);
405                 struct sw_qid *qid = &sw->qids[qe->queue_id];
406
407                 if ((flags & QE_FLAG_VALID) &&
408                                 iq_ring_free_count(qid->iq[iq_num]) == 0)
409                         break;
410
411                 /* now process based on flags. Note that for directed
412                  * queues, the enqueue_flush masks off all but the
413                  * valid flag. This makes FWD and PARTIAL enqueues just
414                  * NEW type, and makes DROPS no-op calls.
415                  */
416                 if ((flags & QE_FLAG_COMPLETE) && port->inflights > 0) {
417                         const uint32_t hist_tail = port->hist_tail &
418                                         (SW_PORT_HIST_LIST - 1);
419
420                         hist_entry = &port->hist_list[hist_tail];
421                         const uint32_t hist_qid = hist_entry->qid;
422                         const uint32_t hist_fid = hist_entry->fid;
423
424                         struct sw_fid_t *fid =
425                                 &sw->qids[hist_qid].fids[hist_fid];
426                         fid->pcount -= eop;
427                         if (fid->pcount == 0)
428                                 fid->cq = -1;
429
430                         if (allow_reorder) {
431                                 /* set reorder ready if an ordered QID */
432                                 uintptr_t rob_ptr =
433                                         (uintptr_t)hist_entry->rob_entry;
434                                 const uintptr_t valid = (rob_ptr != 0);
435                                 needs_reorder = valid;
436                                 rob_ptr |=
437                                         ((valid - 1) & (uintptr_t)&dummy_rob);
438                                 struct reorder_buffer_entry *tmp_rob_ptr =
439                                         (struct reorder_buffer_entry *)rob_ptr;
440                                 tmp_rob_ptr->ready = eop * needs_reorder;
441                         }
442
443                         port->inflights -= eop;
444                         port->hist_tail += eop;
445                 }
446                 if (flags & QE_FLAG_VALID) {
447                         port->stats.rx_pkts++;
448
449                         if (allow_reorder && needs_reorder) {
450                                 struct reorder_buffer_entry *rob_entry =
451                                                 hist_entry->rob_entry;
452
453                                 hist_entry->rob_entry = NULL;
454                                 /* Although fragmentation not currently
455                                  * supported by eventdev API, we support it
456                                  * here. Open: How do we alert the user that
457                                  * they've exceeded max frags?
458                                  */
459                                 int num_frag = rob_entry->num_fragments;
460                                 if (num_frag == SW_FRAGMENTS_MAX)
461                                         sw->stats.rx_dropped++;
462                                 else {
463                                         int idx = rob_entry->num_fragments++;
464                                         rob_entry->fragments[idx] = *qe;
465                                 }
466                                 goto end_qe;
467                         }
468
469                         /* Use the iq_num from above to push the QE
470                          * into the qid at the right priority
471                          */
472
473                         qid->iq_pkt_mask |= (1 << (iq_num));
474                         iq_ring_enqueue(qid->iq[iq_num], qe);
475                         qid->iq_pkt_count[iq_num]++;
476                         qid->stats.rx_pkts++;
477                         pkts_iter++;
478                 }
479
480 end_qe:
481                 port->pp_buf_start++;
482                 port->pp_buf_count--;
483         } /* while (avail_qes) */
484
485         return pkts_iter;
486 }
487
488 static uint32_t
489 sw_schedule_pull_port_lb(struct sw_evdev *sw, uint32_t port_id)
490 {
491         return __pull_port_lb(sw, port_id, 1);
492 }
493
494 static uint32_t
495 sw_schedule_pull_port_no_reorder(struct sw_evdev *sw, uint32_t port_id)
496 {
497         return __pull_port_lb(sw, port_id, 0);
498 }
499
500 static uint32_t
501 sw_schedule_pull_port_dir(struct sw_evdev *sw, uint32_t port_id)
502 {
503         uint32_t pkts_iter = 0;
504         struct sw_port *port = &sw->ports[port_id];
505
506         /* If shadow ring has 0 pkts, pull from worker ring */
507         if (port->pp_buf_count == 0)
508                 sw_refill_pp_buf(sw, port);
509
510         while (port->pp_buf_count) {
511                 const struct rte_event *qe = &port->pp_buf[port->pp_buf_start];
512                 uint8_t flags = qe->op;
513
514                 if ((flags & QE_FLAG_VALID) == 0)
515                         goto end_qe;
516
517                 uint32_t iq_num = PRIO_TO_IQ(qe->priority);
518                 struct sw_qid *qid = &sw->qids[qe->queue_id];
519                 struct iq_ring *iq_ring = qid->iq[iq_num];
520
521                 if (iq_ring_free_count(iq_ring) == 0)
522                         break; /* move to next port */
523
524                 port->stats.rx_pkts++;
525
526                 /* Use the iq_num from above to push the QE
527                  * into the qid at the right priority
528                  */
529                 qid->iq_pkt_mask |= (1 << (iq_num));
530                 iq_ring_enqueue(iq_ring, qe);
531                 qid->iq_pkt_count[iq_num]++;
532                 qid->stats.rx_pkts++;
533                 pkts_iter++;
534
535 end_qe:
536                 port->pp_buf_start++;
537                 port->pp_buf_count--;
538         } /* while port->pp_buf_count */
539
540         return pkts_iter;
541 }
542
543 void
544 sw_event_schedule(struct rte_eventdev *dev)
545 {
546         struct sw_evdev *sw = sw_pmd_priv(dev);
547         uint32_t in_pkts, out_pkts;
548         uint32_t out_pkts_total = 0, in_pkts_total = 0;
549         int32_t sched_quanta = sw->sched_quanta;
550         uint32_t i;
551
552         sw->sched_called++;
553         if (!sw->started)
554                 return;
555
556         do {
557                 uint32_t in_pkts_this_iteration = 0;
558
559                 /* Pull from rx_ring for ports */
560                 do {
561                         in_pkts = 0;
562                         for (i = 0; i < sw->port_count; i++)
563                                 if (sw->ports[i].is_directed)
564                                         in_pkts += sw_schedule_pull_port_dir(sw, i);
565                                 else if (sw->ports[i].num_ordered_qids > 0)
566                                         in_pkts += sw_schedule_pull_port_lb(sw, i);
567                                 else
568                                         in_pkts += sw_schedule_pull_port_no_reorder(sw, i);
569
570                         /* QID scan for re-ordered */
571                         in_pkts += sw_schedule_reorder(sw, 0,
572                                         sw->qid_count);
573                         in_pkts_this_iteration += in_pkts;
574                 } while (in_pkts > 4 &&
575                                 (int)in_pkts_this_iteration < sched_quanta);
576
577                 out_pkts = 0;
578                 out_pkts += sw_schedule_qid_to_cq(sw);
579                 out_pkts_total += out_pkts;
580                 in_pkts_total += in_pkts_this_iteration;
581
582                 if (in_pkts == 0 && out_pkts == 0)
583                         break;
584         } while ((int)out_pkts_total < sched_quanta);
585
586         /* push all the internal buffered QEs in port->cq_ring to the
587          * worker cores: aka, do the ring transfers batched.
588          */
589         for (i = 0; i < sw->port_count; i++) {
590                 struct rte_event_ring *worker = sw->ports[i].cq_worker_ring;
591                 rte_event_ring_enqueue_burst(worker, sw->ports[i].cq_buf,
592                                 sw->ports[i].cq_buf_count,
593                                 &sw->cq_ring_space[i]);
594                 sw->ports[i].cq_buf_count = 0;
595         }
596
597         sw->stats.tx_pkts += out_pkts_total;
598         sw->stats.rx_pkts += in_pkts_total;
599
600         sw->sched_no_iq_enqueues += (in_pkts_total == 0);
601         sw->sched_no_cq_enqueues += (out_pkts_total == 0);
602
603 }