drivers/net/bnxt/bnxt.h

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2014-2018 Broadcom
   3  * All rights reserved.
   4  */
   5
   6 #ifndef _BNXT_H_
   7 #define _BNXT_H_
   8
   9 #include <inttypes.h>
  10 #include <stdbool.h>
  11 #include <sys/queue.h>
  12
  13 #include <rte_pci.h>
  14 #include <rte_bus_pci.h>
  15 #include <rte_ethdev_driver.h>
  16 #include <rte_memory.h>
  17 #include <rte_lcore.h>
  18 #include <rte_spinlock.h>
  19 #include <rte_time.h>
  20
  21 #include "bnxt_cpr.h"
  22
  23 #define BNXT_MAX_MTU            9500
  24 #define VLAN_TAG_SIZE           4
  25 #define BNXT_VF_RSV_NUM_RSS_CTX 1
  26 #define BNXT_VF_RSV_NUM_L2_CTX  4
  27 /* TODO: For now, do not support VMDq/RFS on VFs. */
  28 #define BNXT_VF_RSV_NUM_VNIC    1
  29 #define BNXT_MAX_LED            4
  30 #define BNXT_NUM_VLANS          2
  31 #define BNXT_MIN_RING_DESC      16
  32 #define BNXT_MAX_TX_RING_DESC   4096
  33 #define BNXT_MAX_RX_RING_DESC   8192
  34 #define BNXT_DB_SIZE            0x80
  35
  36 #define BNXT_INT_LAT_TMR_MIN                    75
  37 #define BNXT_INT_LAT_TMR_MAX                    150
  38 #define BNXT_NUM_CMPL_AGGR_INT                  36
  39 #define BNXT_CMPL_AGGR_DMA_TMR                  37
  40 #define BNXT_NUM_CMPL_DMA_AGGR                  36
  41 #define BNXT_CMPL_AGGR_DMA_TMR_DURING_INT       50
  42 #define BNXT_NUM_CMPL_DMA_AGGR_DURING_INT       12
  43
  44 struct bnxt_led_info {
  45         uint8_t      led_id;
  46         uint8_t      led_type;
  47         uint8_t      led_group_id;
  48         uint8_t      unused;
  49         uint16_t  led_state_caps;
  50 #define BNXT_LED_ALT_BLINK_CAP(x)       ((x) &  \
  51         rte_cpu_to_le_16(HWRM_PORT_LED_QCFG_OUTPUT_LED0_STATE_BLINKALT))
  52
  53         uint16_t  led_color_caps;
  54 };
  55
  56 struct bnxt_led_cfg {
  57         uint8_t led_id;
  58         uint8_t led_state;
  59         uint8_t led_color;
  60         uint8_t unused;
  61         uint16_t led_blink_on;
  62         uint16_t led_blink_off;
  63         uint8_t led_group_id;
  64         uint8_t rsvd;
  65 };
  66
  67 #define BNXT_LED_DFLT_ENA                               \
  68         (HWRM_PORT_LED_CFG_INPUT_ENABLES_LED0_ID |             \
  69          HWRM_PORT_LED_CFG_INPUT_ENABLES_LED0_STATE |          \
  70          HWRM_PORT_LED_CFG_INPUT_ENABLES_LED0_BLINK_ON |       \
  71          HWRM_PORT_LED_CFG_INPUT_ENABLES_LED0_BLINK_OFF |      \
  72          HWRM_PORT_LED_CFG_INPUT_ENABLES_LED0_GROUP_ID)
  73
  74 #define BNXT_LED_DFLT_ENA_SHIFT         6
  75
  76 #define BNXT_LED_DFLT_ENABLES(x)                        \
  77         rte_cpu_to_le_32(BNXT_LED_DFLT_ENA << (BNXT_LED_DFLT_ENA_SHIFT * (x)))
  78
  79 enum bnxt_hw_context {
  80         HW_CONTEXT_NONE     = 0,
  81         HW_CONTEXT_IS_RSS   = 1,
  82         HW_CONTEXT_IS_COS   = 2,
  83         HW_CONTEXT_IS_LB    = 3,
  84 };
  85
  86 struct bnxt_vlan_table_entry {
  87         uint16_t                tpid;
  88         uint16_t                vid;
  89 } __attribute__((packed));
  90
  91 struct bnxt_vlan_antispoof_table_entry {
  92         uint16_t                tpid;
  93         uint16_t                vid;
  94         uint16_t                mask;
  95 } __attribute__((packed));
  96
  97 struct bnxt_child_vf_info {
  98         void                    *req_buf;
  99         struct bnxt_vlan_table_entry    *vlan_table;
 100         struct bnxt_vlan_antispoof_table_entry  *vlan_as_table;
 101         STAILQ_HEAD(, bnxt_filter_info) filter;
 102         uint32_t                func_cfg_flags;
 103         uint32_t                l2_rx_mask;
 104         uint16_t                fid;
 105         uint16_t                max_tx_rate;
 106         uint16_t                dflt_vlan;
 107         uint16_t                vlan_count;
 108         uint8_t                 mac_spoof_en;
 109         uint8_t                 vlan_spoof_en;
 110         bool                    random_mac;
 111         bool                    persist_stats;
 112 };
 113
 114 struct bnxt_pf_info {
 115 #define BNXT_FIRST_PF_FID       1
 116 #define BNXT_MAX_VFS(bp)        (bp->pf.max_vfs)
 117 #define BNXT_TOTAL_VFS(bp)      ((bp)->pf.total_vfs)
 118 #define BNXT_FIRST_VF_FID       128
 119 #define BNXT_PF_RINGS_USED(bp)  bnxt_get_num_queues(bp)
 120 #define BNXT_PF_RINGS_AVAIL(bp) (bp->pf.max_cp_rings - BNXT_PF_RINGS_USED(bp))
 121         uint16_t                port_id;
 122         uint16_t                first_vf_id;
 123         uint16_t                active_vfs;
 124         uint16_t                max_vfs;
 125         uint16_t                total_vfs; /* Total VFs possible.
 126                                             * Not necessarily enabled.
 127                                             */
 128         uint32_t                func_cfg_flags;
 129         void                    *vf_req_buf;
 130         rte_iova_t              vf_req_buf_dma_addr;
 131         uint32_t                vf_req_fwd[8];
 132         uint16_t                total_vnics;
 133         struct bnxt_child_vf_info       *vf_info;
 134 #define BNXT_EVB_MODE_NONE      0
 135 #define BNXT_EVB_MODE_VEB       1
 136 #define BNXT_EVB_MODE_VEPA      2
 137         uint8_t                 evb_mode;
 138 };
 139
 140 /* Max wait time is 10 * 100ms = 1s */
 141 #define BNXT_LINK_WAIT_CNT      10
 142 #define BNXT_LINK_WAIT_INTERVAL 100
 143 struct bnxt_link_info {
 144         uint32_t                phy_flags;
 145         uint8_t                 mac_type;
 146         uint8_t                 phy_link_status;
 147         uint8_t                 loop_back;
 148         uint8_t                 link_up;
 149         uint8_t                 duplex;
 150         uint8_t                 pause;
 151         uint8_t                 force_pause;
 152         uint8_t                 auto_pause;
 153         uint8_t                 auto_mode;
 154 #define PHY_VER_LEN             3
 155         uint8_t                 phy_ver[PHY_VER_LEN];
 156         uint16_t                link_speed;
 157         uint16_t                support_speeds;
 158         uint16_t                auto_link_speed;
 159         uint16_t                force_link_speed;
 160         uint16_t                auto_link_speed_mask;
 161         uint32_t                preemphasis;
 162         uint8_t                 phy_type;
 163         uint8_t                 media_type;
 164 };
 165
 166 #define BNXT_COS_QUEUE_COUNT    8
 167 struct bnxt_cos_queue_info {
 168         uint8_t id;
 169         uint8_t profile;
 170 };
 171
 172 struct rte_flow {
 173         STAILQ_ENTRY(rte_flow) next;
 174         struct bnxt_filter_info *filter;
 175         struct bnxt_vnic_info   *vnic;
 176 };
 177
 178 struct bnxt_ptp_cfg {
 179 #define BNXT_GRCPF_REG_WINDOW_BASE_OUT  0x400
 180 #define BNXT_GRCPF_REG_SYNC_TIME        0x480
 181 #define BNXT_CYCLECOUNTER_MASK   0xffffffffffffffffULL
 182         struct rte_timecounter      tc;
 183         struct rte_timecounter      tx_tstamp_tc;
 184         struct rte_timecounter      rx_tstamp_tc;
 185         struct bnxt             *bp;
 186 #define BNXT_MAX_TX_TS  1
 187         uint16_t                        rxctl;
 188 #define BNXT_PTP_MSG_SYNC                       (1 << 0)
 189 #define BNXT_PTP_MSG_DELAY_REQ                  (1 << 1)
 190 #define BNXT_PTP_MSG_PDELAY_REQ                 (1 << 2)
 191 #define BNXT_PTP_MSG_PDELAY_RESP                (1 << 3)
 192 #define BNXT_PTP_MSG_FOLLOW_UP                  (1 << 8)
 193 #define BNXT_PTP_MSG_DELAY_RESP                 (1 << 9)
 194 #define BNXT_PTP_MSG_PDELAY_RESP_FOLLOW_UP      (1 << 10)
 195 #define BNXT_PTP_MSG_ANNOUNCE                   (1 << 11)
 196 #define BNXT_PTP_MSG_SIGNALING                  (1 << 12)
 197 #define BNXT_PTP_MSG_MANAGEMENT                 (1 << 13)
 198 #define BNXT_PTP_MSG_EVENTS             (BNXT_PTP_MSG_SYNC |            \
 199                                          BNXT_PTP_MSG_DELAY_REQ |       \
 200                                          BNXT_PTP_MSG_PDELAY_REQ |      \
 201                                          BNXT_PTP_MSG_PDELAY_RESP)
 202         uint8_t                 tx_tstamp_en:1;
 203         int                     rx_filter;
 204
 205 #define BNXT_PTP_RX_TS_L        0
 206 #define BNXT_PTP_RX_TS_H        1
 207 #define BNXT_PTP_RX_SEQ         2
 208 #define BNXT_PTP_RX_FIFO        3
 209 #define BNXT_PTP_RX_FIFO_PENDING 0x1
 210 #define BNXT_PTP_RX_FIFO_ADV    4
 211 #define BNXT_PTP_RX_REGS        5
 212
 213 #define BNXT_PTP_TX_TS_L        0
 214 #define BNXT_PTP_TX_TS_H        1
 215 #define BNXT_PTP_TX_SEQ         2
 216 #define BNXT_PTP_TX_FIFO        3
 217 #define BNXT_PTP_TX_FIFO_EMPTY   0x2
 218 #define BNXT_PTP_TX_REGS        4
 219         uint32_t                        rx_regs[BNXT_PTP_RX_REGS];
 220         uint32_t                        rx_mapped_regs[BNXT_PTP_RX_REGS];
 221         uint32_t                        tx_regs[BNXT_PTP_TX_REGS];
 222         uint32_t                        tx_mapped_regs[BNXT_PTP_TX_REGS];
 223 };
 224
 225 struct bnxt_coal {
 226         uint16_t                        num_cmpl_aggr_int;
 227         uint16_t                        num_cmpl_dma_aggr;
 228         uint16_t                        num_cmpl_dma_aggr_during_int;
 229         uint16_t                        int_lat_tmr_max;
 230         uint16_t                        int_lat_tmr_min;
 231         uint16_t                        cmpl_aggr_dma_tmr;
 232         uint16_t                        cmpl_aggr_dma_tmr_during_int;
 233 };
 234
 235 #define BNXT_HWRM_SHORT_REQ_LEN         sizeof(struct hwrm_short_input)
 236 struct bnxt {
 237         void                            *bar0;
 238
 239         struct rte_eth_dev              *eth_dev;
 240         struct rte_eth_rss_conf         rss_conf;
 241         struct rte_pci_device           *pdev;
 242         void                            *doorbell_base;
 243
 244         uint32_t                flags;
 245 #define BNXT_FLAG_REGISTERED    (1 << 0)
 246 #define BNXT_FLAG_VF            (1 << 1)
 247 #define BNXT_FLAG_PORT_STATS    (1 << 2)
 248 #define BNXT_FLAG_JUMBO         (1 << 3)
 249 #define BNXT_FLAG_SHORT_CMD     (1 << 4)
 250 #define BNXT_FLAG_UPDATE_HASH   (1 << 5)
 251 #define BNXT_FLAG_PTP_SUPPORTED (1 << 6)
 252 #define BNXT_FLAG_MULTI_HOST    (1 << 7)
 253 #define BNXT_FLAG_NEW_RM        (1 << 30)
 254 #define BNXT_FLAG_INIT_DONE     (1 << 31)
 255 #define BNXT_PF(bp)             (!((bp)->flags & BNXT_FLAG_VF))
 256 #define BNXT_VF(bp)             ((bp)->flags & BNXT_FLAG_VF)
 257 #define BNXT_NPAR(bp)           ((bp)->port_partition_type)
 258 #define BNXT_MH(bp)             ((bp)->flags & BNXT_FLAG_MULTI_HOST)
 259 #define BNXT_SINGLE_PF(bp)      (BNXT_PF(bp) && !BNXT_NPAR(bp) && !BNXT_MH(bp))
 260
 261         unsigned int            rx_nr_rings;
 262         unsigned int            rx_cp_nr_rings;
 263         struct bnxt_rx_queue **rx_queues;
 264         const void              *rx_mem_zone;
 265         struct rx_port_stats    *hw_rx_port_stats;
 266         rte_iova_t              hw_rx_port_stats_map;
 267
 268         unsigned int            tx_nr_rings;
 269         unsigned int            tx_cp_nr_rings;
 270         struct bnxt_tx_queue **tx_queues;
 271         const void              *tx_mem_zone;
 272         struct tx_port_stats    *hw_tx_port_stats;
 273         rte_iova_t              hw_tx_port_stats_map;
 274
 275         /* Default completion ring */
 276         struct bnxt_cp_ring_info        *def_cp_ring;
 277         uint32_t                max_ring_grps;
 278         struct bnxt_ring_grp_info       *grp_info;
 279
 280         unsigned int            nr_vnics;
 281
 282         struct bnxt_vnic_info   *vnic_info;
 283         STAILQ_HEAD(, bnxt_vnic_info)   free_vnic_list;
 284
 285         struct bnxt_filter_info *filter_info;
 286         STAILQ_HEAD(, bnxt_filter_info) free_filter_list;
 287
 288         /* VNIC pointer for flow filter (VMDq) pools */
 289 #define MAX_FF_POOLS    256
 290         STAILQ_HEAD(, bnxt_vnic_info)   ff_pool[MAX_FF_POOLS];
 291
 292         struct bnxt_irq         *irq_tbl;
 293
 294 #define MAX_NUM_MAC_ADDR        32
 295         uint8_t                 mac_addr[ETHER_ADDR_LEN];
 296
 297         uint16_t                        hwrm_cmd_seq;
 298         void                            *hwrm_cmd_resp_addr;
 299         rte_iova_t                      hwrm_cmd_resp_dma_addr;
 300         void                            *hwrm_short_cmd_req_addr;
 301         rte_iova_t                      hwrm_short_cmd_req_dma_addr;
 302         rte_spinlock_t                  hwrm_lock;
 303         uint16_t                        max_req_len;
 304         uint16_t                        max_resp_len;
 305
 306         struct bnxt_link_info   link_info;
 307         struct bnxt_cos_queue_info      cos_queue[BNXT_COS_QUEUE_COUNT];
 308         uint8_t                 tx_cosq_id;
 309
 310         uint16_t                fw_fid;
 311         uint8_t                 dflt_mac_addr[ETHER_ADDR_LEN];
 312         uint16_t                max_rsscos_ctx;
 313         uint16_t                max_cp_rings;
 314         uint16_t                max_tx_rings;
 315         uint16_t                max_rx_rings;
 316         uint16_t                max_l2_ctx;
 317         uint16_t                max_vnics;
 318         uint16_t                max_stat_ctx;
 319         uint16_t                vlan;
 320         struct bnxt_pf_info             pf;
 321         uint8_t                 port_partition_type;
 322         uint8_t                 dev_stopped;
 323         uint8_t                 vxlan_port_cnt;
 324         uint8_t                 geneve_port_cnt;
 325         uint16_t                vxlan_port;
 326         uint16_t                geneve_port;
 327         uint16_t                vxlan_fw_dst_port_id;
 328         uint16_t                geneve_fw_dst_port_id;
 329         uint32_t                fw_ver;
 330         uint32_t                hwrm_spec_code;
 331
 332         struct bnxt_led_info    leds[BNXT_MAX_LED];
 333         uint8_t                 num_leds;
 334         struct bnxt_ptp_cfg     *ptp_cfg;
 335         uint16_t                vf_resv_strategy;
 336 };
 337
 338 int bnxt_link_update_op(struct rte_eth_dev *eth_dev, int wait_to_complete);
 339 int bnxt_rcv_msg_from_vf(struct bnxt *bp, uint16_t vf_id, void *msg);
 340
 341 bool is_bnxt_supported(struct rte_eth_dev *dev);
 342 bool bnxt_stratus_device(struct bnxt *bp);
 343 extern const struct rte_flow_ops bnxt_flow_ops;
 344
 345 extern int bnxt_logtype_driver;
 346 #define PMD_DRV_LOG_RAW(level, fmt, args...) \
 347         rte_log(RTE_LOG_ ## level, bnxt_logtype_driver, "%s(): " fmt, \
 348                 __func__, ## args)
 349
 350 #define PMD_DRV_LOG(level, fmt, args...) \
 351         PMD_DRV_LOG_RAW(level, fmt, ## args)
 352 #endif