drivers/net/bnxt/bnxt_ethdev.c

   1 /*-
   2  *   BSD LICENSE
   3  *
   4  *   Copyright(c) Broadcom Limited.
   5  *   All rights reserved.
   6  *
   7  *   Redistribution and use in source and binary forms, with or without
   8  *   modification, are permitted provided that the following conditions
   9  *   are met:
  10  *
  11  *     * Redistributions of source code must retain the above copyright
  12  *       notice, this list of conditions and the following disclaimer.
  13  *     * Redistributions in binary form must reproduce the above copyright
  14  *       notice, this list of conditions and the following disclaimer in
  15  *       the documentation and/or other materials provided with the
  16  *       distribution.
  17  *     * Neither the name of Broadcom Corporation nor the names of its
  18  *       contributors may be used to endorse or promote products derived
  19  *       from this software without specific prior written permission.
  20  *
  21  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  22  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  23  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  24  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  25  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  26  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  27  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  28  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  29  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32  */
  33
  34 #include <inttypes.h>
  35 #include <stdbool.h>
  36
  37 #include <rte_dev.h>
  38 #include <rte_ethdev.h>
  39 #include <rte_ethdev_pci.h>
  40 #include <rte_malloc.h>
  41 #include <rte_cycles.h>
  42
  43 #include "bnxt.h"
  44 #include "bnxt_cpr.h"
  45 #include "bnxt_filter.h"
  46 #include "bnxt_hwrm.h"
  47 #include "bnxt_irq.h"
  48 #include "bnxt_ring.h"
  49 #include "bnxt_rxq.h"
  50 #include "bnxt_rxr.h"
  51 #include "bnxt_stats.h"
  52 #include "bnxt_txq.h"
  53 #include "bnxt_txr.h"
  54 #include "bnxt_vnic.h"
  55 #include "hsi_struct_def_dpdk.h"
  56 #include "bnxt_nvm_defs.h"
  57
  58 #define DRV_MODULE_NAME         "bnxt"
  59 static const char bnxt_version[] =
  60         "Broadcom Cumulus driver " DRV_MODULE_NAME "\n";
  61
  62 #define PCI_VENDOR_ID_BROADCOM 0x14E4
  63
  64 #define BROADCOM_DEV_ID_STRATUS_NIC_VF 0x1609
  65 #define BROADCOM_DEV_ID_STRATUS_NIC 0x1614
  66 #define BROADCOM_DEV_ID_57414_VF 0x16c1
  67 #define BROADCOM_DEV_ID_57301 0x16c8
  68 #define BROADCOM_DEV_ID_57302 0x16c9
  69 #define BROADCOM_DEV_ID_57304_PF 0x16ca
  70 #define BROADCOM_DEV_ID_57304_VF 0x16cb
  71 #define BROADCOM_DEV_ID_57417_MF 0x16cc
  72 #define BROADCOM_DEV_ID_NS2 0x16cd
  73 #define BROADCOM_DEV_ID_57311 0x16ce
  74 #define BROADCOM_DEV_ID_57312 0x16cf
  75 #define BROADCOM_DEV_ID_57402 0x16d0
  76 #define BROADCOM_DEV_ID_57404 0x16d1
  77 #define BROADCOM_DEV_ID_57406_PF 0x16d2
  78 #define BROADCOM_DEV_ID_57406_VF 0x16d3
  79 #define BROADCOM_DEV_ID_57402_MF 0x16d4
  80 #define BROADCOM_DEV_ID_57407_RJ45 0x16d5
  81 #define BROADCOM_DEV_ID_57412 0x16d6
  82 #define BROADCOM_DEV_ID_57414 0x16d7
  83 #define BROADCOM_DEV_ID_57416_RJ45 0x16d8
  84 #define BROADCOM_DEV_ID_57417_RJ45 0x16d9
  85 #define BROADCOM_DEV_ID_5741X_VF 0x16dc
  86 #define BROADCOM_DEV_ID_57412_MF 0x16de
  87 #define BROADCOM_DEV_ID_57314 0x16df
  88 #define BROADCOM_DEV_ID_57317_RJ45 0x16e0
  89 #define BROADCOM_DEV_ID_5731X_VF 0x16e1
  90 #define BROADCOM_DEV_ID_57417_SFP 0x16e2
  91 #define BROADCOM_DEV_ID_57416_SFP 0x16e3
  92 #define BROADCOM_DEV_ID_57317_SFP 0x16e4
  93 #define BROADCOM_DEV_ID_57404_MF 0x16e7
  94 #define BROADCOM_DEV_ID_57406_MF 0x16e8
  95 #define BROADCOM_DEV_ID_57407_SFP 0x16e9
  96 #define BROADCOM_DEV_ID_57407_MF 0x16ea
  97 #define BROADCOM_DEV_ID_57414_MF 0x16ec
  98 #define BROADCOM_DEV_ID_57416_MF 0x16ee
  99
 100 static const struct rte_pci_id bnxt_pci_id_map[] = {
 101         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM,
 102                          BROADCOM_DEV_ID_STRATUS_NIC_VF) },
 103         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_STRATUS_NIC) },
 104         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57414_VF) },
 105         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57301) },
 106         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57302) },
 107         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57304_PF) },
 108         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57304_VF) },
 109         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_NS2) },
 110         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57402) },
 111         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57404) },
 112         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57406_PF) },
 113         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57406_VF) },
 114         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57402_MF) },
 115         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57407_RJ45) },
 116         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57404_MF) },
 117         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57406_MF) },
 118         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57407_SFP) },
 119         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57407_MF) },
 120         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_5741X_VF) },
 121         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_5731X_VF) },
 122         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57314) },
 123         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57417_MF) },
 124         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57311) },
 125         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57312) },
 126         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57412) },
 127         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57414) },
 128         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57416_RJ45) },
 129         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57417_RJ45) },
 130         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57412_MF) },
 131         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57317_RJ45) },
 132         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57417_SFP) },
 133         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57416_SFP) },
 134         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57317_SFP) },
 135         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57414_MF) },
 136         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57416_MF) },
 137         { .vendor_id = 0, /* sentinel */ },
 138 };
 139
 140 #define BNXT_ETH_RSS_SUPPORT (  \
 141         ETH_RSS_IPV4 |          \
 142         ETH_RSS_NONFRAG_IPV4_TCP |      \
 143         ETH_RSS_NONFRAG_IPV4_UDP |      \
 144         ETH_RSS_IPV6 |          \
 145         ETH_RSS_NONFRAG_IPV6_TCP |      \
 146         ETH_RSS_NONFRAG_IPV6_UDP)
 147
 148 static int bnxt_vlan_offload_set_op(struct rte_eth_dev *dev, int mask);
 149 static void bnxt_print_link_info(struct rte_eth_dev *eth_dev);
 150
 151 /***********************/
 152
 153 /*
 154  * High level utility functions
 155  */
 156
 157 static void bnxt_free_mem(struct bnxt *bp)
 158 {
 159         bnxt_free_filter_mem(bp);
 160         bnxt_free_vnic_attributes(bp);
 161         bnxt_free_vnic_mem(bp);
 162
 163         bnxt_free_stats(bp);
 164         bnxt_free_tx_rings(bp);
 165         bnxt_free_rx_rings(bp);
 166         bnxt_free_def_cp_ring(bp);
 167 }
 168
 169 static int bnxt_alloc_mem(struct bnxt *bp)
 170 {
 171         int rc;
 172
 173         /* Default completion ring */
 174         rc = bnxt_init_def_ring_struct(bp, SOCKET_ID_ANY);
 175         if (rc)
 176                 goto alloc_mem_err;
 177
 178         rc = bnxt_alloc_rings(bp, 0, NULL, NULL,
 179                               bp->def_cp_ring, "def_cp");
 180         if (rc)
 181                 goto alloc_mem_err;
 182
 183         rc = bnxt_alloc_vnic_mem(bp);
 184         if (rc)
 185                 goto alloc_mem_err;
 186
 187         rc = bnxt_alloc_vnic_attributes(bp);
 188         if (rc)
 189                 goto alloc_mem_err;
 190
 191         rc = bnxt_alloc_filter_mem(bp);
 192         if (rc)
 193                 goto alloc_mem_err;
 194
 195         return 0;
 196
 197 alloc_mem_err:
 198         bnxt_free_mem(bp);
 199         return rc;
 200 }
 201
 202 static int bnxt_init_chip(struct bnxt *bp)
 203 {
 204         unsigned int i, rss_idx, fw_idx;
 205         struct rte_eth_link new;
 206         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(bp->eth_dev);
 207         struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
 208         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
 209         uint64_t rx_offloads = dev_conf->rxmode.offloads;
 210         uint32_t intr_vector = 0;
 211         uint32_t queue_id, base = BNXT_MISC_VEC_ID;
 212         uint32_t vec = BNXT_MISC_VEC_ID;
 213         int rc;
 214
 215         /* disable uio/vfio intr/eventfd mapping */
 216         rte_intr_disable(intr_handle);
 217
 218         if (bp->eth_dev->data->mtu > ETHER_MTU) {
 219                 bp->eth_dev->data->dev_conf.rxmode.jumbo_frame = 1;
 220                 bp->flags |= BNXT_FLAG_JUMBO;
 221         } else {
 222                 bp->eth_dev->data->dev_conf.rxmode.jumbo_frame = 0;
 223                 bp->flags &= ~BNXT_FLAG_JUMBO;
 224         }
 225
 226         rc = bnxt_alloc_all_hwrm_stat_ctxs(bp);
 227         if (rc) {
 228                 RTE_LOG(ERR, PMD, "HWRM stat ctx alloc failure rc: %x\n", rc);
 229                 goto err_out;
 230         }
 231
 232         rc = bnxt_alloc_hwrm_rings(bp);
 233         if (rc) {
 234                 RTE_LOG(ERR, PMD, "HWRM ring alloc failure rc: %x\n", rc);
 235                 goto err_out;
 236         }
 237
 238         rc = bnxt_alloc_all_hwrm_ring_grps(bp);
 239         if (rc) {
 240                 RTE_LOG(ERR, PMD, "HWRM ring grp alloc failure: %x\n", rc);
 241                 goto err_out;
 242         }
 243
 244         rc = bnxt_mq_rx_configure(bp);
 245         if (rc) {
 246                 RTE_LOG(ERR, PMD, "MQ mode configure failure rc: %x\n", rc);
 247                 goto err_out;
 248         }
 249
 250         /* VNIC configuration */
 251         for (i = 0; i < bp->nr_vnics; i++) {
 252                 struct bnxt_vnic_info *vnic = &bp->vnic_info[i];
 253                 uint32_t size = sizeof(*vnic->fw_grp_ids) * bp->max_ring_grps;
 254
 255                 vnic->fw_grp_ids = rte_zmalloc("vnic_fw_grp_ids", size, 0);
 256                 if (!vnic->fw_grp_ids) {
 257                         RTE_LOG(ERR, PMD,
 258                                 "Failed to alloc %d bytes for group ids\n",
 259                                 size);
 260                         rc = -ENOMEM;
 261                         goto err_out;
 262                 }
 263                 memset(vnic->fw_grp_ids, -1, size);
 264
 265                 rc = bnxt_hwrm_vnic_alloc(bp, vnic);
 266                 if (rc) {
 267                         RTE_LOG(ERR, PMD, "HWRM vnic %d alloc failure rc: %x\n",
 268                                 i, rc);
 269                         goto err_out;
 270                 }
 271
 272                 rc = bnxt_hwrm_vnic_ctx_alloc(bp, vnic);
 273                 if (rc) {
 274                         RTE_LOG(ERR, PMD,
 275                                 "HWRM vnic %d ctx alloc failure rc: %x\n",
 276                                 i, rc);
 277                         goto err_out;
 278                 }
 279
 280                 /*
 281                  * Firmware sets pf pair in default vnic cfg. If the VLAN strip
 282                  * setting is not available at this time, it will not be
 283                  * configured correctly in the CFA.
 284                  */
 285                 if (rx_offloads & DEV_RX_OFFLOAD_VLAN_STRIP)
 286                         vnic->vlan_strip = true;
 287                 else
 288                         vnic->vlan_strip = false;
 289
 290                 rc = bnxt_hwrm_vnic_cfg(bp, vnic);
 291                 if (rc) {
 292                         RTE_LOG(ERR, PMD, "HWRM vnic %d cfg failure rc: %x\n",
 293                                 i, rc);
 294                         goto err_out;
 295                 }
 296
 297                 rc = bnxt_set_hwrm_vnic_filters(bp, vnic);
 298                 if (rc) {
 299                         RTE_LOG(ERR, PMD,
 300                                 "HWRM vnic %d filter failure rc: %x\n",
 301                                 i, rc);
 302                         goto err_out;
 303                 }
 304                 if (vnic->rss_table && vnic->hash_type) {
 305                         /*
 306                          * Fill the RSS hash & redirection table with
 307                          * ring group ids for all VNICs
 308                          */
 309                         for (rss_idx = 0, fw_idx = 0;
 310                              rss_idx < HW_HASH_INDEX_SIZE;
 311                              rss_idx++, fw_idx++) {
 312                                 if (vnic->fw_grp_ids[fw_idx] ==
 313                                     INVALID_HW_RING_ID)
 314                                         fw_idx = 0;
 315                                 vnic->rss_table[rss_idx] =
 316                                                 vnic->fw_grp_ids[fw_idx];
 317                         }
 318                         rc = bnxt_hwrm_vnic_rss_cfg(bp, vnic);
 319                         if (rc) {
 320                                 RTE_LOG(ERR, PMD,
 321                                         "HWRM vnic %d set RSS failure rc: %x\n",
 322                                         i, rc);
 323                                 goto err_out;
 324                         }
 325                 }
 326
 327                 bnxt_hwrm_vnic_plcmode_cfg(bp, vnic);
 328
 329                 if (bp->eth_dev->data->dev_conf.rxmode.enable_lro)
 330                         bnxt_hwrm_vnic_tpa_cfg(bp, vnic, 1);
 331                 else
 332                         bnxt_hwrm_vnic_tpa_cfg(bp, vnic, 0);
 333         }
 334         rc = bnxt_hwrm_cfa_l2_set_rx_mask(bp, &bp->vnic_info[0], 0, NULL);
 335         if (rc) {
 336                 RTE_LOG(ERR, PMD,
 337                         "HWRM cfa l2 rx mask failure rc: %x\n", rc);
 338                 goto err_out;
 339         }
 340
 341         /* check and configure queue intr-vector mapping */
 342         if ((rte_intr_cap_multiple(intr_handle) ||
 343              !RTE_ETH_DEV_SRIOV(bp->eth_dev).active) &&
 344             bp->eth_dev->data->dev_conf.intr_conf.rxq != 0) {
 345                 intr_vector = bp->eth_dev->data->nb_rx_queues;
 346                 RTE_LOG(INFO, PMD, "%s(): intr_vector = %d\n", __func__,
 347                         intr_vector);
 348                 if (intr_vector > bp->rx_cp_nr_rings) {
 349                         RTE_LOG(ERR, PMD, "At most %d intr queues supported",
 350                                         bp->rx_cp_nr_rings);
 351                         return -ENOTSUP;
 352                 }
 353                 if (rte_intr_efd_enable(intr_handle, intr_vector))
 354                         return -1;
 355         }
 356
 357         if (rte_intr_dp_is_en(intr_handle) && !intr_handle->intr_vec) {
 358                 intr_handle->intr_vec =
 359                         rte_zmalloc("intr_vec",
 360                                     bp->eth_dev->data->nb_rx_queues *
 361                                     sizeof(int), 0);
 362                 if (intr_handle->intr_vec == NULL) {
 363                         RTE_LOG(ERR, PMD, "Failed to allocate %d rx_queues"
 364                                 " intr_vec", bp->eth_dev->data->nb_rx_queues);
 365                         return -ENOMEM;
 366                 }
 367                 RTE_LOG(DEBUG, PMD, "%s(): intr_handle->intr_vec = %p "
 368                         "intr_handle->nb_efd = %d intr_handle->max_intr = %d\n",
 369                          __func__, intr_handle->intr_vec, intr_handle->nb_efd,
 370                         intr_handle->max_intr);
 371         }
 372
 373         for (queue_id = 0; queue_id < bp->eth_dev->data->nb_rx_queues;
 374              queue_id++) {
 375                 intr_handle->intr_vec[queue_id] = vec;
 376                 if (vec < base + intr_handle->nb_efd - 1)
 377                         vec++;
 378         }
 379
 380         /* enable uio/vfio intr/eventfd mapping */
 381         rte_intr_enable(intr_handle);
 382
 383         rc = bnxt_get_hwrm_link_config(bp, &new);
 384         if (rc) {
 385                 RTE_LOG(ERR, PMD, "HWRM Get link config failure rc: %x\n", rc);
 386                 goto err_out;
 387         }
 388
 389         if (!bp->link_info.link_up) {
 390                 rc = bnxt_set_hwrm_link_config(bp, true);
 391                 if (rc) {
 392                         RTE_LOG(ERR, PMD,
 393                                 "HWRM link config failure rc: %x\n", rc);
 394                         goto err_out;
 395                 }
 396         }
 397         bnxt_print_link_info(bp->eth_dev);
 398
 399         return 0;
 400
 401 err_out:
 402         bnxt_free_all_hwrm_resources(bp);
 403
 404         return rc;
 405 }
 406
 407 static int bnxt_shutdown_nic(struct bnxt *bp)
 408 {
 409         bnxt_free_all_hwrm_resources(bp);
 410         bnxt_free_all_filters(bp);
 411         bnxt_free_all_vnics(bp);
 412         return 0;
 413 }
 414
 415 static int bnxt_init_nic(struct bnxt *bp)
 416 {
 417         int rc;
 418
 419         rc = bnxt_init_ring_grps(bp);
 420         if (rc)
 421                 return rc;
 422
 423         bnxt_init_vnics(bp);
 424         bnxt_init_filters(bp);
 425
 426         return 0;
 427 }
 428
 429 /*
 430  * Device configuration and status function
 431  */
 432
 433 static void bnxt_dev_info_get_op(struct rte_eth_dev *eth_dev,
 434                                   struct rte_eth_dev_info *dev_info)
 435 {
 436         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 437         uint16_t max_vnics, i, j, vpool, vrxq;
 438         unsigned int max_rx_rings;
 439
 440         dev_info->pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
 441
 442         /* MAC Specifics */
 443         dev_info->max_mac_addrs = bp->max_l2_ctx;
 444         dev_info->max_hash_mac_addrs = 0;
 445
 446         /* PF/VF specifics */
 447         if (BNXT_PF(bp))
 448                 dev_info->max_vfs = bp->pdev->max_vfs;
 449         max_rx_rings = RTE_MIN(bp->max_vnics, RTE_MIN(bp->max_l2_ctx,
 450                                                 RTE_MIN(bp->max_rsscos_ctx,
 451                                                 bp->max_stat_ctx)));
 452         /* For the sake of symmetry, max_rx_queues = max_tx_queues */
 453         dev_info->max_rx_queues = max_rx_rings;
 454         dev_info->max_tx_queues = max_rx_rings;
 455         dev_info->reta_size = HW_HASH_INDEX_SIZE;
 456         dev_info->hash_key_size = 40;
 457         max_vnics = bp->max_vnics;
 458
 459         /* Fast path specifics */
 460         dev_info->min_rx_bufsize = 1;
 461         dev_info->max_rx_pktlen = BNXT_MAX_MTU + ETHER_HDR_LEN + ETHER_CRC_LEN
 462                                   + VLAN_TAG_SIZE;
 463         dev_info->rx_offload_capa = DEV_RX_OFFLOAD_VLAN_STRIP |
 464                                         DEV_RX_OFFLOAD_IPV4_CKSUM |
 465                                         DEV_RX_OFFLOAD_UDP_CKSUM |
 466                                         DEV_RX_OFFLOAD_TCP_CKSUM |
 467                                         DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM;
 468         dev_info->tx_offload_capa = DEV_TX_OFFLOAD_VLAN_INSERT |
 469                                         DEV_TX_OFFLOAD_IPV4_CKSUM |
 470                                         DEV_TX_OFFLOAD_TCP_CKSUM |
 471                                         DEV_TX_OFFLOAD_UDP_CKSUM |
 472                                         DEV_TX_OFFLOAD_TCP_TSO |
 473                                         DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM |
 474                                         DEV_TX_OFFLOAD_VXLAN_TNL_TSO |
 475                                         DEV_TX_OFFLOAD_GRE_TNL_TSO |
 476                                         DEV_TX_OFFLOAD_IPIP_TNL_TSO |
 477                                         DEV_TX_OFFLOAD_GENEVE_TNL_TSO;
 478
 479         /* *INDENT-OFF* */
 480         dev_info->default_rxconf = (struct rte_eth_rxconf) {
 481                 .rx_thresh = {
 482                         .pthresh = 8,
 483                         .hthresh = 8,
 484                         .wthresh = 0,
 485                 },
 486                 .rx_free_thresh = 32,
 487                 /* If no descriptors available, pkts are dropped by default */
 488                 .rx_drop_en = 1,
 489         };
 490
 491         dev_info->default_txconf = (struct rte_eth_txconf) {
 492                 .tx_thresh = {
 493                         .pthresh = 32,
 494                         .hthresh = 0,
 495                         .wthresh = 0,
 496                 },
 497                 .tx_free_thresh = 32,
 498                 .tx_rs_thresh = 32,
 499                 .txq_flags = ETH_TXQ_FLAGS_NOMULTSEGS |
 500                              ETH_TXQ_FLAGS_NOOFFLOADS,
 501         };
 502         eth_dev->data->dev_conf.intr_conf.lsc = 1;
 503
 504         eth_dev->data->dev_conf.intr_conf.rxq = 1;
 505
 506         /* *INDENT-ON* */
 507
 508         /*
 509          * TODO: default_rxconf, default_txconf, rx_desc_lim, and tx_desc_lim
 510          *       need further investigation.
 511          */
 512
 513         /* VMDq resources */
 514         vpool = 64; /* ETH_64_POOLS */
 515         vrxq = 128; /* ETH_VMDQ_DCB_NUM_QUEUES */
 516         for (i = 0; i < 4; vpool >>= 1, i++) {
 517                 if (max_vnics > vpool) {
 518                         for (j = 0; j < 5; vrxq >>= 1, j++) {
 519                                 if (dev_info->max_rx_queues > vrxq) {
 520                                         if (vpool > vrxq)
 521                                                 vpool = vrxq;
 522                                         goto found;
 523                                 }
 524                         }
 525                         /* Not enough resources to support VMDq */
 526                         break;
 527                 }
 528         }
 529         /* Not enough resources to support VMDq */
 530         vpool = 0;
 531         vrxq = 0;
 532 found:
 533         dev_info->max_vmdq_pools = vpool;
 534         dev_info->vmdq_queue_num = vrxq;
 535
 536         dev_info->vmdq_pool_base = 0;
 537         dev_info->vmdq_queue_base = 0;
 538 }
 539
 540 /* Configure the device based on the configuration provided */
 541 static int bnxt_dev_configure_op(struct rte_eth_dev *eth_dev)
 542 {
 543         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 544
 545         bp->rx_queues = (void *)eth_dev->data->rx_queues;
 546         bp->tx_queues = (void *)eth_dev->data->tx_queues;
 547
 548         /* Inherit new configurations */
 549         bp->rx_nr_rings = eth_dev->data->nb_rx_queues;
 550         bp->tx_nr_rings = eth_dev->data->nb_tx_queues;
 551         bp->rx_cp_nr_rings = bp->rx_nr_rings;
 552         bp->tx_cp_nr_rings = bp->tx_nr_rings;
 553
 554         if (eth_dev->data->dev_conf.rxmode.jumbo_frame)
 555                 eth_dev->data->mtu =
 556                                 eth_dev->data->dev_conf.rxmode.max_rx_pkt_len -
 557                                 ETHER_HDR_LEN - ETHER_CRC_LEN - VLAN_TAG_SIZE;
 558         return 0;
 559 }
 560
 561 static void bnxt_print_link_info(struct rte_eth_dev *eth_dev)
 562 {
 563         struct rte_eth_link *link = &eth_dev->data->dev_link;
 564
 565         if (link->link_status)
 566                 RTE_LOG(INFO, PMD, "Port %d Link Up - speed %u Mbps - %s\n",
 567                         eth_dev->data->port_id,
 568                         (uint32_t)link->link_speed,
 569                         (link->link_duplex == ETH_LINK_FULL_DUPLEX) ?
 570                         ("full-duplex") : ("half-duplex\n"));
 571         else
 572                 RTE_LOG(INFO, PMD, "Port %d Link Down\n",
 573                         eth_dev->data->port_id);
 574 }
 575
 576 static int bnxt_dev_lsc_intr_setup(struct rte_eth_dev *eth_dev)
 577 {
 578         bnxt_print_link_info(eth_dev);
 579         return 0;
 580 }
 581
 582 static int bnxt_dev_start_op(struct rte_eth_dev *eth_dev)
 583 {
 584         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 585         int vlan_mask = 0;
 586         int rc;
 587
 588         if (bp->rx_cp_nr_rings > RTE_ETHDEV_QUEUE_STAT_CNTRS) {
 589                 RTE_LOG(ERR, PMD,
 590                         "RxQ cnt %d > CONFIG_RTE_ETHDEV_QUEUE_STAT_CNTRS %d\n",
 591                         bp->rx_cp_nr_rings, RTE_ETHDEV_QUEUE_STAT_CNTRS);
 592         }
 593         bp->dev_stopped = 0;
 594
 595         rc = bnxt_init_chip(bp);
 596         if (rc)
 597                 goto error;
 598
 599         bnxt_link_update_op(eth_dev, 1);
 600
 601         if (eth_dev->data->dev_conf.rxmode.hw_vlan_filter)
 602                 vlan_mask |= ETH_VLAN_FILTER_MASK;
 603         if (eth_dev->data->dev_conf.rxmode.hw_vlan_strip)
 604                 vlan_mask |= ETH_VLAN_STRIP_MASK;
 605         rc = bnxt_vlan_offload_set_op(eth_dev, vlan_mask);
 606         if (rc)
 607                 goto error;
 608
 609         return 0;
 610
 611 error:
 612         bnxt_shutdown_nic(bp);
 613         bnxt_free_tx_mbufs(bp);
 614         bnxt_free_rx_mbufs(bp);
 615         return rc;
 616 }
 617
 618 static int bnxt_dev_set_link_up_op(struct rte_eth_dev *eth_dev)
 619 {
 620         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 621         int rc = 0;
 622
 623         if (!bp->link_info.link_up)
 624                 rc = bnxt_set_hwrm_link_config(bp, true);
 625         if (!rc)
 626                 eth_dev->data->dev_link.link_status = 1;
 627
 628         bnxt_print_link_info(eth_dev);
 629         return 0;
 630 }
 631
 632 static int bnxt_dev_set_link_down_op(struct rte_eth_dev *eth_dev)
 633 {
 634         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 635
 636         eth_dev->data->dev_link.link_status = 0;
 637         bnxt_set_hwrm_link_config(bp, false);
 638         bp->link_info.link_up = 0;
 639
 640         return 0;
 641 }
 642
 643 /* Unload the driver, release resources */
 644 static void bnxt_dev_stop_op(struct rte_eth_dev *eth_dev)
 645 {
 646         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 647
 648         if (bp->eth_dev->data->dev_started) {
 649                 /* TBD: STOP HW queues DMA */
 650                 eth_dev->data->dev_link.link_status = 0;
 651         }
 652         bnxt_set_hwrm_link_config(bp, false);
 653         bnxt_hwrm_port_clr_stats(bp);
 654         bnxt_free_tx_mbufs(bp);
 655         bnxt_free_rx_mbufs(bp);
 656         bnxt_shutdown_nic(bp);
 657         bp->dev_stopped = 1;
 658 }
 659
 660 static void bnxt_dev_close_op(struct rte_eth_dev *eth_dev)
 661 {
 662         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 663
 664         if (bp->dev_stopped == 0)
 665                 bnxt_dev_stop_op(eth_dev);
 666
 667         bnxt_free_mem(bp);
 668         if (eth_dev->data->mac_addrs != NULL) {
 669                 rte_free(eth_dev->data->mac_addrs);
 670                 eth_dev->data->mac_addrs = NULL;
 671         }
 672         if (bp->grp_info != NULL) {
 673                 rte_free(bp->grp_info);
 674                 bp->grp_info = NULL;
 675         }
 676 }
 677
 678 static void bnxt_mac_addr_remove_op(struct rte_eth_dev *eth_dev,
 679                                     uint32_t index)
 680 {
 681         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 682         uint64_t pool_mask = eth_dev->data->mac_pool_sel[index];
 683         struct bnxt_vnic_info *vnic;
 684         struct bnxt_filter_info *filter, *temp_filter;
 685         uint32_t pool = RTE_MIN(MAX_FF_POOLS, ETH_64_POOLS);
 686         uint32_t i;
 687
 688         /*
 689          * Loop through all VNICs from the specified filter flow pools to
 690          * remove the corresponding MAC addr filter
 691          */
 692         for (i = 0; i < pool; i++) {
 693                 if (!(pool_mask & (1ULL << i)))
 694                         continue;
 695
 696                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
 697                         filter = STAILQ_FIRST(&vnic->filter);
 698                         while (filter) {
 699                                 temp_filter = STAILQ_NEXT(filter, next);
 700                                 if (filter->mac_index == index) {
 701                                         STAILQ_REMOVE(&vnic->filter, filter,
 702                                                       bnxt_filter_info, next);
 703                                         bnxt_hwrm_clear_l2_filter(bp, filter);
 704                                         filter->mac_index = INVALID_MAC_INDEX;
 705                                         memset(&filter->l2_addr, 0,
 706                                                ETHER_ADDR_LEN);
 707                                         STAILQ_INSERT_TAIL(
 708                                                         &bp->free_filter_list,
 709                                                         filter, next);
 710                                 }
 711                                 filter = temp_filter;
 712                         }
 713                 }
 714         }
 715 }
 716
 717 static int bnxt_mac_addr_add_op(struct rte_eth_dev *eth_dev,
 718                                 struct ether_addr *mac_addr,
 719                                 uint32_t index, uint32_t pool)
 720 {
 721         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 722         struct bnxt_vnic_info *vnic = STAILQ_FIRST(&bp->ff_pool[pool]);
 723         struct bnxt_filter_info *filter;
 724
 725         if (BNXT_VF(bp)) {
 726                 RTE_LOG(ERR, PMD, "Cannot add MAC address to a VF interface\n");
 727                 return -ENOTSUP;
 728         }
 729
 730         if (!vnic) {
 731                 RTE_LOG(ERR, PMD, "VNIC not found for pool %d!\n", pool);
 732                 return -EINVAL;
 733         }
 734         /* Attach requested MAC address to the new l2_filter */
 735         STAILQ_FOREACH(filter, &vnic->filter, next) {
 736                 if (filter->mac_index == index) {
 737                         RTE_LOG(ERR, PMD,
 738                                 "MAC addr already existed for pool %d\n", pool);
 739                         return 0;
 740                 }
 741         }
 742         filter = bnxt_alloc_filter(bp);
 743         if (!filter) {
 744                 RTE_LOG(ERR, PMD, "L2 filter alloc failed\n");
 745                 return -ENODEV;
 746         }
 747         STAILQ_INSERT_TAIL(&vnic->filter, filter, next);
 748         filter->mac_index = index;
 749         memcpy(filter->l2_addr, mac_addr, ETHER_ADDR_LEN);
 750         return bnxt_hwrm_set_l2_filter(bp, vnic->fw_vnic_id, filter);
 751 }
 752
 753 int bnxt_link_update_op(struct rte_eth_dev *eth_dev, int wait_to_complete)
 754 {
 755         int rc = 0;
 756         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 757         struct rte_eth_link new;
 758         unsigned int cnt = BNXT_LINK_WAIT_CNT;
 759
 760         memset(&new, 0, sizeof(new));
 761         do {
 762                 /* Retrieve link info from hardware */
 763                 rc = bnxt_get_hwrm_link_config(bp, &new);
 764                 if (rc) {
 765                         new.link_speed = ETH_LINK_SPEED_100M;
 766                         new.link_duplex = ETH_LINK_FULL_DUPLEX;
 767                         RTE_LOG(ERR, PMD,
 768                                 "Failed to retrieve link rc = 0x%x!\n", rc);
 769                         goto out;
 770                 }
 771                 rte_delay_ms(BNXT_LINK_WAIT_INTERVAL);
 772
 773                 if (!wait_to_complete)
 774                         break;
 775         } while (!new.link_status && cnt--);
 776
 777 out:
 778         /* Timed out or success */
 779         if (new.link_status != eth_dev->data->dev_link.link_status ||
 780         new.link_speed != eth_dev->data->dev_link.link_speed) {
 781                 memcpy(&eth_dev->data->dev_link, &new,
 782                         sizeof(struct rte_eth_link));
 783                 bnxt_print_link_info(eth_dev);
 784         }
 785
 786         return rc;
 787 }
 788
 789 static void bnxt_promiscuous_enable_op(struct rte_eth_dev *eth_dev)
 790 {
 791         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 792         struct bnxt_vnic_info *vnic;
 793
 794         if (bp->vnic_info == NULL)
 795                 return;
 796
 797         vnic = &bp->vnic_info[0];
 798
 799         vnic->flags |= BNXT_VNIC_INFO_PROMISC;
 800         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic, 0, NULL);
 801 }
 802
 803 static void bnxt_promiscuous_disable_op(struct rte_eth_dev *eth_dev)
 804 {
 805         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 806         struct bnxt_vnic_info *vnic;
 807
 808         if (bp->vnic_info == NULL)
 809                 return;
 810
 811         vnic = &bp->vnic_info[0];
 812
 813         vnic->flags &= ~BNXT_VNIC_INFO_PROMISC;
 814         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic, 0, NULL);
 815 }
 816
 817 static void bnxt_allmulticast_enable_op(struct rte_eth_dev *eth_dev)
 818 {
 819         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 820         struct bnxt_vnic_info *vnic;
 821
 822         if (bp->vnic_info == NULL)
 823                 return;
 824
 825         vnic = &bp->vnic_info[0];
 826
 827         vnic->flags |= BNXT_VNIC_INFO_ALLMULTI;
 828         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic, 0, NULL);
 829 }
 830
 831 static void bnxt_allmulticast_disable_op(struct rte_eth_dev *eth_dev)
 832 {
 833         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 834         struct bnxt_vnic_info *vnic;
 835
 836         if (bp->vnic_info == NULL)
 837                 return;
 838
 839         vnic = &bp->vnic_info[0];
 840
 841         vnic->flags &= ~BNXT_VNIC_INFO_ALLMULTI;
 842         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic, 0, NULL);
 843 }
 844
 845 static int bnxt_reta_update_op(struct rte_eth_dev *eth_dev,
 846                             struct rte_eth_rss_reta_entry64 *reta_conf,
 847                             uint16_t reta_size)
 848 {
 849         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 850         struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
 851         struct bnxt_vnic_info *vnic;
 852         int i;
 853
 854         if (!(dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG))
 855                 return -EINVAL;
 856
 857         if (reta_size != HW_HASH_INDEX_SIZE) {
 858                 RTE_LOG(ERR, PMD, "The configured hash table lookup size "
 859                         "(%d) must equal the size supported by the hardware "
 860                         "(%d)\n", reta_size, HW_HASH_INDEX_SIZE);
 861                 return -EINVAL;
 862         }
 863         /* Update the RSS VNIC(s) */
 864         for (i = 0; i < MAX_FF_POOLS; i++) {
 865                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
 866                         memcpy(vnic->rss_table, reta_conf, reta_size);
 867
 868                         bnxt_hwrm_vnic_rss_cfg(bp, vnic);
 869                 }
 870         }
 871         return 0;
 872 }
 873
 874 static int bnxt_reta_query_op(struct rte_eth_dev *eth_dev,
 875                               struct rte_eth_rss_reta_entry64 *reta_conf,
 876                               uint16_t reta_size)
 877 {
 878         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 879         struct bnxt_vnic_info *vnic = &bp->vnic_info[0];
 880         struct rte_intr_handle *intr_handle
 881                 = &bp->pdev->intr_handle;
 882
 883         /* Retrieve from the default VNIC */
 884         if (!vnic)
 885                 return -EINVAL;
 886         if (!vnic->rss_table)
 887                 return -EINVAL;
 888
 889         if (reta_size != HW_HASH_INDEX_SIZE) {
 890                 RTE_LOG(ERR, PMD, "The configured hash table lookup size "
 891                         "(%d) must equal the size supported by the hardware "
 892                         "(%d)\n", reta_size, HW_HASH_INDEX_SIZE);
 893                 return -EINVAL;
 894         }
 895         /* EW - need to revisit here copying from u64 to u16 */
 896         memcpy(reta_conf, vnic->rss_table, reta_size);
 897
 898         if (rte_intr_allow_others(intr_handle)) {
 899                 if (eth_dev->data->dev_conf.intr_conf.lsc != 0)
 900                         bnxt_dev_lsc_intr_setup(eth_dev);
 901         }
 902
 903         return 0;
 904 }
 905
 906 static int bnxt_rss_hash_update_op(struct rte_eth_dev *eth_dev,
 907                                    struct rte_eth_rss_conf *rss_conf)
 908 {
 909         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 910         struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
 911         struct bnxt_vnic_info *vnic;
 912         uint16_t hash_type = 0;
 913         int i;
 914
 915         /*
 916          * If RSS enablement were different than dev_configure,
 917          * then return -EINVAL
 918          */
 919         if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) {
 920                 if (!rss_conf->rss_hf)
 921                         RTE_LOG(ERR, PMD, "Hash type NONE\n");
 922         } else {
 923                 if (rss_conf->rss_hf & BNXT_ETH_RSS_SUPPORT)
 924                         return -EINVAL;
 925         }
 926
 927         bp->flags |= BNXT_FLAG_UPDATE_HASH;
 928         memcpy(&bp->rss_conf, rss_conf, sizeof(*rss_conf));
 929
 930         if (rss_conf->rss_hf & ETH_RSS_IPV4)
 931                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4;
 932         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV4_TCP)
 933                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4;
 934         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV4_UDP)
 935                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4;
 936         if (rss_conf->rss_hf & ETH_RSS_IPV6)
 937                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6;
 938         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV6_TCP)
 939                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6;
 940         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV6_UDP)
 941                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6;
 942
 943         /* Update the RSS VNIC(s) */
 944         for (i = 0; i < MAX_FF_POOLS; i++) {
 945                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
 946                         vnic->hash_type = hash_type;
 947
 948                         /*
 949                          * Use the supplied key if the key length is
 950                          * acceptable and the rss_key is not NULL
 951                          */
 952                         if (rss_conf->rss_key &&
 953                             rss_conf->rss_key_len <= HW_HASH_KEY_SIZE)
 954                                 memcpy(vnic->rss_hash_key, rss_conf->rss_key,
 955                                        rss_conf->rss_key_len);
 956
 957                         bnxt_hwrm_vnic_rss_cfg(bp, vnic);
 958                 }
 959         }
 960         return 0;
 961 }
 962
 963 static int bnxt_rss_hash_conf_get_op(struct rte_eth_dev *eth_dev,
 964                                      struct rte_eth_rss_conf *rss_conf)
 965 {
 966         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 967         struct bnxt_vnic_info *vnic = &bp->vnic_info[0];
 968         int len;
 969         uint32_t hash_types;
 970
 971         /* RSS configuration is the same for all VNICs */
 972         if (vnic && vnic->rss_hash_key) {
 973                 if (rss_conf->rss_key) {
 974                         len = rss_conf->rss_key_len <= HW_HASH_KEY_SIZE ?
 975                               rss_conf->rss_key_len : HW_HASH_KEY_SIZE;
 976                         memcpy(rss_conf->rss_key, vnic->rss_hash_key, len);
 977                 }
 978
 979                 hash_types = vnic->hash_type;
 980                 rss_conf->rss_hf = 0;
 981                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4) {
 982                         rss_conf->rss_hf |= ETH_RSS_IPV4;
 983                         hash_types &= ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4;
 984                 }
 985                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4) {
 986                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV4_TCP;
 987                         hash_types &=
 988                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4;
 989                 }
 990                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4) {
 991                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV4_UDP;
 992                         hash_types &=
 993                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4;
 994                 }
 995                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6) {
 996                         rss_conf->rss_hf |= ETH_RSS_IPV6;
 997                         hash_types &= ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6;
 998                 }
 999                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6) {
1000                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV6_TCP;
1001                         hash_types &=
1002                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6;
1003                 }
1004                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6) {
1005                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV6_UDP;
1006                         hash_types &=
1007                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6;
1008                 }
1009                 if (hash_types) {
1010                         RTE_LOG(ERR, PMD,
1011                                 "Unknwon RSS config from firmware (%08x), RSS disabled",
1012                                 vnic->hash_type);
1013                         return -ENOTSUP;
1014                 }
1015         } else {
1016                 rss_conf->rss_hf = 0;
1017         }
1018         return 0;
1019 }
1020
1021 static int bnxt_flow_ctrl_get_op(struct rte_eth_dev *dev,
1022                                struct rte_eth_fc_conf *fc_conf)
1023 {
1024         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1025         struct rte_eth_link link_info;
1026         int rc;
1027
1028         rc = bnxt_get_hwrm_link_config(bp, &link_info);
1029         if (rc)
1030                 return rc;
1031
1032         memset(fc_conf, 0, sizeof(*fc_conf));
1033         if (bp->link_info.auto_pause)
1034                 fc_conf->autoneg = 1;
1035         switch (bp->link_info.pause) {
1036         case 0:
1037                 fc_conf->mode = RTE_FC_NONE;
1038                 break;
1039         case HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_TX:
1040                 fc_conf->mode = RTE_FC_TX_PAUSE;
1041                 break;
1042         case HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_RX:
1043                 fc_conf->mode = RTE_FC_RX_PAUSE;
1044                 break;
1045         case (HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_TX |
1046                         HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_RX):
1047                 fc_conf->mode = RTE_FC_FULL;
1048                 break;
1049         }
1050         return 0;
1051 }
1052
1053 static int bnxt_flow_ctrl_set_op(struct rte_eth_dev *dev,
1054                                struct rte_eth_fc_conf *fc_conf)
1055 {
1056         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1057
1058         if (BNXT_NPAR_PF(bp) || BNXT_VF(bp)) {
1059                 RTE_LOG(ERR, PMD, "Flow Control Settings cannot be modified\n");
1060                 return -ENOTSUP;
1061         }
1062
1063         switch (fc_conf->mode) {
1064         case RTE_FC_NONE:
1065                 bp->link_info.auto_pause = 0;
1066                 bp->link_info.force_pause = 0;
1067                 break;
1068         case RTE_FC_RX_PAUSE:
1069                 if (fc_conf->autoneg) {
1070                         bp->link_info.auto_pause =
1071                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_RX;
1072                         bp->link_info.force_pause = 0;
1073                 } else {
1074                         bp->link_info.auto_pause = 0;
1075                         bp->link_info.force_pause =
1076                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_RX;
1077                 }
1078                 break;
1079         case RTE_FC_TX_PAUSE:
1080                 if (fc_conf->autoneg) {
1081                         bp->link_info.auto_pause =
1082                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_TX;
1083                         bp->link_info.force_pause = 0;
1084                 } else {
1085                         bp->link_info.auto_pause = 0;
1086                         bp->link_info.force_pause =
1087                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_TX;
1088                 }
1089                 break;
1090         case RTE_FC_FULL:
1091                 if (fc_conf->autoneg) {
1092                         bp->link_info.auto_pause =
1093                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_TX |
1094                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_RX;
1095                         bp->link_info.force_pause = 0;
1096                 } else {
1097                         bp->link_info.auto_pause = 0;
1098                         bp->link_info.force_pause =
1099                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_TX |
1100                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_RX;
1101                 }
1102                 break;
1103         }
1104         return bnxt_set_hwrm_link_config(bp, true);
1105 }
1106
1107 /* Add UDP tunneling port */
1108 static int
1109 bnxt_udp_tunnel_port_add_op(struct rte_eth_dev *eth_dev,
1110                          struct rte_eth_udp_tunnel *udp_tunnel)
1111 {
1112         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
1113         uint16_t tunnel_type = 0;
1114         int rc = 0;
1115
1116         switch (udp_tunnel->prot_type) {
1117         case RTE_TUNNEL_TYPE_VXLAN:
1118                 if (bp->vxlan_port_cnt) {
1119                         RTE_LOG(ERR, PMD, "Tunnel Port %d already programmed\n",
1120                                 udp_tunnel->udp_port);
1121                         if (bp->vxlan_port != udp_tunnel->udp_port) {
1122                                 RTE_LOG(ERR, PMD, "Only one port allowed\n");
1123                                 return -ENOSPC;
1124                         }
1125                         bp->vxlan_port_cnt++;
1126                         return 0;
1127                 }
1128                 tunnel_type =
1129                         HWRM_TUNNEL_DST_PORT_ALLOC_INPUT_TUNNEL_TYPE_VXLAN;
1130                 bp->vxlan_port_cnt++;
1131                 break;
1132         case RTE_TUNNEL_TYPE_GENEVE:
1133                 if (bp->geneve_port_cnt) {
1134                         RTE_LOG(ERR, PMD, "Tunnel Port %d already programmed\n",
1135                                 udp_tunnel->udp_port);
1136                         if (bp->geneve_port != udp_tunnel->udp_port) {
1137                                 RTE_LOG(ERR, PMD, "Only one port allowed\n");
1138                                 return -ENOSPC;
1139                         }
1140                         bp->geneve_port_cnt++;
1141                         return 0;
1142                 }
1143                 tunnel_type =
1144                         HWRM_TUNNEL_DST_PORT_ALLOC_INPUT_TUNNEL_TYPE_GENEVE;
1145                 bp->geneve_port_cnt++;
1146                 break;
1147         default:
1148                 RTE_LOG(ERR, PMD, "Tunnel type is not supported\n");
1149                 return -ENOTSUP;
1150         }
1151         rc = bnxt_hwrm_tunnel_dst_port_alloc(bp, udp_tunnel->udp_port,
1152                                              tunnel_type);
1153         return rc;
1154 }
1155
1156 static int
1157 bnxt_udp_tunnel_port_del_op(struct rte_eth_dev *eth_dev,
1158                          struct rte_eth_udp_tunnel *udp_tunnel)
1159 {
1160         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
1161         uint16_t tunnel_type = 0;
1162         uint16_t port = 0;
1163         int rc = 0;
1164
1165         switch (udp_tunnel->prot_type) {
1166         case RTE_TUNNEL_TYPE_VXLAN:
1167                 if (!bp->vxlan_port_cnt) {
1168                         RTE_LOG(ERR, PMD, "No Tunnel port configured yet\n");
1169                         return -EINVAL;
1170                 }
1171                 if (bp->vxlan_port != udp_tunnel->udp_port) {
1172                         RTE_LOG(ERR, PMD, "Req Port: %d. Configured port: %d\n",
1173                                 udp_tunnel->udp_port, bp->vxlan_port);
1174                         return -EINVAL;
1175                 }
1176                 if (--bp->vxlan_port_cnt)
1177                         return 0;
1178
1179                 tunnel_type =
1180                         HWRM_TUNNEL_DST_PORT_FREE_INPUT_TUNNEL_TYPE_VXLAN;
1181                 port = bp->vxlan_fw_dst_port_id;
1182                 break;
1183         case RTE_TUNNEL_TYPE_GENEVE:
1184                 if (!bp->geneve_port_cnt) {
1185                         RTE_LOG(ERR, PMD, "No Tunnel port configured yet\n");
1186                         return -EINVAL;
1187                 }
1188                 if (bp->geneve_port != udp_tunnel->udp_port) {
1189                         RTE_LOG(ERR, PMD, "Req Port: %d. Configured port: %d\n",
1190                                 udp_tunnel->udp_port, bp->geneve_port);
1191                         return -EINVAL;
1192                 }
1193                 if (--bp->geneve_port_cnt)
1194                         return 0;
1195
1196                 tunnel_type =
1197                         HWRM_TUNNEL_DST_PORT_FREE_INPUT_TUNNEL_TYPE_GENEVE;
1198                 port = bp->geneve_fw_dst_port_id;
1199                 break;
1200         default:
1201                 RTE_LOG(ERR, PMD, "Tunnel type is not supported\n");
1202                 return -ENOTSUP;
1203         }
1204
1205         rc = bnxt_hwrm_tunnel_dst_port_free(bp, port, tunnel_type);
1206         if (!rc) {
1207                 if (tunnel_type ==
1208                     HWRM_TUNNEL_DST_PORT_FREE_INPUT_TUNNEL_TYPE_VXLAN)
1209                         bp->vxlan_port = 0;
1210                 if (tunnel_type ==
1211                     HWRM_TUNNEL_DST_PORT_FREE_INPUT_TUNNEL_TYPE_GENEVE)
1212                         bp->geneve_port = 0;
1213         }
1214         return rc;
1215 }
1216
1217 static int bnxt_del_vlan_filter(struct bnxt *bp, uint16_t vlan_id)
1218 {
1219         struct bnxt_filter_info *filter, *temp_filter, *new_filter;
1220         struct bnxt_vnic_info *vnic;
1221         unsigned int i;
1222         int rc = 0;
1223         uint32_t chk = HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN;
1224
1225         /* Cycle through all VNICs */
1226         for (i = 0; i < bp->nr_vnics; i++) {
1227                 /*
1228                  * For each VNIC and each associated filter(s)
1229                  * if VLAN exists && VLAN matches vlan_id
1230                  *      remove the MAC+VLAN filter
1231                  *      add a new MAC only filter
1232                  * else
1233                  *      VLAN filter doesn't exist, just skip and continue
1234                  */
1235                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
1236                         filter = STAILQ_FIRST(&vnic->filter);
1237                         while (filter) {
1238                                 temp_filter = STAILQ_NEXT(filter, next);
1239
1240                                 if (filter->enables & chk &&
1241                                     filter->l2_ovlan == vlan_id) {
1242                                         /* Must delete the filter */
1243                                         STAILQ_REMOVE(&vnic->filter, filter,
1244                                                       bnxt_filter_info, next);
1245                                         bnxt_hwrm_clear_l2_filter(bp, filter);
1246                                         STAILQ_INSERT_TAIL(
1247                                                         &bp->free_filter_list,
1248                                                         filter, next);
1249
1250                                         /*
1251                                          * Need to examine to see if the MAC
1252                                          * filter already existed or not before
1253                                          * allocating a new one
1254                                          */
1255
1256                                         new_filter = bnxt_alloc_filter(bp);
1257                                         if (!new_filter) {
1258                                                 RTE_LOG(ERR, PMD,
1259                                                         "MAC/VLAN filter alloc failed\n");
1260                                                 rc = -ENOMEM;
1261                                                 goto exit;
1262                                         }
1263                                         STAILQ_INSERT_TAIL(&vnic->filter,
1264                                                            new_filter, next);
1265                                         /* Inherit MAC from previous filter */
1266                                         new_filter->mac_index =
1267                                                         filter->mac_index;
1268                                         memcpy(new_filter->l2_addr,
1269                                                filter->l2_addr, ETHER_ADDR_LEN);
1270                                         /* MAC only filter */
1271                                         rc = bnxt_hwrm_set_l2_filter(bp,
1272                                                         vnic->fw_vnic_id,
1273                                                         new_filter);
1274                                         if (rc)
1275                                                 goto exit;
1276                                         RTE_LOG(INFO, PMD,
1277                                                 "Del Vlan filter for %d\n",
1278                                                 vlan_id);
1279                                 }
1280                                 filter = temp_filter;
1281                         }
1282                 }
1283         }
1284 exit:
1285         return rc;
1286 }
1287
1288 static int bnxt_add_vlan_filter(struct bnxt *bp, uint16_t vlan_id)
1289 {
1290         struct bnxt_filter_info *filter, *temp_filter, *new_filter;
1291         struct bnxt_vnic_info *vnic;
1292         unsigned int i;
1293         int rc = 0;
1294         uint32_t en = HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_IVLAN |
1295                 HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_IVLAN_MASK;
1296         uint32_t chk = HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_IVLAN;
1297
1298         /* Cycle through all VNICs */
1299         for (i = 0; i < bp->nr_vnics; i++) {
1300                 /*
1301                  * For each VNIC and each associated filter(s)
1302                  * if VLAN exists:
1303                  *   if VLAN matches vlan_id
1304                  *      VLAN filter already exists, just skip and continue
1305                  *   else
1306                  *      add a new MAC+VLAN filter
1307                  * else
1308                  *   Remove the old MAC only filter
1309                  *    Add a new MAC+VLAN filter
1310                  */
1311                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
1312                         filter = STAILQ_FIRST(&vnic->filter);
1313                         while (filter) {
1314                                 temp_filter = STAILQ_NEXT(filter, next);
1315
1316                                 if (filter->enables & chk) {
1317                                         if (filter->l2_ovlan == vlan_id)
1318                                                 goto cont;
1319                                 } else {
1320                                         /* Must delete the MAC filter */
1321                                         STAILQ_REMOVE(&vnic->filter, filter,
1322                                                       bnxt_filter_info, next);
1323                                         bnxt_hwrm_clear_l2_filter(bp, filter);
1324                                         filter->l2_ovlan = 0;
1325                                         STAILQ_INSERT_TAIL(
1326                                                         &bp->free_filter_list,
1327                                                         filter, next);
1328                                 }
1329                                 new_filter = bnxt_alloc_filter(bp);
1330                                 if (!new_filter) {
1331                                         RTE_LOG(ERR, PMD,
1332                                                 "MAC/VLAN filter alloc failed\n");
1333                                         rc = -ENOMEM;
1334                                         goto exit;
1335                                 }
1336                                 STAILQ_INSERT_TAIL(&vnic->filter, new_filter,
1337                                                    next);
1338                                 /* Inherit MAC from the previous filter */
1339                                 new_filter->mac_index = filter->mac_index;
1340                                 memcpy(new_filter->l2_addr, filter->l2_addr,
1341                                        ETHER_ADDR_LEN);
1342                                 /* MAC + VLAN ID filter */
1343                                 new_filter->l2_ivlan = vlan_id;
1344                                 new_filter->l2_ivlan_mask = 0xF000;
1345                                 new_filter->enables |= en;
1346                                 rc = bnxt_hwrm_set_l2_filter(bp,
1347                                                              vnic->fw_vnic_id,
1348                                                              new_filter);
1349                                 if (rc)
1350                                         goto exit;
1351                                 RTE_LOG(INFO, PMD,
1352                                         "Added Vlan filter for %d\n", vlan_id);
1353 cont:
1354                                 filter = temp_filter;
1355                         }
1356                 }
1357         }
1358 exit:
1359         return rc;
1360 }
1361
1362 static int bnxt_vlan_filter_set_op(struct rte_eth_dev *eth_dev,
1363                                    uint16_t vlan_id, int on)
1364 {
1365         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
1366
1367         /* These operations apply to ALL existing MAC/VLAN filters */
1368         if (on)
1369                 return bnxt_add_vlan_filter(bp, vlan_id);
1370         else
1371                 return bnxt_del_vlan_filter(bp, vlan_id);
1372 }
1373
1374 static int
1375 bnxt_vlan_offload_set_op(struct rte_eth_dev *dev, int mask)
1376 {
1377         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1378         unsigned int i;
1379
1380         if (mask & ETH_VLAN_FILTER_MASK) {
1381                 if (!dev->data->dev_conf.rxmode.hw_vlan_filter) {
1382                         /* Remove any VLAN filters programmed */
1383                         for (i = 0; i < 4095; i++)
1384                                 bnxt_del_vlan_filter(bp, i);
1385                 }
1386                 RTE_LOG(INFO, PMD, "VLAN Filtering: %d\n",
1387                         dev->data->dev_conf.rxmode.hw_vlan_filter);
1388         }
1389
1390         if (mask & ETH_VLAN_STRIP_MASK) {
1391                 /* Enable or disable VLAN stripping */
1392                 for (i = 0; i < bp->nr_vnics; i++) {
1393                         struct bnxt_vnic_info *vnic = &bp->vnic_info[i];
1394                         if (dev->data->dev_conf.rxmode.hw_vlan_strip)
1395                                 vnic->vlan_strip = true;
1396                         else
1397                                 vnic->vlan_strip = false;
1398                         bnxt_hwrm_vnic_cfg(bp, vnic);
1399                 }
1400                 RTE_LOG(INFO, PMD, "VLAN Strip Offload: %d\n",
1401                         dev->data->dev_conf.rxmode.hw_vlan_strip);
1402         }
1403
1404         if (mask & ETH_VLAN_EXTEND_MASK)
1405                 RTE_LOG(ERR, PMD, "Extend VLAN Not supported\n");
1406
1407         return 0;
1408 }
1409
1410 static void
1411 bnxt_set_default_mac_addr_op(struct rte_eth_dev *dev, struct ether_addr *addr)
1412 {
1413         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1414         /* Default Filter is tied to VNIC 0 */
1415         struct bnxt_vnic_info *vnic = &bp->vnic_info[0];
1416         struct bnxt_filter_info *filter;
1417         int rc;
1418
1419         if (BNXT_VF(bp))
1420                 return;
1421
1422         memcpy(bp->mac_addr, addr, sizeof(bp->mac_addr));
1423         memcpy(&dev->data->mac_addrs[0], bp->mac_addr, ETHER_ADDR_LEN);
1424
1425         STAILQ_FOREACH(filter, &vnic->filter, next) {
1426                 /* Default Filter is at Index 0 */
1427                 if (filter->mac_index != 0)
1428                         continue;
1429                 rc = bnxt_hwrm_clear_l2_filter(bp, filter);
1430                 if (rc)
1431                         break;
1432                 memcpy(filter->l2_addr, bp->mac_addr, ETHER_ADDR_LEN);
1433                 memset(filter->l2_addr_mask, 0xff, ETHER_ADDR_LEN);
1434                 filter->flags |= HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_RX;
1435                 filter->enables |=
1436                         HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_ADDR |
1437                         HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_ADDR_MASK;
1438                 rc = bnxt_hwrm_set_l2_filter(bp, vnic->fw_vnic_id, filter);
1439                 if (rc)
1440                         break;
1441                 filter->mac_index = 0;
1442                 RTE_LOG(DEBUG, PMD, "Set MAC addr\n");
1443         }
1444 }
1445
1446 static int
1447 bnxt_dev_set_mc_addr_list_op(struct rte_eth_dev *eth_dev,
1448                           struct ether_addr *mc_addr_set,
1449                           uint32_t nb_mc_addr)
1450 {
1451         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
1452         char *mc_addr_list = (char *)mc_addr_set;
1453         struct bnxt_vnic_info *vnic;
1454         uint32_t off = 0, i = 0;
1455
1456         vnic = &bp->vnic_info[0];
1457
1458         if (nb_mc_addr > BNXT_MAX_MC_ADDRS) {
1459                 vnic->flags |= BNXT_VNIC_INFO_ALLMULTI;
1460                 goto allmulti;
1461         }
1462
1463         /* TODO Check for Duplicate mcast addresses */
1464         vnic->flags &= ~BNXT_VNIC_INFO_ALLMULTI;
1465         for (i = 0; i < nb_mc_addr; i++) {
1466                 memcpy(vnic->mc_list + off, &mc_addr_list[i], ETHER_ADDR_LEN);
1467                 off += ETHER_ADDR_LEN;
1468         }
1469
1470         vnic->mc_addr_cnt = i;
1471
1472 allmulti:
1473         return bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic, 0, NULL);
1474 }
1475
1476 static int
1477 bnxt_fw_version_get(struct rte_eth_dev *dev, char *fw_version, size_t fw_size)
1478 {
1479         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1480         uint8_t fw_major = (bp->fw_ver >> 24) & 0xff;
1481         uint8_t fw_minor = (bp->fw_ver >> 16) & 0xff;
1482         uint8_t fw_updt = (bp->fw_ver >> 8) & 0xff;
1483         int ret;
1484
1485         ret = snprintf(fw_version, fw_size, "%d.%d.%d",
1486                         fw_major, fw_minor, fw_updt);
1487
1488         ret += 1; /* add the size of '\0' */
1489         if (fw_size < (uint32_t)ret)
1490                 return ret;
1491         else
1492                 return 0;
1493 }
1494
1495 static void
1496 bnxt_rxq_info_get_op(struct rte_eth_dev *dev, uint16_t queue_id,
1497         struct rte_eth_rxq_info *qinfo)
1498 {
1499         struct bnxt_rx_queue *rxq;
1500
1501         rxq = dev->data->rx_queues[queue_id];
1502
1503         qinfo->mp = rxq->mb_pool;
1504         qinfo->scattered_rx = dev->data->scattered_rx;
1505         qinfo->nb_desc = rxq->nb_rx_desc;
1506
1507         qinfo->conf.rx_free_thresh = rxq->rx_free_thresh;
1508         qinfo->conf.rx_drop_en = 0;
1509         qinfo->conf.rx_deferred_start = 0;
1510 }
1511
1512 static void
1513 bnxt_txq_info_get_op(struct rte_eth_dev *dev, uint16_t queue_id,
1514         struct rte_eth_txq_info *qinfo)
1515 {
1516         struct bnxt_tx_queue *txq;
1517
1518         txq = dev->data->tx_queues[queue_id];
1519
1520         qinfo->nb_desc = txq->nb_tx_desc;
1521
1522         qinfo->conf.tx_thresh.pthresh = txq->pthresh;
1523         qinfo->conf.tx_thresh.hthresh = txq->hthresh;
1524         qinfo->conf.tx_thresh.wthresh = txq->wthresh;
1525
1526         qinfo->conf.tx_free_thresh = txq->tx_free_thresh;
1527         qinfo->conf.tx_rs_thresh = 0;
1528         qinfo->conf.txq_flags = txq->txq_flags;
1529         qinfo->conf.tx_deferred_start = txq->tx_deferred_start;
1530 }
1531
1532 static int bnxt_mtu_set_op(struct rte_eth_dev *eth_dev, uint16_t new_mtu)
1533 {
1534         struct bnxt *bp = eth_dev->data->dev_private;
1535         struct rte_eth_dev_info dev_info;
1536         uint32_t max_dev_mtu;
1537         uint32_t rc = 0;
1538         uint32_t i;
1539
1540         bnxt_dev_info_get_op(eth_dev, &dev_info);
1541         max_dev_mtu = dev_info.max_rx_pktlen -
1542                       ETHER_HDR_LEN - ETHER_CRC_LEN - VLAN_TAG_SIZE * 2;
1543
1544         if (new_mtu < ETHER_MIN_MTU || new_mtu > max_dev_mtu) {
1545                 RTE_LOG(ERR, PMD, "MTU requested must be within (%d, %d)\n",
1546                         ETHER_MIN_MTU, max_dev_mtu);
1547                 return -EINVAL;
1548         }
1549
1550
1551         if (new_mtu > ETHER_MTU) {
1552                 bp->flags |= BNXT_FLAG_JUMBO;
1553                 eth_dev->data->dev_conf.rxmode.jumbo_frame = 1;
1554         } else {
1555                 eth_dev->data->dev_conf.rxmode.jumbo_frame = 0;
1556                 bp->flags &= ~BNXT_FLAG_JUMBO;
1557         }
1558
1559         eth_dev->data->dev_conf.rxmode.max_rx_pkt_len =
1560                 new_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN + VLAN_TAG_SIZE * 2;
1561
1562         eth_dev->data->mtu = new_mtu;
1563         RTE_LOG(INFO, PMD, "New MTU is %d\n", eth_dev->data->mtu);
1564
1565         for (i = 0; i < bp->nr_vnics; i++) {
1566                 struct bnxt_vnic_info *vnic = &bp->vnic_info[i];
1567                 uint16_t size = 0;
1568
1569                 vnic->mru = bp->eth_dev->data->mtu + ETHER_HDR_LEN +
1570                                         ETHER_CRC_LEN + VLAN_TAG_SIZE * 2;
1571                 rc = bnxt_hwrm_vnic_cfg(bp, vnic);
1572                 if (rc)
1573                         break;
1574
1575                 size = rte_pktmbuf_data_room_size(bp->rx_queues[0]->mb_pool);
1576                 size -= RTE_PKTMBUF_HEADROOM;
1577
1578                 if (size < new_mtu) {
1579                         rc = bnxt_hwrm_vnic_plcmode_cfg(bp, vnic);
1580                         if (rc)
1581                                 return rc;
1582                 }
1583         }
1584
1585         return rc;
1586 }
1587
1588 static int
1589 bnxt_vlan_pvid_set_op(struct rte_eth_dev *dev, uint16_t pvid, int on)
1590 {
1591         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1592         uint16_t vlan = bp->vlan;
1593         int rc;
1594
1595         if (BNXT_NPAR_PF(bp) || BNXT_VF(bp)) {
1596                 RTE_LOG(ERR, PMD,
1597                         "PVID cannot be modified for this function\n");
1598                 return -ENOTSUP;
1599         }
1600         bp->vlan = on ? pvid : 0;
1601
1602         rc = bnxt_hwrm_set_default_vlan(bp, 0, 0);
1603         if (rc)
1604                 bp->vlan = vlan;
1605         return rc;
1606 }
1607
1608 static int
1609 bnxt_dev_led_on_op(struct rte_eth_dev *dev)
1610 {
1611         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1612
1613         return bnxt_hwrm_port_led_cfg(bp, true);
1614 }
1615
1616 static int
1617 bnxt_dev_led_off_op(struct rte_eth_dev *dev)
1618 {
1619         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1620
1621         return bnxt_hwrm_port_led_cfg(bp, false);
1622 }
1623
1624 static uint32_t
1625 bnxt_rx_queue_count_op(struct rte_eth_dev *dev, uint16_t rx_queue_id)
1626 {
1627         uint32_t desc = 0, raw_cons = 0, cons;
1628         struct bnxt_cp_ring_info *cpr;
1629         struct bnxt_rx_queue *rxq;
1630         struct rx_pkt_cmpl *rxcmp;
1631         uint16_t cmp_type;
1632         uint8_t cmp = 1;
1633         bool valid;
1634
1635         rxq = dev->data->rx_queues[rx_queue_id];
1636         cpr = rxq->cp_ring;
1637         valid = cpr->valid;
1638
1639         while (raw_cons < rxq->nb_rx_desc) {
1640                 cons = RING_CMP(cpr->cp_ring_struct, raw_cons);
1641                 rxcmp = (struct rx_pkt_cmpl *)&cpr->cp_desc_ring[cons];
1642
1643                 if (!CMPL_VALID(rxcmp, valid))
1644                         goto nothing_to_do;
1645                 valid = FLIP_VALID(cons, cpr->cp_ring_struct->ring_mask, valid);
1646                 cmp_type = CMP_TYPE(rxcmp);
1647                 if (cmp_type == RX_TPA_END_CMPL_TYPE_RX_TPA_END) {
1648                         cmp = (rte_le_to_cpu_32(
1649                                         ((struct rx_tpa_end_cmpl *)
1650                                          (rxcmp))->agg_bufs_v1) &
1651                                RX_TPA_END_CMPL_AGG_BUFS_MASK) >>
1652                                 RX_TPA_END_CMPL_AGG_BUFS_SFT;
1653                         desc++;
1654                 } else if (cmp_type == 0x11) {
1655                         desc++;
1656                         cmp = (rxcmp->agg_bufs_v1 &
1657                                    RX_PKT_CMPL_AGG_BUFS_MASK) >>
1658                                 RX_PKT_CMPL_AGG_BUFS_SFT;
1659                 } else {
1660                         cmp = 1;
1661                 }
1662 nothing_to_do:
1663                 raw_cons += cmp ? cmp : 2;
1664         }
1665
1666         return desc;
1667 }
1668
1669 static int
1670 bnxt_rx_descriptor_status_op(void *rx_queue, uint16_t offset)
1671 {
1672         struct bnxt_rx_queue *rxq = (struct bnxt_rx_queue *)rx_queue;
1673         struct bnxt_rx_ring_info *rxr;
1674         struct bnxt_cp_ring_info *cpr;
1675         struct bnxt_sw_rx_bd *rx_buf;
1676         struct rx_pkt_cmpl *rxcmp;
1677         uint32_t cons, cp_cons;
1678
1679         if (!rxq)
1680                 return -EINVAL;
1681
1682         cpr = rxq->cp_ring;
1683         rxr = rxq->rx_ring;
1684
1685         if (offset >= rxq->nb_rx_desc)
1686                 return -EINVAL;
1687
1688         cons = RING_CMP(cpr->cp_ring_struct, offset);
1689         cp_cons = cpr->cp_raw_cons;
1690         rxcmp = (struct rx_pkt_cmpl *)&cpr->cp_desc_ring[cons];
1691
1692         if (cons > cp_cons) {
1693                 if (CMPL_VALID(rxcmp, cpr->valid))
1694                         return RTE_ETH_RX_DESC_DONE;
1695         } else {
1696                 if (CMPL_VALID(rxcmp, !cpr->valid))
1697                         return RTE_ETH_RX_DESC_DONE;
1698         }
1699         rx_buf = &rxr->rx_buf_ring[cons];
1700         if (rx_buf->mbuf == NULL)
1701                 return RTE_ETH_RX_DESC_UNAVAIL;
1702
1703
1704         return RTE_ETH_RX_DESC_AVAIL;
1705 }
1706
1707 static int
1708 bnxt_tx_descriptor_status_op(void *tx_queue, uint16_t offset)
1709 {
1710         struct bnxt_tx_queue *txq = (struct bnxt_tx_queue *)tx_queue;
1711         struct bnxt_tx_ring_info *txr;
1712         struct bnxt_cp_ring_info *cpr;
1713         struct bnxt_sw_tx_bd *tx_buf;
1714         struct tx_pkt_cmpl *txcmp;
1715         uint32_t cons, cp_cons;
1716
1717         if (!txq)
1718                 return -EINVAL;
1719
1720         cpr = txq->cp_ring;
1721         txr = txq->tx_ring;
1722
1723         if (offset >= txq->nb_tx_desc)
1724                 return -EINVAL;
1725
1726         cons = RING_CMP(cpr->cp_ring_struct, offset);
1727         txcmp = (struct tx_pkt_cmpl *)&cpr->cp_desc_ring[cons];
1728         cp_cons = cpr->cp_raw_cons;
1729
1730         if (cons > cp_cons) {
1731                 if (CMPL_VALID(txcmp, cpr->valid))
1732                         return RTE_ETH_TX_DESC_UNAVAIL;
1733         } else {
1734                 if (CMPL_VALID(txcmp, !cpr->valid))
1735                         return RTE_ETH_TX_DESC_UNAVAIL;
1736         }
1737         tx_buf = &txr->tx_buf_ring[cons];
1738         if (tx_buf->mbuf == NULL)
1739                 return RTE_ETH_TX_DESC_DONE;
1740
1741         return RTE_ETH_TX_DESC_FULL;
1742 }
1743
1744 static struct bnxt_filter_info *
1745 bnxt_match_and_validate_ether_filter(struct bnxt *bp,
1746                                 struct rte_eth_ethertype_filter *efilter,
1747                                 struct bnxt_vnic_info *vnic0,
1748                                 struct bnxt_vnic_info *vnic,
1749                                 int *ret)
1750 {
1751         struct bnxt_filter_info *mfilter = NULL;
1752         int match = 0;
1753         *ret = 0;
1754
1755         if (efilter->ether_type == ETHER_TYPE_IPv4 ||
1756                 efilter->ether_type == ETHER_TYPE_IPv6) {
1757                 RTE_LOG(ERR, PMD, "invalid ether_type(0x%04x) in"
1758                         " ethertype filter.", efilter->ether_type);
1759                 *ret = -EINVAL;
1760                 goto exit;
1761         }
1762         if (efilter->queue >= bp->rx_nr_rings) {
1763                 RTE_LOG(ERR, PMD, "Invalid queue %d\n", efilter->queue);
1764                 *ret = -EINVAL;
1765                 goto exit;
1766         }
1767
1768         vnic0 = STAILQ_FIRST(&bp->ff_pool[0]);
1769         vnic = STAILQ_FIRST(&bp->ff_pool[efilter->queue]);
1770         if (vnic == NULL) {
1771                 RTE_LOG(ERR, PMD, "Invalid queue %d\n", efilter->queue);
1772                 *ret = -EINVAL;
1773                 goto exit;
1774         }
1775
1776         if (efilter->flags & RTE_ETHTYPE_FLAGS_DROP) {
1777                 STAILQ_FOREACH(mfilter, &vnic0->filter, next) {
1778                         if ((!memcmp(efilter->mac_addr.addr_bytes,
1779                                      mfilter->l2_addr, ETHER_ADDR_LEN) &&
1780                              mfilter->flags ==
1781                              HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_FLAGS_DROP &&
1782                              mfilter->ethertype == efilter->ether_type)) {
1783                                 match = 1;
1784                                 break;
1785                         }
1786                 }
1787         } else {
1788                 STAILQ_FOREACH(mfilter, &vnic->filter, next)
1789                         if ((!memcmp(efilter->mac_addr.addr_bytes,
1790                                      mfilter->l2_addr, ETHER_ADDR_LEN) &&
1791                              mfilter->ethertype == efilter->ether_type &&
1792                              mfilter->flags ==
1793                              HWRM_CFA_L2_FILTER_CFG_INPUT_FLAGS_PATH_RX)) {
1794                                 match = 1;
1795                                 break;
1796                         }
1797         }
1798
1799         if (match)
1800                 *ret = -EEXIST;
1801
1802 exit:
1803         return mfilter;
1804 }
1805
1806 static int
1807 bnxt_ethertype_filter(struct rte_eth_dev *dev,
1808                         enum rte_filter_op filter_op,
1809                         void *arg)
1810 {
1811         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1812         struct rte_eth_ethertype_filter *efilter =
1813                         (struct rte_eth_ethertype_filter *)arg;
1814         struct bnxt_filter_info *bfilter, *filter1;
1815         struct bnxt_vnic_info *vnic, *vnic0;
1816         int ret;
1817
1818         if (filter_op == RTE_ETH_FILTER_NOP)
1819                 return 0;
1820
1821         if (arg == NULL) {
1822                 RTE_LOG(ERR, PMD, "arg shouldn't be NULL for operation %u.",
1823                             filter_op);
1824                 return -EINVAL;
1825         }
1826
1827         vnic0 = STAILQ_FIRST(&bp->ff_pool[0]);
1828         vnic = STAILQ_FIRST(&bp->ff_pool[efilter->queue]);
1829
1830         switch (filter_op) {
1831         case RTE_ETH_FILTER_ADD:
1832                 bnxt_match_and_validate_ether_filter(bp, efilter,
1833                                                         vnic0, vnic, &ret);
1834                 if (ret < 0)
1835                         return ret;
1836
1837                 bfilter = bnxt_get_unused_filter(bp);
1838                 if (bfilter == NULL) {
1839                         RTE_LOG(ERR, PMD,
1840                                 "Not enough resources for a new filter.\n");
1841                         return -ENOMEM;
1842                 }
1843                 bfilter->filter_type = HWRM_CFA_NTUPLE_FILTER;
1844                 memcpy(bfilter->l2_addr, efilter->mac_addr.addr_bytes,
1845                        ETHER_ADDR_LEN);
1846                 memcpy(bfilter->dst_macaddr, efilter->mac_addr.addr_bytes,
1847                        ETHER_ADDR_LEN);
1848                 bfilter->enables |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_MACADDR;
1849                 bfilter->ethertype = efilter->ether_type;
1850                 bfilter->enables |= NTUPLE_FLTR_ALLOC_INPUT_EN_ETHERTYPE;
1851
1852                 filter1 = bnxt_get_l2_filter(bp, bfilter, vnic0);
1853                 if (filter1 == NULL) {
1854                         ret = -1;
1855                         goto cleanup;
1856                 }
1857                 bfilter->enables |=
1858                         HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_L2_FILTER_ID;
1859                 bfilter->fw_l2_filter_id = filter1->fw_l2_filter_id;
1860
1861                 bfilter->dst_id = vnic->fw_vnic_id;
1862
1863                 if (efilter->flags & RTE_ETHTYPE_FLAGS_DROP) {
1864                         bfilter->flags =
1865                                 HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_FLAGS_DROP;
1866                 }
1867
1868                 ret = bnxt_hwrm_set_ntuple_filter(bp, bfilter->dst_id, bfilter);
1869                 if (ret)
1870                         goto cleanup;
1871                 STAILQ_INSERT_TAIL(&vnic->filter, bfilter, next);
1872                 break;
1873         case RTE_ETH_FILTER_DELETE:
1874                 filter1 = bnxt_match_and_validate_ether_filter(bp, efilter,
1875                                                         vnic0, vnic, &ret);
1876                 if (ret == -EEXIST) {
1877                         ret = bnxt_hwrm_clear_ntuple_filter(bp, filter1);
1878
1879                         STAILQ_REMOVE(&vnic->filter, filter1, bnxt_filter_info,
1880                                       next);
1881                         bnxt_free_filter(bp, filter1);
1882                 } else if (ret == 0) {
1883                         RTE_LOG(ERR, PMD, "No matching filter found\n");
1884                 }
1885                 break;
1886         default:
1887                 RTE_LOG(ERR, PMD, "unsupported operation %u.", filter_op);
1888                 ret = -EINVAL;
1889                 goto error;
1890         }
1891         return ret;
1892 cleanup:
1893         bnxt_free_filter(bp, bfilter);
1894 error:
1895         return ret;
1896 }
1897
1898 static inline int
1899 parse_ntuple_filter(struct bnxt *bp,
1900                     struct rte_eth_ntuple_filter *nfilter,
1901                     struct bnxt_filter_info *bfilter)
1902 {
1903         uint32_t en = 0;
1904
1905         if (nfilter->queue >= bp->rx_nr_rings) {
1906                 RTE_LOG(ERR, PMD, "Invalid queue %d\n", nfilter->queue);
1907                 return -EINVAL;
1908         }
1909
1910         switch (nfilter->dst_port_mask) {
1911         case UINT16_MAX:
1912                 bfilter->dst_port_mask = -1;
1913                 bfilter->dst_port = nfilter->dst_port;
1914                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT |
1915                         NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT_MASK;
1916                 break;
1917         default:
1918                 RTE_LOG(ERR, PMD, "invalid dst_port mask.");
1919                 return -EINVAL;
1920         }
1921
1922         bfilter->ip_addr_type = NTUPLE_FLTR_ALLOC_INPUT_IP_ADDR_TYPE_IPV4;
1923         en |= NTUPLE_FLTR_ALLOC_IN_EN_IP_PROTO;
1924
1925         switch (nfilter->proto_mask) {
1926         case UINT8_MAX:
1927                 if (nfilter->proto == 17) /* IPPROTO_UDP */
1928                         bfilter->ip_protocol = 17;
1929                 else if (nfilter->proto == 6) /* IPPROTO_TCP */
1930                         bfilter->ip_protocol = 6;
1931                 else
1932                         return -EINVAL;
1933                 en |= NTUPLE_FLTR_ALLOC_IN_EN_IP_PROTO;
1934                 break;
1935         default:
1936                 RTE_LOG(ERR, PMD, "invalid protocol mask.");
1937                 return -EINVAL;
1938         }
1939
1940         switch (nfilter->dst_ip_mask) {
1941         case UINT32_MAX:
1942                 bfilter->dst_ipaddr_mask[0] = -1;
1943                 bfilter->dst_ipaddr[0] = nfilter->dst_ip;
1944                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR |
1945                         NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR_MASK;
1946                 break;
1947         default:
1948                 RTE_LOG(ERR, PMD, "invalid dst_ip mask.");
1949                 return -EINVAL;
1950         }
1951
1952         switch (nfilter->src_ip_mask) {
1953         case UINT32_MAX:
1954                 bfilter->src_ipaddr_mask[0] = -1;
1955                 bfilter->src_ipaddr[0] = nfilter->src_ip;
1956                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR |
1957                         NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR_MASK;
1958                 break;
1959         default:
1960                 RTE_LOG(ERR, PMD, "invalid src_ip mask.");
1961                 return -EINVAL;
1962         }
1963
1964         switch (nfilter->src_port_mask) {
1965         case UINT16_MAX:
1966                 bfilter->src_port_mask = -1;
1967                 bfilter->src_port = nfilter->src_port;
1968                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT |
1969                         NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT_MASK;
1970                 break;
1971         default:
1972                 RTE_LOG(ERR, PMD, "invalid src_port mask.");
1973                 return -EINVAL;
1974         }
1975
1976         //TODO Priority
1977         //nfilter->priority = (uint8_t)filter->priority;
1978
1979         bfilter->enables = en;
1980         return 0;
1981 }
1982
1983 static struct bnxt_filter_info*
1984 bnxt_match_ntuple_filter(struct bnxt *bp,
1985                          struct bnxt_filter_info *bfilter,
1986                          struct bnxt_vnic_info **mvnic)
1987 {
1988         struct bnxt_filter_info *mfilter = NULL;
1989         int i;
1990
1991         for (i = bp->nr_vnics - 1; i >= 0; i--) {
1992                 struct bnxt_vnic_info *vnic = &bp->vnic_info[i];
1993                 STAILQ_FOREACH(mfilter, &vnic->filter, next) {
1994                         if (bfilter->src_ipaddr[0] == mfilter->src_ipaddr[0] &&
1995                             bfilter->src_ipaddr_mask[0] ==
1996                             mfilter->src_ipaddr_mask[0] &&
1997                             bfilter->src_port == mfilter->src_port &&
1998                             bfilter->src_port_mask == mfilter->src_port_mask &&
1999                             bfilter->dst_ipaddr[0] == mfilter->dst_ipaddr[0] &&
2000                             bfilter->dst_ipaddr_mask[0] ==
2001                             mfilter->dst_ipaddr_mask[0] &&
2002                             bfilter->dst_port == mfilter->dst_port &&
2003                             bfilter->dst_port_mask == mfilter->dst_port_mask &&
2004                             bfilter->flags == mfilter->flags &&
2005                             bfilter->enables == mfilter->enables) {
2006                                 if (mvnic)
2007                                         *mvnic = vnic;
2008                                 return mfilter;
2009                         }
2010                 }
2011         }
2012         return NULL;
2013 }
2014
2015 static int
2016 bnxt_cfg_ntuple_filter(struct bnxt *bp,
2017                        struct rte_eth_ntuple_filter *nfilter,
2018                        enum rte_filter_op filter_op)
2019 {
2020         struct bnxt_filter_info *bfilter, *mfilter, *filter1;
2021         struct bnxt_vnic_info *vnic, *vnic0, *mvnic;
2022         int ret;
2023
2024         if (nfilter->flags != RTE_5TUPLE_FLAGS) {
2025                 RTE_LOG(ERR, PMD, "only 5tuple is supported.");
2026                 return -EINVAL;
2027         }
2028
2029         if (nfilter->flags & RTE_NTUPLE_FLAGS_TCP_FLAG) {
2030                 RTE_LOG(ERR, PMD, "Ntuple filter: TCP flags not supported\n");
2031                 return -EINVAL;
2032         }
2033
2034         bfilter = bnxt_get_unused_filter(bp);
2035         if (bfilter == NULL) {
2036                 RTE_LOG(ERR, PMD,
2037                         "Not enough resources for a new filter.\n");
2038                 return -ENOMEM;
2039         }
2040         ret = parse_ntuple_filter(bp, nfilter, bfilter);
2041         if (ret < 0)
2042                 goto free_filter;
2043
2044         vnic = STAILQ_FIRST(&bp->ff_pool[nfilter->queue]);
2045         vnic0 = STAILQ_FIRST(&bp->ff_pool[0]);
2046         filter1 = STAILQ_FIRST(&vnic0->filter);
2047         if (filter1 == NULL) {
2048                 ret = -1;
2049                 goto free_filter;
2050         }
2051
2052         bfilter->dst_id = vnic->fw_vnic_id;
2053         bfilter->fw_l2_filter_id = filter1->fw_l2_filter_id;
2054         bfilter->enables |=
2055                 HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_L2_FILTER_ID;
2056         bfilter->ethertype = 0x800;
2057         bfilter->enables |= NTUPLE_FLTR_ALLOC_INPUT_EN_ETHERTYPE;
2058
2059         mfilter = bnxt_match_ntuple_filter(bp, bfilter, &mvnic);
2060
2061         if (mfilter != NULL && filter_op == RTE_ETH_FILTER_ADD &&
2062             bfilter->dst_id == mfilter->dst_id) {
2063                 RTE_LOG(ERR, PMD, "filter exists.\n");
2064                 ret = -EEXIST;
2065                 goto free_filter;
2066         } else if (mfilter != NULL && filter_op == RTE_ETH_FILTER_ADD &&
2067                    bfilter->dst_id != mfilter->dst_id) {
2068                 mfilter->dst_id = vnic->fw_vnic_id;
2069                 ret = bnxt_hwrm_set_ntuple_filter(bp, mfilter->dst_id, mfilter);
2070                 STAILQ_REMOVE(&mvnic->filter, mfilter, bnxt_filter_info, next);
2071                 STAILQ_INSERT_TAIL(&vnic->filter, mfilter, next);
2072                 RTE_LOG(ERR, PMD, "filter with matching pattern exists.\n");
2073                 RTE_LOG(ERR, PMD, " Updated it to the new destination queue\n");
2074                 goto free_filter;
2075         }
2076         if (mfilter == NULL && filter_op == RTE_ETH_FILTER_DELETE) {
2077                 RTE_LOG(ERR, PMD, "filter doesn't exist.");
2078                 ret = -ENOENT;
2079                 goto free_filter;
2080         }
2081
2082         if (filter_op == RTE_ETH_FILTER_ADD) {
2083                 bfilter->filter_type = HWRM_CFA_NTUPLE_FILTER;
2084                 ret = bnxt_hwrm_set_ntuple_filter(bp, bfilter->dst_id, bfilter);
2085                 if (ret)
2086                         goto free_filter;
2087                 STAILQ_INSERT_TAIL(&vnic->filter, bfilter, next);
2088         } else {
2089                 if (mfilter == NULL) {
2090                         /* This should not happen. But for Coverity! */
2091                         ret = -ENOENT;
2092                         goto free_filter;
2093                 }
2094                 ret = bnxt_hwrm_clear_ntuple_filter(bp, mfilter);
2095
2096                 STAILQ_REMOVE(&vnic->filter, mfilter, bnxt_filter_info, next);
2097                 bnxt_free_filter(bp, mfilter);
2098                 mfilter->fw_l2_filter_id = -1;
2099                 bnxt_free_filter(bp, bfilter);
2100                 bfilter->fw_l2_filter_id = -1;
2101         }
2102
2103         return 0;
2104 free_filter:
2105         bfilter->fw_l2_filter_id = -1;
2106         bnxt_free_filter(bp, bfilter);
2107         return ret;
2108 }
2109
2110 static int
2111 bnxt_ntuple_filter(struct rte_eth_dev *dev,
2112                         enum rte_filter_op filter_op,
2113                         void *arg)
2114 {
2115         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
2116         int ret;
2117
2118         if (filter_op == RTE_ETH_FILTER_NOP)
2119                 return 0;
2120
2121         if (arg == NULL) {
2122                 RTE_LOG(ERR, PMD, "arg shouldn't be NULL for operation %u.",
2123                             filter_op);
2124                 return -EINVAL;
2125         }
2126
2127         switch (filter_op) {
2128         case RTE_ETH_FILTER_ADD:
2129                 ret = bnxt_cfg_ntuple_filter(bp,
2130                         (struct rte_eth_ntuple_filter *)arg,
2131                         filter_op);
2132                 break;
2133         case RTE_ETH_FILTER_DELETE:
2134                 ret = bnxt_cfg_ntuple_filter(bp,
2135                         (struct rte_eth_ntuple_filter *)arg,
2136                         filter_op);
2137                 break;
2138         default:
2139                 RTE_LOG(ERR, PMD, "unsupported operation %u.", filter_op);
2140                 ret = -EINVAL;
2141                 break;
2142         }
2143         return ret;
2144 }
2145
2146 static int
2147 bnxt_parse_fdir_filter(struct bnxt *bp,
2148                        struct rte_eth_fdir_filter *fdir,
2149                        struct bnxt_filter_info *filter)
2150 {
2151         enum rte_fdir_mode fdir_mode =
2152                 bp->eth_dev->data->dev_conf.fdir_conf.mode;
2153         struct bnxt_vnic_info *vnic0, *vnic;
2154         struct bnxt_filter_info *filter1;
2155         uint32_t en = 0;
2156         int i;
2157
2158         if (fdir_mode == RTE_FDIR_MODE_PERFECT_TUNNEL)
2159                 return -EINVAL;
2160
2161         filter->l2_ovlan = fdir->input.flow_ext.vlan_tci;
2162         en |= EM_FLOW_ALLOC_INPUT_EN_OVLAN_VID;
2163
2164         switch (fdir->input.flow_type) {
2165         case RTE_ETH_FLOW_IPV4:
2166         case RTE_ETH_FLOW_NONFRAG_IPV4_OTHER:
2167                 /* FALLTHROUGH */
2168                 filter->src_ipaddr[0] = fdir->input.flow.ip4_flow.src_ip;
2169                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR;
2170                 filter->dst_ipaddr[0] = fdir->input.flow.ip4_flow.dst_ip;
2171                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR;
2172                 filter->ip_protocol = fdir->input.flow.ip4_flow.proto;
2173                 en |= NTUPLE_FLTR_ALLOC_IN_EN_IP_PROTO;
2174                 filter->ip_addr_type =
2175                         NTUPLE_FLTR_ALLOC_INPUT_IP_ADDR_TYPE_IPV4;
2176                 filter->src_ipaddr_mask[0] = 0xffffffff;
2177                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR_MASK;
2178                 filter->dst_ipaddr_mask[0] = 0xffffffff;
2179                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR_MASK;
2180                 filter->ethertype = 0x800;
2181                 filter->enables |= NTUPLE_FLTR_ALLOC_INPUT_EN_ETHERTYPE;
2182                 break;
2183         case RTE_ETH_FLOW_NONFRAG_IPV4_TCP:
2184                 filter->src_port = fdir->input.flow.tcp4_flow.src_port;
2185                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT;
2186                 filter->dst_port = fdir->input.flow.tcp4_flow.dst_port;
2187                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT;
2188                 filter->dst_port_mask = 0xffff;
2189                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT_MASK;
2190                 filter->src_port_mask = 0xffff;
2191                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT_MASK;
2192                 filter->src_ipaddr[0] = fdir->input.flow.tcp4_flow.ip.src_ip;
2193                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR;
2194                 filter->dst_ipaddr[0] = fdir->input.flow.tcp4_flow.ip.dst_ip;
2195                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR;
2196                 filter->ip_protocol = 6;
2197                 en |= NTUPLE_FLTR_ALLOC_IN_EN_IP_PROTO;
2198                 filter->ip_addr_type =
2199                         NTUPLE_FLTR_ALLOC_INPUT_IP_ADDR_TYPE_IPV4;
2200                 filter->src_ipaddr_mask[0] = 0xffffffff;
2201                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR_MASK;
2202                 filter->dst_ipaddr_mask[0] = 0xffffffff;
2203                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR_MASK;
2204                 filter->ethertype = 0x800;
2205                 filter->enables |= NTUPLE_FLTR_ALLOC_INPUT_EN_ETHERTYPE;
2206                 break;
2207         case RTE_ETH_FLOW_NONFRAG_IPV4_UDP:
2208                 filter->src_port = fdir->input.flow.udp4_flow.src_port;
2209                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT;
2210                 filter->dst_port = fdir->input.flow.udp4_flow.dst_port;
2211                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT;
2212                 filter->dst_port_mask = 0xffff;
2213                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT_MASK;
2214                 filter->src_port_mask = 0xffff;
2215                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT_MASK;
2216                 filter->src_ipaddr[0] = fdir->input.flow.udp4_flow.ip.src_ip;
2217                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR;
2218                 filter->dst_ipaddr[0] = fdir->input.flow.udp4_flow.ip.dst_ip;
2219                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR;
2220                 filter->ip_protocol = 17;
2221                 en |= NTUPLE_FLTR_ALLOC_IN_EN_IP_PROTO;
2222                 filter->ip_addr_type =
2223                         NTUPLE_FLTR_ALLOC_INPUT_IP_ADDR_TYPE_IPV4;
2224                 filter->src_ipaddr_mask[0] = 0xffffffff;
2225                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR_MASK;
2226                 filter->dst_ipaddr_mask[0] = 0xffffffff;
2227                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR_MASK;
2228                 filter->ethertype = 0x800;
2229                 filter->enables |= NTUPLE_FLTR_ALLOC_INPUT_EN_ETHERTYPE;
2230                 break;
2231         case RTE_ETH_FLOW_IPV6:
2232         case RTE_ETH_FLOW_NONFRAG_IPV6_OTHER:
2233                 /* FALLTHROUGH */
2234                 filter->ip_addr_type =
2235                         NTUPLE_FLTR_ALLOC_INPUT_IP_ADDR_TYPE_IPV6;
2236                 filter->ip_protocol = fdir->input.flow.ipv6_flow.proto;
2237                 en |= NTUPLE_FLTR_ALLOC_IN_EN_IP_PROTO;
2238                 rte_memcpy(filter->src_ipaddr,
2239                            fdir->input.flow.ipv6_flow.src_ip, 16);
2240                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR;
2241                 rte_memcpy(filter->dst_ipaddr,
2242                            fdir->input.flow.ipv6_flow.dst_ip, 16);
2243                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR;
2244                 memset(filter->dst_ipaddr_mask, 0xff, 16);
2245                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR_MASK;
2246                 memset(filter->src_ipaddr_mask, 0xff, 16);
2247                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR_MASK;
2248                 filter->ethertype = 0x86dd;
2249                 filter->enables |= NTUPLE_FLTR_ALLOC_INPUT_EN_ETHERTYPE;
2250                 break;
2251         case RTE_ETH_FLOW_NONFRAG_IPV6_TCP:
2252                 filter->src_port = fdir->input.flow.tcp6_flow.src_port;
2253                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT;
2254                 filter->dst_port = fdir->input.flow.tcp6_flow.dst_port;
2255                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT;
2256                 filter->dst_port_mask = 0xffff;
2257                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT_MASK;
2258                 filter->src_port_mask = 0xffff;
2259                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT_MASK;
2260                 filter->ip_addr_type =
2261                         NTUPLE_FLTR_ALLOC_INPUT_IP_ADDR_TYPE_IPV6;
2262                 filter->ip_protocol = fdir->input.flow.tcp6_flow.ip.proto;
2263                 en |= NTUPLE_FLTR_ALLOC_IN_EN_IP_PROTO;
2264                 rte_memcpy(filter->src_ipaddr,
2265                            fdir->input.flow.tcp6_flow.ip.src_ip, 16);
2266                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR;
2267                 rte_memcpy(filter->dst_ipaddr,
2268                            fdir->input.flow.tcp6_flow.ip.dst_ip, 16);
2269                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR;
2270                 memset(filter->dst_ipaddr_mask, 0xff, 16);
2271                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR_MASK;
2272                 memset(filter->src_ipaddr_mask, 0xff, 16);
2273                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR_MASK;
2274                 filter->ethertype = 0x86dd;
2275                 filter->enables |= NTUPLE_FLTR_ALLOC_INPUT_EN_ETHERTYPE;
2276                 break;
2277         case RTE_ETH_FLOW_NONFRAG_IPV6_UDP:
2278                 filter->src_port = fdir->input.flow.udp6_flow.src_port;
2279                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT;
2280                 filter->dst_port = fdir->input.flow.udp6_flow.dst_port;
2281                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT;
2282                 filter->dst_port_mask = 0xffff;
2283                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT_MASK;
2284                 filter->src_port_mask = 0xffff;
2285                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT_MASK;
2286                 filter->ip_addr_type =
2287                         NTUPLE_FLTR_ALLOC_INPUT_IP_ADDR_TYPE_IPV6;
2288                 filter->ip_protocol = fdir->input.flow.udp6_flow.ip.proto;
2289                 en |= NTUPLE_FLTR_ALLOC_IN_EN_IP_PROTO;
2290                 rte_memcpy(filter->src_ipaddr,
2291                            fdir->input.flow.udp6_flow.ip.src_ip, 16);
2292                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR;
2293                 rte_memcpy(filter->dst_ipaddr,
2294                            fdir->input.flow.udp6_flow.ip.dst_ip, 16);
2295                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR;
2296                 memset(filter->dst_ipaddr_mask, 0xff, 16);
2297                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR_MASK;
2298                 memset(filter->src_ipaddr_mask, 0xff, 16);
2299                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR_MASK;
2300                 filter->ethertype = 0x86dd;
2301                 filter->enables |= NTUPLE_FLTR_ALLOC_INPUT_EN_ETHERTYPE;
2302                 break;
2303         case RTE_ETH_FLOW_L2_PAYLOAD:
2304                 filter->ethertype = fdir->input.flow.l2_flow.ether_type;
2305                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_ETHERTYPE;
2306                 break;
2307         case RTE_ETH_FLOW_VXLAN:
2308                 if (fdir->action.behavior == RTE_ETH_FDIR_REJECT)
2309                         return -EINVAL;
2310                 filter->vni = fdir->input.flow.tunnel_flow.tunnel_id;
2311                 filter->tunnel_type =
2312                         CFA_NTUPLE_FILTER_ALLOC_REQ_TUNNEL_TYPE_VXLAN;
2313                 en |= HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_TUNNEL_TYPE;
2314                 break;
2315         case RTE_ETH_FLOW_NVGRE:
2316                 if (fdir->action.behavior == RTE_ETH_FDIR_REJECT)
2317                         return -EINVAL;
2318                 filter->vni = fdir->input.flow.tunnel_flow.tunnel_id;
2319                 filter->tunnel_type =
2320                         CFA_NTUPLE_FILTER_ALLOC_REQ_TUNNEL_TYPE_NVGRE;
2321                 en |= HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_TUNNEL_TYPE;
2322                 break;
2323         case RTE_ETH_FLOW_UNKNOWN:
2324         case RTE_ETH_FLOW_RAW:
2325         case RTE_ETH_FLOW_FRAG_IPV4:
2326         case RTE_ETH_FLOW_NONFRAG_IPV4_SCTP:
2327         case RTE_ETH_FLOW_FRAG_IPV6:
2328         case RTE_ETH_FLOW_NONFRAG_IPV6_SCTP:
2329         case RTE_ETH_FLOW_IPV6_EX:
2330         case RTE_ETH_FLOW_IPV6_TCP_EX:
2331         case RTE_ETH_FLOW_IPV6_UDP_EX:
2332         case RTE_ETH_FLOW_GENEVE:
2333                 /* FALLTHROUGH */
2334         default:
2335                 return -EINVAL;
2336         }
2337
2338         vnic0 = STAILQ_FIRST(&bp->ff_pool[0]);
2339         vnic = STAILQ_FIRST(&bp->ff_pool[fdir->action.rx_queue]);
2340         if (vnic == NULL) {
2341                 RTE_LOG(ERR, PMD, "Invalid queue %d\n", fdir->action.rx_queue);
2342                 return -EINVAL;
2343         }
2344
2345
2346         if (fdir_mode == RTE_FDIR_MODE_PERFECT_MAC_VLAN) {
2347                 rte_memcpy(filter->dst_macaddr,
2348                         fdir->input.flow.mac_vlan_flow.mac_addr.addr_bytes, 6);
2349                         en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_MACADDR;
2350         }
2351
2352         if (fdir->action.behavior == RTE_ETH_FDIR_REJECT) {
2353                 filter->flags = HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_FLAGS_DROP;
2354                 filter1 = STAILQ_FIRST(&vnic0->filter);
2355                 //filter1 = bnxt_get_l2_filter(bp, filter, vnic0);
2356         } else {
2357                 filter->dst_id = vnic->fw_vnic_id;
2358                 for (i = 0; i < ETHER_ADDR_LEN; i++)
2359                         if (filter->dst_macaddr[i] == 0x00)
2360                                 filter1 = STAILQ_FIRST(&vnic0->filter);
2361                         else
2362                                 filter1 = bnxt_get_l2_filter(bp, filter, vnic);
2363         }
2364
2365         if (filter1 == NULL)
2366                 return -EINVAL;
2367
2368         en |= HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_L2_FILTER_ID;
2369         filter->fw_l2_filter_id = filter1->fw_l2_filter_id;
2370
2371         filter->enables = en;
2372
2373         return 0;
2374 }
2375
2376 static struct bnxt_filter_info *
2377 bnxt_match_fdir(struct bnxt *bp, struct bnxt_filter_info *nf)
2378 {
2379         struct bnxt_filter_info *mf = NULL;
2380         int i;
2381
2382         for (i = bp->nr_vnics - 1; i >= 0; i--) {
2383                 struct bnxt_vnic_info *vnic = &bp->vnic_info[i];
2384
2385                 STAILQ_FOREACH(mf, &vnic->filter, next) {
2386                         if (mf->filter_type == nf->filter_type &&
2387                             mf->flags == nf->flags &&
2388                             mf->src_port == nf->src_port &&
2389                             mf->src_port_mask == nf->src_port_mask &&
2390                             mf->dst_port == nf->dst_port &&
2391                             mf->dst_port_mask == nf->dst_port_mask &&
2392                             mf->ip_protocol == nf->ip_protocol &&
2393                             mf->ip_addr_type == nf->ip_addr_type &&
2394                             mf->ethertype == nf->ethertype &&
2395                             mf->vni == nf->vni &&
2396                             mf->tunnel_type == nf->tunnel_type &&
2397                             mf->l2_ovlan == nf->l2_ovlan &&
2398                             mf->l2_ovlan_mask == nf->l2_ovlan_mask &&
2399                             mf->l2_ivlan == nf->l2_ivlan &&
2400                             mf->l2_ivlan_mask == nf->l2_ivlan_mask &&
2401                             !memcmp(mf->l2_addr, nf->l2_addr, ETHER_ADDR_LEN) &&
2402                             !memcmp(mf->l2_addr_mask, nf->l2_addr_mask,
2403                                     ETHER_ADDR_LEN) &&
2404                             !memcmp(mf->src_macaddr, nf->src_macaddr,
2405                                     ETHER_ADDR_LEN) &&
2406                             !memcmp(mf->dst_macaddr, nf->dst_macaddr,
2407                                     ETHER_ADDR_LEN) &&
2408                             !memcmp(mf->src_ipaddr, nf->src_ipaddr,
2409                                     sizeof(nf->src_ipaddr)) &&
2410                             !memcmp(mf->src_ipaddr_mask, nf->src_ipaddr_mask,
2411                                     sizeof(nf->src_ipaddr_mask)) &&
2412                             !memcmp(mf->dst_ipaddr, nf->dst_ipaddr,
2413                                     sizeof(nf->dst_ipaddr)) &&
2414                             !memcmp(mf->dst_ipaddr_mask, nf->dst_ipaddr_mask,
2415                                     sizeof(nf->dst_ipaddr_mask)))
2416                                 return mf;
2417                 }
2418         }
2419         return NULL;
2420 }
2421
2422 static int
2423 bnxt_fdir_filter(struct rte_eth_dev *dev,
2424                  enum rte_filter_op filter_op,
2425                  void *arg)
2426 {
2427         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
2428         struct rte_eth_fdir_filter *fdir  = (struct rte_eth_fdir_filter *)arg;
2429         struct bnxt_filter_info *filter, *match;
2430         struct bnxt_vnic_info *vnic;
2431         int ret = 0, i;
2432
2433         if (filter_op == RTE_ETH_FILTER_NOP)
2434                 return 0;
2435
2436         if (arg == NULL && filter_op != RTE_ETH_FILTER_FLUSH)
2437                 return -EINVAL;
2438
2439         switch (filter_op) {
2440         case RTE_ETH_FILTER_ADD:
2441         case RTE_ETH_FILTER_DELETE:
2442                 /* FALLTHROUGH */
2443                 filter = bnxt_get_unused_filter(bp);
2444                 if (filter == NULL) {
2445                         RTE_LOG(ERR, PMD,
2446                                 "Not enough resources for a new flow.\n");
2447                         return -ENOMEM;
2448                 }
2449
2450                 ret = bnxt_parse_fdir_filter(bp, fdir, filter);
2451                 if (ret != 0)
2452                         goto free_filter;
2453                 filter->filter_type = HWRM_CFA_NTUPLE_FILTER;
2454
2455                 match = bnxt_match_fdir(bp, filter);
2456                 if (match != NULL && filter_op == RTE_ETH_FILTER_ADD) {
2457                         RTE_LOG(ERR, PMD, "Flow already exists.\n");
2458                         ret = -EEXIST;
2459                         goto free_filter;
2460                 }
2461                 if (match == NULL && filter_op == RTE_ETH_FILTER_DELETE) {
2462                         RTE_LOG(ERR, PMD, "Flow does not exist.\n");
2463                         ret = -ENOENT;
2464                         goto free_filter;
2465                 }
2466
2467                 if (fdir->action.behavior == RTE_ETH_FDIR_REJECT)
2468                         vnic = STAILQ_FIRST(&bp->ff_pool[0]);
2469                 else
2470                         vnic =
2471                         STAILQ_FIRST(&bp->ff_pool[fdir->action.rx_queue]);
2472
2473                 if (filter_op == RTE_ETH_FILTER_ADD) {
2474                         ret = bnxt_hwrm_set_ntuple_filter(bp,
2475                                                           filter->dst_id,
2476                                                           filter);
2477                         if (ret)
2478                                 goto free_filter;
2479                         STAILQ_INSERT_TAIL(&vnic->filter, filter, next);
2480                 } else {
2481                         ret = bnxt_hwrm_clear_ntuple_filter(bp, match);
2482                         STAILQ_REMOVE(&vnic->filter, match,
2483                                       bnxt_filter_info, next);
2484                         bnxt_free_filter(bp, match);
2485                         filter->fw_l2_filter_id = -1;
2486                         bnxt_free_filter(bp, filter);
2487                 }
2488                 break;
2489         case RTE_ETH_FILTER_FLUSH:
2490                 for (i = bp->nr_vnics - 1; i >= 0; i--) {
2491                         struct bnxt_vnic_info *vnic = &bp->vnic_info[i];
2492
2493                         STAILQ_FOREACH(filter, &vnic->filter, next) {
2494                                 if (filter->filter_type ==
2495                                     HWRM_CFA_NTUPLE_FILTER) {
2496                                         ret =
2497                                         bnxt_hwrm_clear_ntuple_filter(bp,
2498                                                                       filter);
2499                                         STAILQ_REMOVE(&vnic->filter, filter,
2500                                                       bnxt_filter_info, next);
2501                                 }
2502                         }
2503                 }
2504                 return ret;
2505         case RTE_ETH_FILTER_UPDATE:
2506         case RTE_ETH_FILTER_STATS:
2507         case RTE_ETH_FILTER_INFO:
2508                 /* FALLTHROUGH */
2509                 RTE_LOG(ERR, PMD, "operation %u not implemented", filter_op);
2510                 break;
2511         default:
2512                 RTE_LOG(ERR, PMD, "unknown operation %u", filter_op);
2513                 ret = -EINVAL;
2514                 break;
2515         }
2516         return ret;
2517
2518 free_filter:
2519         filter->fw_l2_filter_id = -1;
2520         bnxt_free_filter(bp, filter);
2521         return ret;
2522 }
2523
2524 static int
2525 bnxt_filter_ctrl_op(struct rte_eth_dev *dev __rte_unused,
2526                     enum rte_filter_type filter_type,
2527                     enum rte_filter_op filter_op, void *arg)
2528 {
2529         int ret = 0;
2530
2531         switch (filter_type) {
2532         case RTE_ETH_FILTER_TUNNEL:
2533                 RTE_LOG(ERR, PMD,
2534                         "filter type: %d: To be implemented\n", filter_type);
2535                 break;
2536         case RTE_ETH_FILTER_FDIR:
2537                 ret = bnxt_fdir_filter(dev, filter_op, arg);
2538                 break;
2539         case RTE_ETH_FILTER_NTUPLE:
2540                 ret = bnxt_ntuple_filter(dev, filter_op, arg);
2541                 break;
2542         case RTE_ETH_FILTER_ETHERTYPE:
2543                 ret = bnxt_ethertype_filter(dev, filter_op, arg);
2544                 break;
2545         case RTE_ETH_FILTER_GENERIC:
2546                 if (filter_op != RTE_ETH_FILTER_GET)
2547                         return -EINVAL;
2548                 *(const void **)arg = &bnxt_flow_ops;
2549                 break;
2550         default:
2551                 RTE_LOG(ERR, PMD,
2552                         "Filter type (%d) not supported", filter_type);
2553                 ret = -EINVAL;
2554                 break;
2555         }
2556         return ret;
2557 }
2558
2559 static const uint32_t *
2560 bnxt_dev_supported_ptypes_get_op(struct rte_eth_dev *dev)
2561 {
2562         static const uint32_t ptypes[] = {
2563                 RTE_PTYPE_L2_ETHER_VLAN,
2564                 RTE_PTYPE_L3_IPV4_EXT_UNKNOWN,
2565                 RTE_PTYPE_L3_IPV6_EXT_UNKNOWN,
2566                 RTE_PTYPE_L4_ICMP,
2567                 RTE_PTYPE_L4_TCP,
2568                 RTE_PTYPE_L4_UDP,
2569                 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN,
2570                 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN,
2571                 RTE_PTYPE_INNER_L4_ICMP,
2572                 RTE_PTYPE_INNER_L4_TCP,
2573                 RTE_PTYPE_INNER_L4_UDP,
2574                 RTE_PTYPE_UNKNOWN
2575         };
2576
2577         if (dev->rx_pkt_burst == bnxt_recv_pkts)
2578                 return ptypes;
2579         return NULL;
2580 }
2581
2582
2583
2584 static int
2585 bnxt_get_eeprom_length_op(struct rte_eth_dev *dev)
2586 {
2587         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
2588         int rc;
2589         uint32_t dir_entries;
2590         uint32_t entry_length;
2591
2592         RTE_LOG(INFO, PMD, "%s(): %04x:%02x:%02x:%02x\n",
2593                 __func__, bp->pdev->addr.domain, bp->pdev->addr.bus,
2594                 bp->pdev->addr.devid, bp->pdev->addr.function);
2595
2596         rc = bnxt_hwrm_nvm_get_dir_info(bp, &dir_entries, &entry_length);
2597         if (rc != 0)
2598                 return rc;
2599
2600         return dir_entries * entry_length;
2601 }
2602
2603 static int
2604 bnxt_get_eeprom_op(struct rte_eth_dev *dev,
2605                 struct rte_dev_eeprom_info *in_eeprom)
2606 {
2607         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
2608         uint32_t index;
2609         uint32_t offset;
2610
2611         RTE_LOG(INFO, PMD, "%s(): %04x:%02x:%02x:%02x in_eeprom->offset = %d "
2612                 "len = %d\n", __func__, bp->pdev->addr.domain,
2613                 bp->pdev->addr.bus, bp->pdev->addr.devid,
2614                 bp->pdev->addr.function, in_eeprom->offset, in_eeprom->length);
2615
2616         if (in_eeprom->offset == 0) /* special offset value to get directory */
2617                 return bnxt_get_nvram_directory(bp, in_eeprom->length,
2618                                                 in_eeprom->data);
2619
2620         index = in_eeprom->offset >> 24;
2621         offset = in_eeprom->offset & 0xffffff;
2622
2623         if (index != 0)
2624                 return bnxt_hwrm_get_nvram_item(bp, index - 1, offset,
2625                                            in_eeprom->length, in_eeprom->data);
2626
2627         return 0;
2628 }
2629
2630 static bool bnxt_dir_type_is_ape_bin_format(uint16_t dir_type)
2631 {
2632         switch (dir_type) {
2633         case BNX_DIR_TYPE_CHIMP_PATCH:
2634         case BNX_DIR_TYPE_BOOTCODE:
2635         case BNX_DIR_TYPE_BOOTCODE_2:
2636         case BNX_DIR_TYPE_APE_FW:
2637         case BNX_DIR_TYPE_APE_PATCH:
2638         case BNX_DIR_TYPE_KONG_FW:
2639         case BNX_DIR_TYPE_KONG_PATCH:
2640         case BNX_DIR_TYPE_BONO_FW:
2641         case BNX_DIR_TYPE_BONO_PATCH:
2642                 return true;
2643         }
2644
2645         return false;
2646 }
2647
2648 static bool bnxt_dir_type_is_other_exec_format(uint16_t dir_type)
2649 {
2650         switch (dir_type) {
2651         case BNX_DIR_TYPE_AVS:
2652         case BNX_DIR_TYPE_EXP_ROM_MBA:
2653         case BNX_DIR_TYPE_PCIE:
2654         case BNX_DIR_TYPE_TSCF_UCODE:
2655         case BNX_DIR_TYPE_EXT_PHY:
2656         case BNX_DIR_TYPE_CCM:
2657         case BNX_DIR_TYPE_ISCSI_BOOT:
2658         case BNX_DIR_TYPE_ISCSI_BOOT_IPV6:
2659         case BNX_DIR_TYPE_ISCSI_BOOT_IPV4N6:
2660                 return true;
2661         }
2662
2663         return false;
2664 }
2665
2666 static bool bnxt_dir_type_is_executable(uint16_t dir_type)
2667 {
2668         return bnxt_dir_type_is_ape_bin_format(dir_type) ||
2669                 bnxt_dir_type_is_other_exec_format(dir_type);
2670 }
2671
2672 static int
2673 bnxt_set_eeprom_op(struct rte_eth_dev *dev,
2674                 struct rte_dev_eeprom_info *in_eeprom)
2675 {
2676         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
2677         uint8_t index, dir_op;
2678         uint16_t type, ext, ordinal, attr;
2679
2680         RTE_LOG(INFO, PMD, "%s(): %04x:%02x:%02x:%02x in_eeprom->offset = %d "
2681                 "len = %d\n", __func__, bp->pdev->addr.domain,
2682                 bp->pdev->addr.bus, bp->pdev->addr.devid,
2683                 bp->pdev->addr.function, in_eeprom->offset, in_eeprom->length);
2684
2685         if (!BNXT_PF(bp)) {
2686                 RTE_LOG(ERR, PMD, "NVM write not supported from a VF\n");
2687                 return -EINVAL;
2688         }
2689
2690         type = in_eeprom->magic >> 16;
2691
2692         if (type == 0xffff) { /* special value for directory operations */
2693                 index = in_eeprom->magic & 0xff;
2694                 dir_op = in_eeprom->magic >> 8;
2695                 if (index == 0)
2696                         return -EINVAL;
2697                 switch (dir_op) {
2698                 case 0x0e: /* erase */
2699                         if (in_eeprom->offset != ~in_eeprom->magic)
2700                                 return -EINVAL;
2701                         return bnxt_hwrm_erase_nvram_directory(bp, index - 1);
2702                 default:
2703                         return -EINVAL;
2704                 }
2705         }
2706
2707         /* Create or re-write an NVM item: */
2708         if (bnxt_dir_type_is_executable(type) == true)
2709                 return -EOPNOTSUPP;
2710         ext = in_eeprom->magic & 0xffff;
2711         ordinal = in_eeprom->offset >> 16;
2712         attr = in_eeprom->offset & 0xffff;
2713
2714         return bnxt_hwrm_flash_nvram(bp, type, ordinal, ext, attr,
2715                                      in_eeprom->data, in_eeprom->length);
2716         return 0;
2717 }
2718
2719 /*
2720  * Initialization
2721  */
2722
2723 static const struct eth_dev_ops bnxt_dev_ops = {
2724         .dev_infos_get = bnxt_dev_info_get_op,
2725         .dev_close = bnxt_dev_close_op,
2726         .dev_configure = bnxt_dev_configure_op,
2727         .dev_start = bnxt_dev_start_op,
2728         .dev_stop = bnxt_dev_stop_op,
2729         .dev_set_link_up = bnxt_dev_set_link_up_op,
2730         .dev_set_link_down = bnxt_dev_set_link_down_op,
2731         .stats_get = bnxt_stats_get_op,
2732         .stats_reset = bnxt_stats_reset_op,
2733         .rx_queue_setup = bnxt_rx_queue_setup_op,
2734         .rx_queue_release = bnxt_rx_queue_release_op,
2735         .tx_queue_setup = bnxt_tx_queue_setup_op,
2736         .tx_queue_release = bnxt_tx_queue_release_op,
2737         .rx_queue_intr_enable = bnxt_rx_queue_intr_enable_op,
2738         .rx_queue_intr_disable = bnxt_rx_queue_intr_disable_op,
2739         .reta_update = bnxt_reta_update_op,
2740         .reta_query = bnxt_reta_query_op,
2741         .rss_hash_update = bnxt_rss_hash_update_op,
2742         .rss_hash_conf_get = bnxt_rss_hash_conf_get_op,
2743         .link_update = bnxt_link_update_op,
2744         .promiscuous_enable = bnxt_promiscuous_enable_op,
2745         .promiscuous_disable = bnxt_promiscuous_disable_op,
2746         .allmulticast_enable = bnxt_allmulticast_enable_op,
2747         .allmulticast_disable = bnxt_allmulticast_disable_op,
2748         .mac_addr_add = bnxt_mac_addr_add_op,
2749         .mac_addr_remove = bnxt_mac_addr_remove_op,
2750         .flow_ctrl_get = bnxt_flow_ctrl_get_op,
2751         .flow_ctrl_set = bnxt_flow_ctrl_set_op,
2752         .udp_tunnel_port_add  = bnxt_udp_tunnel_port_add_op,
2753         .udp_tunnel_port_del  = bnxt_udp_tunnel_port_del_op,
2754         .vlan_filter_set = bnxt_vlan_filter_set_op,
2755         .vlan_offload_set = bnxt_vlan_offload_set_op,
2756         .vlan_pvid_set = bnxt_vlan_pvid_set_op,
2757         .mtu_set = bnxt_mtu_set_op,
2758         .mac_addr_set = bnxt_set_default_mac_addr_op,
2759         .xstats_get = bnxt_dev_xstats_get_op,
2760         .xstats_get_names = bnxt_dev_xstats_get_names_op,
2761         .xstats_reset = bnxt_dev_xstats_reset_op,
2762         .fw_version_get = bnxt_fw_version_get,
2763         .set_mc_addr_list = bnxt_dev_set_mc_addr_list_op,
2764         .rxq_info_get = bnxt_rxq_info_get_op,
2765         .txq_info_get = bnxt_txq_info_get_op,
2766         .dev_led_on = bnxt_dev_led_on_op,
2767         .dev_led_off = bnxt_dev_led_off_op,
2768         .xstats_get_by_id = bnxt_dev_xstats_get_by_id_op,
2769         .xstats_get_names_by_id = bnxt_dev_xstats_get_names_by_id_op,
2770         .rx_queue_count = bnxt_rx_queue_count_op,
2771         .rx_descriptor_status = bnxt_rx_descriptor_status_op,
2772         .tx_descriptor_status = bnxt_tx_descriptor_status_op,
2773         .filter_ctrl = bnxt_filter_ctrl_op,
2774         .dev_supported_ptypes_get = bnxt_dev_supported_ptypes_get_op,
2775         .get_eeprom_length    = bnxt_get_eeprom_length_op,
2776         .get_eeprom           = bnxt_get_eeprom_op,
2777         .set_eeprom           = bnxt_set_eeprom_op,
2778 };
2779
2780 static bool bnxt_vf_pciid(uint16_t id)
2781 {
2782         if (id == BROADCOM_DEV_ID_57304_VF ||
2783             id == BROADCOM_DEV_ID_57406_VF ||
2784             id == BROADCOM_DEV_ID_5731X_VF ||
2785             id == BROADCOM_DEV_ID_5741X_VF ||
2786             id == BROADCOM_DEV_ID_57414_VF ||
2787             id == BROADCOM_DEV_ID_STRATUS_NIC_VF)
2788                 return true;
2789         return false;
2790 }
2791
2792 static int bnxt_init_board(struct rte_eth_dev *eth_dev)
2793 {
2794         struct bnxt *bp = eth_dev->data->dev_private;
2795         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
2796         int rc;
2797
2798         /* enable device (incl. PCI PM wakeup), and bus-mastering */
2799         if (!pci_dev->mem_resource[0].addr) {
2800                 RTE_LOG(ERR, PMD,
2801                         "Cannot find PCI device base address, aborting\n");
2802                 rc = -ENODEV;
2803                 goto init_err_disable;
2804         }
2805
2806         bp->eth_dev = eth_dev;
2807         bp->pdev = pci_dev;
2808
2809         bp->bar0 = (void *)pci_dev->mem_resource[0].addr;
2810         if (!bp->bar0) {
2811                 RTE_LOG(ERR, PMD, "Cannot map device registers, aborting\n");
2812                 rc = -ENOMEM;
2813                 goto init_err_release;
2814         }
2815         return 0;
2816
2817 init_err_release:
2818         if (bp->bar0)
2819                 bp->bar0 = NULL;
2820
2821 init_err_disable:
2822
2823         return rc;
2824 }
2825
2826 static int bnxt_dev_uninit(struct rte_eth_dev *eth_dev);
2827
2828 #define ALLOW_FUNC(x)   \
2829         { \
2830                 typeof(x) arg = (x); \
2831                 bp->pf.vf_req_fwd[((arg) >> 5)] &= \
2832                 ~rte_cpu_to_le_32(1 << ((arg) & 0x1f)); \
2833         }
2834 static int
2835 bnxt_dev_init(struct rte_eth_dev *eth_dev)
2836 {
2837         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
2838         char mz_name[RTE_MEMZONE_NAMESIZE];
2839         const struct rte_memzone *mz = NULL;
2840         static int version_printed;
2841         uint32_t total_alloc_len;
2842         rte_iova_t mz_phys_addr;
2843         struct bnxt *bp;
2844         int rc;
2845
2846         if (version_printed++ == 0)
2847                 RTE_LOG(INFO, PMD, "%s\n", bnxt_version);
2848
2849         rte_eth_copy_pci_info(eth_dev, pci_dev);
2850
2851         bp = eth_dev->data->dev_private;
2852
2853         rte_atomic64_init(&bp->rx_mbuf_alloc_fail);
2854         bp->dev_stopped = 1;
2855
2856         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
2857                 goto skip_init;
2858
2859         if (bnxt_vf_pciid(pci_dev->id.device_id))
2860                 bp->flags |= BNXT_FLAG_VF;
2861
2862         rc = bnxt_init_board(eth_dev);
2863         if (rc) {
2864                 RTE_LOG(ERR, PMD,
2865                         "Board initialization failed rc: %x\n", rc);
2866                 goto error;
2867         }
2868 skip_init:
2869         eth_dev->dev_ops = &bnxt_dev_ops;
2870         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
2871                 return 0;
2872         eth_dev->rx_pkt_burst = &bnxt_recv_pkts;
2873         eth_dev->tx_pkt_burst = &bnxt_xmit_pkts;
2874
2875         if (BNXT_PF(bp) && pci_dev->id.device_id != BROADCOM_DEV_ID_NS2) {
2876                 snprintf(mz_name, RTE_MEMZONE_NAMESIZE,
2877                          "bnxt_%04x:%02x:%02x:%02x-%s", pci_dev->addr.domain,
2878                          pci_dev->addr.bus, pci_dev->addr.devid,
2879                          pci_dev->addr.function, "rx_port_stats");
2880                 mz_name[RTE_MEMZONE_NAMESIZE - 1] = 0;
2881                 mz = rte_memzone_lookup(mz_name);
2882                 total_alloc_len = RTE_CACHE_LINE_ROUNDUP(
2883                                 sizeof(struct rx_port_stats) + 512);
2884                 if (!mz) {
2885                         mz = rte_memzone_reserve(mz_name, total_alloc_len,
2886                                                  SOCKET_ID_ANY,
2887                                                  RTE_MEMZONE_2MB |
2888                                                  RTE_MEMZONE_SIZE_HINT_ONLY);
2889                         if (mz == NULL)
2890                                 return -ENOMEM;
2891                 }
2892                 memset(mz->addr, 0, mz->len);
2893                 mz_phys_addr = mz->iova;
2894                 if ((unsigned long)mz->addr == mz_phys_addr) {
2895                         RTE_LOG(WARNING, PMD,
2896                                 "Memzone physical address same as virtual.\n");
2897                         RTE_LOG(WARNING, PMD,
2898                                 "Using rte_mem_virt2iova()\n");
2899                         mz_phys_addr = rte_mem_virt2iova(mz->addr);
2900                         if (mz_phys_addr == 0) {
2901                                 RTE_LOG(ERR, PMD,
2902                                 "unable to map address to physical memory\n");
2903                                 return -ENOMEM;
2904                         }
2905                 }
2906
2907                 bp->rx_mem_zone = (const void *)mz;
2908                 bp->hw_rx_port_stats = mz->addr;
2909                 bp->hw_rx_port_stats_map = mz_phys_addr;
2910
2911                 snprintf(mz_name, RTE_MEMZONE_NAMESIZE,
2912                          "bnxt_%04x:%02x:%02x:%02x-%s", pci_dev->addr.domain,
2913                          pci_dev->addr.bus, pci_dev->addr.devid,
2914                          pci_dev->addr.function, "tx_port_stats");
2915                 mz_name[RTE_MEMZONE_NAMESIZE - 1] = 0;
2916                 mz = rte_memzone_lookup(mz_name);
2917                 total_alloc_len = RTE_CACHE_LINE_ROUNDUP(
2918                                 sizeof(struct tx_port_stats) + 512);
2919                 if (!mz) {
2920                         mz = rte_memzone_reserve(mz_name, total_alloc_len,
2921                                                  SOCKET_ID_ANY,
2922                                                  RTE_MEMZONE_2MB |
2923                                                  RTE_MEMZONE_SIZE_HINT_ONLY);
2924                         if (mz == NULL)
2925                                 return -ENOMEM;
2926                 }
2927                 memset(mz->addr, 0, mz->len);
2928                 mz_phys_addr = mz->iova;
2929                 if ((unsigned long)mz->addr == mz_phys_addr) {
2930                         RTE_LOG(WARNING, PMD,
2931                                 "Memzone physical address same as virtual.\n");
2932                         RTE_LOG(WARNING, PMD,
2933                                 "Using rte_mem_virt2iova()\n");
2934                         mz_phys_addr = rte_mem_virt2iova(mz->addr);
2935                         if (mz_phys_addr == 0) {
2936                                 RTE_LOG(ERR, PMD,
2937                                 "unable to map address to physical memory\n");
2938                                 return -ENOMEM;
2939                         }
2940                 }
2941
2942                 bp->tx_mem_zone = (const void *)mz;
2943                 bp->hw_tx_port_stats = mz->addr;
2944                 bp->hw_tx_port_stats_map = mz_phys_addr;
2945
2946                 bp->flags |= BNXT_FLAG_PORT_STATS;
2947         }
2948
2949         rc = bnxt_alloc_hwrm_resources(bp);
2950         if (rc) {
2951                 RTE_LOG(ERR, PMD,
2952                         "hwrm resource allocation failure rc: %x\n", rc);
2953                 goto error_free;
2954         }
2955         rc = bnxt_hwrm_ver_get(bp);
2956         if (rc)
2957                 goto error_free;
2958         bnxt_hwrm_queue_qportcfg(bp);
2959
2960         bnxt_hwrm_func_qcfg(bp);
2961
2962         /* Get the MAX capabilities for this function */
2963         rc = bnxt_hwrm_func_qcaps(bp);
2964         if (rc) {
2965                 RTE_LOG(ERR, PMD, "hwrm query capability failure rc: %x\n", rc);
2966                 goto error_free;
2967         }
2968         if (bp->max_tx_rings == 0) {
2969                 RTE_LOG(ERR, PMD, "No TX rings available!\n");
2970                 rc = -EBUSY;
2971                 goto error_free;
2972         }
2973         eth_dev->data->mac_addrs = rte_zmalloc("bnxt_mac_addr_tbl",
2974                                         ETHER_ADDR_LEN * bp->max_l2_ctx, 0);
2975         if (eth_dev->data->mac_addrs == NULL) {
2976                 RTE_LOG(ERR, PMD,
2977                         "Failed to alloc %u bytes needed to store MAC addr tbl",
2978                         ETHER_ADDR_LEN * bp->max_l2_ctx);
2979                 rc = -ENOMEM;
2980                 goto error_free;
2981         }
2982         /* Copy the permanent MAC from the qcap response address now. */
2983         memcpy(bp->mac_addr, bp->dflt_mac_addr, sizeof(bp->mac_addr));
2984         memcpy(&eth_dev->data->mac_addrs[0], bp->mac_addr, ETHER_ADDR_LEN);
2985
2986         if (bp->max_ring_grps < bp->rx_cp_nr_rings) {
2987                 /* 1 ring is for default completion ring */
2988                 RTE_LOG(ERR, PMD, "Insufficient resource: Ring Group\n");
2989                 rc = -ENOSPC;
2990                 goto error_free;
2991         }
2992
2993         bp->grp_info = rte_zmalloc("bnxt_grp_info",
2994                                 sizeof(*bp->grp_info) * bp->max_ring_grps, 0);
2995         if (!bp->grp_info) {
2996                 RTE_LOG(ERR, PMD,
2997                         "Failed to alloc %zu bytes to store group info table\n",
2998                         sizeof(*bp->grp_info) * bp->max_ring_grps);
2999                 rc = -ENOMEM;
3000                 goto error_free;
3001         }
3002
3003         /* Forward all requests if firmware is new enough */
3004         if (((bp->fw_ver >= ((20 << 24) | (6 << 16) | (100 << 8))) &&
3005             (bp->fw_ver < ((20 << 24) | (7 << 16)))) ||
3006             ((bp->fw_ver >= ((20 << 24) | (8 << 16))))) {
3007                 memset(bp->pf.vf_req_fwd, 0xff, sizeof(bp->pf.vf_req_fwd));
3008         } else {
3009                 RTE_LOG(WARNING, PMD,
3010                         "Firmware too old for VF mailbox functionality\n");
3011                 memset(bp->pf.vf_req_fwd, 0, sizeof(bp->pf.vf_req_fwd));
3012         }
3013
3014         /*
3015          * The following are used for driver cleanup.  If we disallow these,
3016          * VF drivers can't clean up cleanly.
3017          */
3018         ALLOW_FUNC(HWRM_FUNC_DRV_UNRGTR);
3019         ALLOW_FUNC(HWRM_VNIC_FREE);
3020         ALLOW_FUNC(HWRM_RING_FREE);
3021         ALLOW_FUNC(HWRM_RING_GRP_FREE);
3022         ALLOW_FUNC(HWRM_VNIC_RSS_COS_LB_CTX_FREE);
3023         ALLOW_FUNC(HWRM_CFA_L2_FILTER_FREE);
3024         ALLOW_FUNC(HWRM_STAT_CTX_FREE);
3025         ALLOW_FUNC(HWRM_PORT_PHY_QCFG);
3026         ALLOW_FUNC(HWRM_VNIC_TPA_CFG);
3027         rc = bnxt_hwrm_func_driver_register(bp);
3028         if (rc) {
3029                 RTE_LOG(ERR, PMD,
3030                         "Failed to register driver");
3031                 rc = -EBUSY;
3032                 goto error_free;
3033         }
3034
3035         RTE_LOG(INFO, PMD,
3036                 DRV_MODULE_NAME " found at mem %" PRIx64 ", node addr %pM\n",
3037                 pci_dev->mem_resource[0].phys_addr,
3038                 pci_dev->mem_resource[0].addr);
3039
3040         rc = bnxt_hwrm_func_reset(bp);
3041         if (rc) {
3042                 RTE_LOG(ERR, PMD, "hwrm chip reset failure rc: %x\n", rc);
3043                 rc = -1;
3044                 goto error_free;
3045         }
3046
3047         if (BNXT_PF(bp)) {
3048                 //if (bp->pf.active_vfs) {
3049                         // TODO: Deallocate VF resources?
3050                 //}
3051                 if (bp->pdev->max_vfs) {
3052                         rc = bnxt_hwrm_allocate_vfs(bp, bp->pdev->max_vfs);
3053                         if (rc) {
3054                                 RTE_LOG(ERR, PMD, "Failed to allocate VFs\n");
3055                                 goto error_free;
3056                         }
3057                 } else {
3058                         rc = bnxt_hwrm_allocate_pf_only(bp);
3059                         if (rc) {
3060                                 RTE_LOG(ERR, PMD,
3061                                         "Failed to allocate PF resources\n");
3062                                 goto error_free;
3063                         }
3064                 }
3065         }
3066
3067         bnxt_hwrm_port_led_qcaps(bp);
3068
3069         rc = bnxt_setup_int(bp);
3070         if (rc)
3071                 goto error_free;
3072
3073         rc = bnxt_alloc_mem(bp);
3074         if (rc)
3075                 goto error_free_int;
3076
3077         rc = bnxt_request_int(bp);
3078         if (rc)
3079                 goto error_free_int;
3080
3081         rc = bnxt_alloc_def_cp_ring(bp);
3082         if (rc)
3083                 goto error_free_int;
3084
3085         bnxt_enable_int(bp);
3086         bnxt_init_nic(bp);
3087
3088         return 0;
3089
3090 error_free_int:
3091         bnxt_disable_int(bp);
3092         bnxt_free_def_cp_ring(bp);
3093         bnxt_hwrm_func_buf_unrgtr(bp);
3094         bnxt_free_int(bp);
3095         bnxt_free_mem(bp);
3096 error_free:
3097         bnxt_dev_uninit(eth_dev);
3098 error:
3099         return rc;
3100 }
3101
3102 static int
3103 bnxt_dev_uninit(struct rte_eth_dev *eth_dev) {
3104         struct bnxt *bp = eth_dev->data->dev_private;
3105         int rc;
3106
3107         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
3108                 return -EPERM;
3109
3110         bnxt_disable_int(bp);
3111         bnxt_free_int(bp);
3112         bnxt_free_mem(bp);
3113         if (eth_dev->data->mac_addrs != NULL) {
3114                 rte_free(eth_dev->data->mac_addrs);
3115                 eth_dev->data->mac_addrs = NULL;
3116         }
3117         if (bp->grp_info != NULL) {
3118                 rte_free(bp->grp_info);
3119                 bp->grp_info = NULL;
3120         }
3121         rc = bnxt_hwrm_func_driver_unregister(bp, 0);
3122         bnxt_free_hwrm_resources(bp);
3123         rte_memzone_free((const struct rte_memzone *)bp->tx_mem_zone);
3124         rte_memzone_free((const struct rte_memzone *)bp->rx_mem_zone);
3125         if (bp->dev_stopped == 0)
3126                 bnxt_dev_close_op(eth_dev);
3127         if (bp->pf.vf_info)
3128                 rte_free(bp->pf.vf_info);
3129         eth_dev->dev_ops = NULL;
3130         eth_dev->rx_pkt_burst = NULL;
3131         eth_dev->tx_pkt_burst = NULL;
3132
3133         return rc;
3134 }
3135
3136 static int bnxt_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
3137         struct rte_pci_device *pci_dev)
3138 {
3139         return rte_eth_dev_pci_generic_probe(pci_dev, sizeof(struct bnxt),
3140                 bnxt_dev_init);
3141 }
3142
3143 static int bnxt_pci_remove(struct rte_pci_device *pci_dev)
3144 {
3145         return rte_eth_dev_pci_generic_remove(pci_dev, bnxt_dev_uninit);
3146 }
3147
3148 static struct rte_pci_driver bnxt_rte_pmd = {
3149         .id_table = bnxt_pci_id_map,
3150         .drv_flags = RTE_PCI_DRV_NEED_MAPPING |
3151                 RTE_PCI_DRV_INTR_LSC,
3152         .probe = bnxt_pci_probe,
3153         .remove = bnxt_pci_remove,
3154 };
3155
3156 static bool
3157 is_device_supported(struct rte_eth_dev *dev, struct rte_pci_driver *drv)
3158 {
3159         if (strcmp(dev->device->driver->name, drv->driver.name))
3160                 return false;
3161
3162         return true;
3163 }
3164
3165 bool is_bnxt_supported(struct rte_eth_dev *dev)
3166 {
3167         return is_device_supported(dev, &bnxt_rte_pmd);
3168 }
3169
3170 RTE_PMD_REGISTER_PCI(net_bnxt, bnxt_rte_pmd);
3171 RTE_PMD_REGISTER_PCI_TABLE(net_bnxt, bnxt_pci_id_map);
3172 RTE_PMD_REGISTER_KMOD_DEP(net_bnxt, "* igb_uio | uio_pci_generic | vfio-pci");