drivers/net/bnxt/bnxt_ethdev.c

   1 /*-
   2  *   BSD LICENSE
   3  *
   4  *   Copyright(c) Broadcom Limited.
   5  *   All rights reserved.
   6  *
   7  *   Redistribution and use in source and binary forms, with or without
   8  *   modification, are permitted provided that the following conditions
   9  *   are met:
  10  *
  11  *     * Redistributions of source code must retain the above copyright
  12  *       notice, this list of conditions and the following disclaimer.
  13  *     * Redistributions in binary form must reproduce the above copyright
  14  *       notice, this list of conditions and the following disclaimer in
  15  *       the documentation and/or other materials provided with the
  16  *       distribution.
  17  *     * Neither the name of Broadcom Corporation nor the names of its
  18  *       contributors may be used to endorse or promote products derived
  19  *       from this software without specific prior written permission.
  20  *
  21  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  22  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  23  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  24  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  25  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  26  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  27  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  28  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  29  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32  */
  33
  34 #include <inttypes.h>
  35 #include <stdbool.h>
  36
  37 #include <rte_dev.h>
  38 #include <rte_ethdev.h>
  39 #include <rte_malloc.h>
  40 #include <rte_cycles.h>
  41
  42 #include "bnxt.h"
  43 #include "bnxt_cpr.h"
  44 #include "bnxt_filter.h"
  45 #include "bnxt_hwrm.h"
  46 #include "bnxt_irq.h"
  47 #include "bnxt_ring.h"
  48 #include "bnxt_rxq.h"
  49 #include "bnxt_rxr.h"
  50 #include "bnxt_stats.h"
  51 #include "bnxt_txq.h"
  52 #include "bnxt_txr.h"
  53 #include "bnxt_vnic.h"
  54 #include "hsi_struct_def_dpdk.h"
  55
  56 #define DRV_MODULE_NAME         "bnxt"
  57 static const char bnxt_version[] =
  58         "Broadcom Cumulus driver " DRV_MODULE_NAME "\n";
  59
  60 #define PCI_VENDOR_ID_BROADCOM 0x14E4
  61
  62 #define BROADCOM_DEV_ID_57301 0x16c8
  63 #define BROADCOM_DEV_ID_57302 0x16c9
  64 #define BROADCOM_DEV_ID_57304_PF 0x16ca
  65 #define BROADCOM_DEV_ID_57304_VF 0x16cb
  66 #define BROADCOM_DEV_ID_57417_MF 0x16cc
  67 #define BROADCOM_DEV_ID_NS2 0x16cd
  68 #define BROADCOM_DEV_ID_57311 0x16ce
  69 #define BROADCOM_DEV_ID_57312 0x16cf
  70 #define BROADCOM_DEV_ID_57402 0x16d0
  71 #define BROADCOM_DEV_ID_57404 0x16d1
  72 #define BROADCOM_DEV_ID_57406_PF 0x16d2
  73 #define BROADCOM_DEV_ID_57406_VF 0x16d3
  74 #define BROADCOM_DEV_ID_57402_MF 0x16d4
  75 #define BROADCOM_DEV_ID_57407_RJ45 0x16d5
  76 #define BROADCOM_DEV_ID_57412 0x16d6
  77 #define BROADCOM_DEV_ID_57414 0x16d7
  78 #define BROADCOM_DEV_ID_57416_RJ45 0x16d8
  79 #define BROADCOM_DEV_ID_57417_RJ45 0x16d9
  80 #define BROADCOM_DEV_ID_5741X_VF 0x16dc
  81 #define BROADCOM_DEV_ID_57412_MF 0x16de
  82 #define BROADCOM_DEV_ID_57314 0x16df
  83 #define BROADCOM_DEV_ID_57317_RJ45 0x16e0
  84 #define BROADCOM_DEV_ID_5731X_VF 0x16e1
  85 #define BROADCOM_DEV_ID_57417_SFP 0x16e2
  86 #define BROADCOM_DEV_ID_57416_SFP 0x16e3
  87 #define BROADCOM_DEV_ID_57317_SFP 0x16e4
  88 #define BROADCOM_DEV_ID_57404_MF 0x16e7
  89 #define BROADCOM_DEV_ID_57406_MF 0x16e8
  90 #define BROADCOM_DEV_ID_57407_SFP 0x16e9
  91 #define BROADCOM_DEV_ID_57407_MF 0x16ea
  92 #define BROADCOM_DEV_ID_57414_MF 0x16ec
  93 #define BROADCOM_DEV_ID_57416_MF 0x16ee
  94
  95 static struct rte_pci_id bnxt_pci_id_map[] = {
  96         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57301) },
  97         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57302) },
  98         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57304_PF) },
  99         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57304_VF) },
 100         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_NS2) },
 101         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57402) },
 102         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57404) },
 103         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57406_PF) },
 104         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57406_VF) },
 105         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57402_MF) },
 106         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57407_RJ45) },
 107         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57404_MF) },
 108         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57406_MF) },
 109         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57407_SFP) },
 110         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57407_MF) },
 111         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_5741X_VF) },
 112         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_5731X_VF) },
 113         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57314) },
 114         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57417_MF) },
 115         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57311) },
 116         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57312) },
 117         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57412) },
 118         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57414) },
 119         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57416_RJ45) },
 120         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57417_RJ45) },
 121         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57412_MF) },
 122         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57317_RJ45) },
 123         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57417_SFP) },
 124         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57416_SFP) },
 125         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57317_SFP) },
 126         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57414_MF) },
 127         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57416_MF) },
 128         { .vendor_id = 0, /* sentinel */ },
 129 };
 130
 131 #define BNXT_ETH_RSS_SUPPORT (  \
 132         ETH_RSS_IPV4 |          \
 133         ETH_RSS_NONFRAG_IPV4_TCP |      \
 134         ETH_RSS_NONFRAG_IPV4_UDP |      \
 135         ETH_RSS_IPV6 |          \
 136         ETH_RSS_NONFRAG_IPV6_TCP |      \
 137         ETH_RSS_NONFRAG_IPV6_UDP)
 138
 139 static void bnxt_print_link_info(struct rte_eth_dev *eth_dev);
 140
 141 /***********************/
 142
 143 /*
 144  * High level utility functions
 145  */
 146
 147 static void bnxt_free_mem(struct bnxt *bp)
 148 {
 149         bnxt_free_filter_mem(bp);
 150         bnxt_free_vnic_attributes(bp);
 151         bnxt_free_vnic_mem(bp);
 152
 153         bnxt_free_stats(bp);
 154         bnxt_free_tx_rings(bp);
 155         bnxt_free_rx_rings(bp);
 156         bnxt_free_def_cp_ring(bp);
 157 }
 158
 159 static int bnxt_alloc_mem(struct bnxt *bp)
 160 {
 161         int rc;
 162
 163         /* Default completion ring */
 164         rc = bnxt_init_def_ring_struct(bp, SOCKET_ID_ANY);
 165         if (rc)
 166                 goto alloc_mem_err;
 167
 168         rc = bnxt_alloc_rings(bp, 0, NULL, NULL,
 169                               bp->def_cp_ring, "def_cp");
 170         if (rc)
 171                 goto alloc_mem_err;
 172
 173         rc = bnxt_alloc_vnic_mem(bp);
 174         if (rc)
 175                 goto alloc_mem_err;
 176
 177         rc = bnxt_alloc_vnic_attributes(bp);
 178         if (rc)
 179                 goto alloc_mem_err;
 180
 181         rc = bnxt_alloc_filter_mem(bp);
 182         if (rc)
 183                 goto alloc_mem_err;
 184
 185         return 0;
 186
 187 alloc_mem_err:
 188         bnxt_free_mem(bp);
 189         return rc;
 190 }
 191
 192 static int bnxt_init_chip(struct bnxt *bp)
 193 {
 194         unsigned int i, rss_idx, fw_idx;
 195         struct rte_eth_link new;
 196         int rc;
 197
 198         rc = bnxt_alloc_all_hwrm_stat_ctxs(bp);
 199         if (rc) {
 200                 RTE_LOG(ERR, PMD, "HWRM stat ctx alloc failure rc: %x\n", rc);
 201                 goto err_out;
 202         }
 203
 204         rc = bnxt_alloc_hwrm_rings(bp);
 205         if (rc) {
 206                 RTE_LOG(ERR, PMD, "HWRM ring alloc failure rc: %x\n", rc);
 207                 goto err_out;
 208         }
 209
 210         rc = bnxt_alloc_all_hwrm_ring_grps(bp);
 211         if (rc) {
 212                 RTE_LOG(ERR, PMD, "HWRM ring grp alloc failure: %x\n", rc);
 213                 goto err_out;
 214         }
 215
 216         rc = bnxt_mq_rx_configure(bp);
 217         if (rc) {
 218                 RTE_LOG(ERR, PMD, "MQ mode configure failure rc: %x\n", rc);
 219                 goto err_out;
 220         }
 221
 222         /* VNIC configuration */
 223         for (i = 0; i < bp->nr_vnics; i++) {
 224                 struct bnxt_vnic_info *vnic = &bp->vnic_info[i];
 225
 226                 rc = bnxt_hwrm_vnic_alloc(bp, vnic);
 227                 if (rc) {
 228                         RTE_LOG(ERR, PMD, "HWRM vnic alloc failure rc: %x\n",
 229                                 rc);
 230                         goto err_out;
 231                 }
 232
 233                 rc = bnxt_hwrm_vnic_ctx_alloc(bp, vnic);
 234                 if (rc) {
 235                         RTE_LOG(ERR, PMD,
 236                                 "HWRM vnic ctx alloc failure rc: %x\n", rc);
 237                         goto err_out;
 238                 }
 239
 240                 rc = bnxt_hwrm_vnic_cfg(bp, vnic);
 241                 if (rc) {
 242                         RTE_LOG(ERR, PMD, "HWRM vnic cfg failure rc: %x\n", rc);
 243                         goto err_out;
 244                 }
 245
 246                 rc = bnxt_set_hwrm_vnic_filters(bp, vnic);
 247                 if (rc) {
 248                         RTE_LOG(ERR, PMD, "HWRM vnic filter failure rc: %x\n",
 249                                 rc);
 250                         goto err_out;
 251                 }
 252                 if (vnic->rss_table && vnic->hash_type) {
 253                         /*
 254                          * Fill the RSS hash & redirection table with
 255                          * ring group ids for all VNICs
 256                          */
 257                         for (rss_idx = 0, fw_idx = 0;
 258                              rss_idx < HW_HASH_INDEX_SIZE;
 259                              rss_idx++, fw_idx++) {
 260                                 if (vnic->fw_grp_ids[fw_idx] ==
 261                                     INVALID_HW_RING_ID)
 262                                         fw_idx = 0;
 263                                 vnic->rss_table[rss_idx] =
 264                                                 vnic->fw_grp_ids[fw_idx];
 265                         }
 266                         rc = bnxt_hwrm_vnic_rss_cfg(bp, vnic);
 267                         if (rc) {
 268                                 RTE_LOG(ERR, PMD,
 269                                         "HWRM vnic set RSS failure rc: %x\n",
 270                                         rc);
 271                                 goto err_out;
 272                         }
 273                 }
 274         }
 275         rc = bnxt_hwrm_cfa_l2_set_rx_mask(bp, &bp->vnic_info[0]);
 276         if (rc) {
 277                 RTE_LOG(ERR, PMD,
 278                         "HWRM cfa l2 rx mask failure rc: %x\n", rc);
 279                 goto err_out;
 280         }
 281
 282         rc = bnxt_get_hwrm_link_config(bp, &new);
 283         if (rc) {
 284                 RTE_LOG(ERR, PMD, "HWRM Get link config failure rc: %x\n", rc);
 285                 goto err_out;
 286         }
 287
 288         if (!bp->link_info.link_up) {
 289                 rc = bnxt_set_hwrm_link_config(bp, true);
 290                 if (rc) {
 291                         RTE_LOG(ERR, PMD,
 292                                 "HWRM link config failure rc: %x\n", rc);
 293                         goto err_out;
 294                 }
 295         }
 296         bnxt_print_link_info(bp->eth_dev);
 297
 298         return 0;
 299
 300 err_out:
 301         bnxt_free_all_hwrm_resources(bp);
 302
 303         return rc;
 304 }
 305
 306 static int bnxt_shutdown_nic(struct bnxt *bp)
 307 {
 308         bnxt_free_all_hwrm_resources(bp);
 309         bnxt_free_all_filters(bp);
 310         bnxt_free_all_vnics(bp);
 311         return 0;
 312 }
 313
 314 static int bnxt_init_nic(struct bnxt *bp)
 315 {
 316         int rc;
 317
 318         rc = bnxt_init_ring_grps(bp);
 319         if (rc)
 320                 return rc;
 321         bnxt_init_vnics(bp);
 322         bnxt_init_filters(bp);
 323
 324         rc = bnxt_init_chip(bp);
 325         if (rc)
 326                 return rc;
 327
 328         return 0;
 329 }
 330
 331 /*
 332  * Device configuration and status function
 333  */
 334
 335 static void bnxt_dev_info_get_op(struct rte_eth_dev *eth_dev,
 336                                   struct rte_eth_dev_info *dev_info)
 337 {
 338         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 339         uint16_t max_vnics, i, j, vpool, vrxq;
 340
 341         /* MAC Specifics */
 342         dev_info->max_mac_addrs = MAX_NUM_MAC_ADDR;
 343         dev_info->max_hash_mac_addrs = 0;
 344
 345         /* PF/VF specifics */
 346         if (BNXT_PF(bp)) {
 347                 dev_info->max_rx_queues = bp->pf.max_rx_rings;
 348                 dev_info->max_tx_queues = bp->pf.max_tx_rings;
 349                 dev_info->max_vfs = bp->pf.active_vfs;
 350                 dev_info->reta_size = bp->pf.max_rsscos_ctx;
 351                 max_vnics = bp->pf.max_vnics;
 352         } else {
 353                 dev_info->max_rx_queues = bp->vf.max_rx_rings;
 354                 dev_info->max_tx_queues = bp->vf.max_tx_rings;
 355                 dev_info->reta_size = bp->vf.max_rsscos_ctx;
 356                 max_vnics = bp->vf.max_vnics;
 357         }
 358
 359         /* Fast path specifics */
 360         dev_info->min_rx_bufsize = 1;
 361         dev_info->max_rx_pktlen = BNXT_MAX_MTU + ETHER_HDR_LEN + ETHER_CRC_LEN
 362                                   + VLAN_TAG_SIZE;
 363         dev_info->rx_offload_capa = DEV_RX_OFFLOAD_VLAN_STRIP |
 364                                         DEV_RX_OFFLOAD_IPV4_CKSUM |
 365                                         DEV_RX_OFFLOAD_UDP_CKSUM |
 366                                         DEV_RX_OFFLOAD_TCP_CKSUM |
 367                                         DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM;
 368         dev_info->tx_offload_capa = DEV_TX_OFFLOAD_VLAN_INSERT |
 369                                         DEV_TX_OFFLOAD_IPV4_CKSUM |
 370                                         DEV_TX_OFFLOAD_TCP_CKSUM |
 371                                         DEV_TX_OFFLOAD_UDP_CKSUM |
 372                                         DEV_TX_OFFLOAD_TCP_TSO;
 373
 374         /* *INDENT-OFF* */
 375         dev_info->default_rxconf = (struct rte_eth_rxconf) {
 376                 .rx_thresh = {
 377                         .pthresh = 8,
 378                         .hthresh = 8,
 379                         .wthresh = 0,
 380                 },
 381                 .rx_free_thresh = 32,
 382                 .rx_drop_en = 0,
 383         };
 384
 385         dev_info->default_txconf = (struct rte_eth_txconf) {
 386                 .tx_thresh = {
 387                         .pthresh = 32,
 388                         .hthresh = 0,
 389                         .wthresh = 0,
 390                 },
 391                 .tx_free_thresh = 32,
 392                 .tx_rs_thresh = 32,
 393                 .txq_flags = ETH_TXQ_FLAGS_NOMULTSEGS |
 394                              ETH_TXQ_FLAGS_NOOFFLOADS,
 395         };
 396         eth_dev->data->dev_conf.intr_conf.lsc = 1;
 397
 398         /* *INDENT-ON* */
 399
 400         /*
 401          * TODO: default_rxconf, default_txconf, rx_desc_lim, and tx_desc_lim
 402          *       need further investigation.
 403          */
 404
 405         /* VMDq resources */
 406         vpool = 64; /* ETH_64_POOLS */
 407         vrxq = 128; /* ETH_VMDQ_DCB_NUM_QUEUES */
 408         for (i = 0; i < 4; vpool >>= 1, i++) {
 409                 if (max_vnics > vpool) {
 410                         for (j = 0; j < 5; vrxq >>= 1, j++) {
 411                                 if (dev_info->max_rx_queues > vrxq) {
 412                                         if (vpool > vrxq)
 413                                                 vpool = vrxq;
 414                                         goto found;
 415                                 }
 416                         }
 417                         /* Not enough resources to support VMDq */
 418                         break;
 419                 }
 420         }
 421         /* Not enough resources to support VMDq */
 422         vpool = 0;
 423         vrxq = 0;
 424 found:
 425         dev_info->max_vmdq_pools = vpool;
 426         dev_info->vmdq_queue_num = vrxq;
 427
 428         dev_info->vmdq_pool_base = 0;
 429         dev_info->vmdq_queue_base = 0;
 430 }
 431
 432 /* Configure the device based on the configuration provided */
 433 static int bnxt_dev_configure_op(struct rte_eth_dev *eth_dev)
 434 {
 435         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 436
 437         bp->rx_queues = (void *)eth_dev->data->rx_queues;
 438         bp->tx_queues = (void *)eth_dev->data->tx_queues;
 439
 440         /* Inherit new configurations */
 441         bp->rx_nr_rings = eth_dev->data->nb_rx_queues;
 442         bp->tx_nr_rings = eth_dev->data->nb_tx_queues;
 443         bp->rx_cp_nr_rings = bp->rx_nr_rings;
 444         bp->tx_cp_nr_rings = bp->tx_nr_rings;
 445
 446         if (eth_dev->data->dev_conf.rxmode.jumbo_frame)
 447                 eth_dev->data->mtu =
 448                                 eth_dev->data->dev_conf.rxmode.max_rx_pkt_len -
 449                                 ETHER_HDR_LEN - ETHER_CRC_LEN - VLAN_TAG_SIZE;
 450         return 0;
 451 }
 452
 453 static void bnxt_print_link_info(struct rte_eth_dev *eth_dev)
 454 {
 455         struct rte_eth_link *link = &eth_dev->data->dev_link;
 456
 457         if (link->link_status)
 458                 RTE_LOG(INFO, PMD, "Port %d Link Up - speed %u Mbps - %s\n",
 459                         (uint8_t)(eth_dev->data->port_id),
 460                         (uint32_t)link->link_speed,
 461                         (link->link_duplex == ETH_LINK_FULL_DUPLEX) ?
 462                         ("full-duplex") : ("half-duplex\n"));
 463         else
 464                 RTE_LOG(INFO, PMD, "Port %d Link Down\n",
 465                         (uint8_t)(eth_dev->data->port_id));
 466 }
 467
 468 static int bnxt_dev_lsc_intr_setup(struct rte_eth_dev *eth_dev)
 469 {
 470         bnxt_print_link_info(eth_dev);
 471         return 0;
 472 }
 473
 474 static int bnxt_dev_start_op(struct rte_eth_dev *eth_dev)
 475 {
 476         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 477         int rc;
 478
 479         bp->dev_stopped = 0;
 480         rc = bnxt_hwrm_func_reset(bp);
 481         if (rc) {
 482                 RTE_LOG(ERR, PMD, "hwrm chip reset failure rc: %x\n", rc);
 483                 rc = -1;
 484                 goto error;
 485         }
 486
 487         rc = bnxt_setup_int(bp);
 488         if (rc)
 489                 goto error;
 490
 491         rc = bnxt_alloc_mem(bp);
 492         if (rc)
 493                 goto error;
 494
 495         rc = bnxt_request_int(bp);
 496         if (rc)
 497                 goto error;
 498
 499         rc = bnxt_init_nic(bp);
 500         if (rc)
 501                 goto error;
 502
 503         bnxt_enable_int(bp);
 504
 505         bnxt_link_update_op(eth_dev, 1);
 506         return 0;
 507
 508 error:
 509         bnxt_shutdown_nic(bp);
 510         bnxt_disable_int(bp);
 511         bnxt_free_int(bp);
 512         bnxt_free_tx_mbufs(bp);
 513         bnxt_free_rx_mbufs(bp);
 514         bnxt_free_mem(bp);
 515         return rc;
 516 }
 517
 518 static int bnxt_dev_set_link_up_op(struct rte_eth_dev *eth_dev)
 519 {
 520         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 521         int rc = 0;
 522
 523         if (!bp->link_info.link_up)
 524                 rc = bnxt_set_hwrm_link_config(bp, true);
 525         if (!rc)
 526                 eth_dev->data->dev_link.link_status = 1;
 527
 528         bnxt_print_link_info(eth_dev);
 529         return 0;
 530 }
 531
 532 static int bnxt_dev_set_link_down_op(struct rte_eth_dev *eth_dev)
 533 {
 534         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 535
 536         eth_dev->data->dev_link.link_status = 0;
 537         bnxt_set_hwrm_link_config(bp, false);
 538         bp->link_info.link_up = 0;
 539
 540         return 0;
 541 }
 542
 543 /* Unload the driver, release resources */
 544 static void bnxt_dev_stop_op(struct rte_eth_dev *eth_dev)
 545 {
 546         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 547
 548         if (bp->eth_dev->data->dev_started) {
 549                 /* TBD: STOP HW queues DMA */
 550                 eth_dev->data->dev_link.link_status = 0;
 551         }
 552         bnxt_set_hwrm_link_config(bp, false);
 553         bnxt_disable_int(bp);
 554         bnxt_free_int(bp);
 555         bnxt_shutdown_nic(bp);
 556         bp->dev_stopped = 1;
 557 }
 558
 559 static void bnxt_dev_close_op(struct rte_eth_dev *eth_dev)
 560 {
 561         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 562
 563         if (bp->dev_stopped == 0)
 564                 bnxt_dev_stop_op(eth_dev);
 565
 566         bnxt_free_tx_mbufs(bp);
 567         bnxt_free_rx_mbufs(bp);
 568         bnxt_free_mem(bp);
 569         if (eth_dev->data->mac_addrs != NULL) {
 570                 rte_free(eth_dev->data->mac_addrs);
 571                 eth_dev->data->mac_addrs = NULL;
 572         }
 573         if (bp->grp_info != NULL) {
 574                 rte_free(bp->grp_info);
 575                 bp->grp_info = NULL;
 576         }
 577 }
 578
 579 static void bnxt_mac_addr_remove_op(struct rte_eth_dev *eth_dev,
 580                                     uint32_t index)
 581 {
 582         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 583         uint64_t pool_mask = eth_dev->data->mac_pool_sel[index];
 584         struct bnxt_vnic_info *vnic;
 585         struct bnxt_filter_info *filter, *temp_filter;
 586         uint32_t pool = RTE_MIN(MAX_FF_POOLS, ETH_64_POOLS);
 587         uint32_t i;
 588
 589         /*
 590          * Loop through all VNICs from the specified filter flow pools to
 591          * remove the corresponding MAC addr filter
 592          */
 593         for (i = 0; i < pool; i++) {
 594                 if (!(pool_mask & (1ULL << i)))
 595                         continue;
 596
 597                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
 598                         filter = STAILQ_FIRST(&vnic->filter);
 599                         while (filter) {
 600                                 temp_filter = STAILQ_NEXT(filter, next);
 601                                 if (filter->mac_index == index) {
 602                                         STAILQ_REMOVE(&vnic->filter, filter,
 603                                                       bnxt_filter_info, next);
 604                                         bnxt_hwrm_clear_filter(bp, filter);
 605                                         filter->mac_index = INVALID_MAC_INDEX;
 606                                         memset(&filter->l2_addr, 0,
 607                                                ETHER_ADDR_LEN);
 608                                         STAILQ_INSERT_TAIL(
 609                                                         &bp->free_filter_list,
 610                                                         filter, next);
 611                                 }
 612                                 filter = temp_filter;
 613                         }
 614                 }
 615         }
 616 }
 617
 618 static void bnxt_mac_addr_add_op(struct rte_eth_dev *eth_dev,
 619                                  struct ether_addr *mac_addr,
 620                                  uint32_t index, uint32_t pool)
 621 {
 622         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 623         struct bnxt_vnic_info *vnic = STAILQ_FIRST(&bp->ff_pool[pool]);
 624         struct bnxt_filter_info *filter;
 625
 626         if (BNXT_VF(bp)) {
 627                 RTE_LOG(ERR, PMD, "Cannot add MAC address to a VF interface\n");
 628                 return;
 629         }
 630
 631         if (!vnic) {
 632                 RTE_LOG(ERR, PMD, "VNIC not found for pool %d!\n", pool);
 633                 return;
 634         }
 635         /* Attach requested MAC address to the new l2_filter */
 636         STAILQ_FOREACH(filter, &vnic->filter, next) {
 637                 if (filter->mac_index == index) {
 638                         RTE_LOG(ERR, PMD,
 639                                 "MAC addr already existed for pool %d\n", pool);
 640                         return;
 641                 }
 642         }
 643         filter = bnxt_alloc_filter(bp);
 644         if (!filter) {
 645                 RTE_LOG(ERR, PMD, "L2 filter alloc failed\n");
 646                 return;
 647         }
 648         STAILQ_INSERT_TAIL(&vnic->filter, filter, next);
 649         filter->mac_index = index;
 650         memcpy(filter->l2_addr, mac_addr, ETHER_ADDR_LEN);
 651         bnxt_hwrm_set_filter(bp, vnic, filter);
 652 }
 653
 654 int bnxt_link_update_op(struct rte_eth_dev *eth_dev, int wait_to_complete)
 655 {
 656         int rc = 0;
 657         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 658         struct rte_eth_link new;
 659         unsigned int cnt = BNXT_LINK_WAIT_CNT;
 660
 661         memset(&new, 0, sizeof(new));
 662         do {
 663                 /* Retrieve link info from hardware */
 664                 rc = bnxt_get_hwrm_link_config(bp, &new);
 665                 if (rc) {
 666                         new.link_speed = ETH_LINK_SPEED_100M;
 667                         new.link_duplex = ETH_LINK_FULL_DUPLEX;
 668                         RTE_LOG(ERR, PMD,
 669                                 "Failed to retrieve link rc = 0x%x!", rc);
 670                         goto out;
 671                 }
 672                 rte_delay_ms(BNXT_LINK_WAIT_INTERVAL);
 673
 674                 if (!wait_to_complete)
 675                         break;
 676         } while (!new.link_status && cnt--);
 677
 678 out:
 679         /* Timed out or success */
 680         if (new.link_status != eth_dev->data->dev_link.link_status ||
 681         new.link_speed != eth_dev->data->dev_link.link_speed) {
 682                 memcpy(&eth_dev->data->dev_link, &new,
 683                         sizeof(struct rte_eth_link));
 684                 bnxt_print_link_info(eth_dev);
 685         }
 686
 687         return rc;
 688 }
 689
 690 static void bnxt_promiscuous_enable_op(struct rte_eth_dev *eth_dev)
 691 {
 692         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 693         struct bnxt_vnic_info *vnic;
 694
 695         if (bp->vnic_info == NULL)
 696                 return;
 697
 698         vnic = &bp->vnic_info[0];
 699
 700         vnic->flags |= BNXT_VNIC_INFO_PROMISC;
 701         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic);
 702 }
 703
 704 static void bnxt_promiscuous_disable_op(struct rte_eth_dev *eth_dev)
 705 {
 706         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 707         struct bnxt_vnic_info *vnic;
 708
 709         if (bp->vnic_info == NULL)
 710                 return;
 711
 712         vnic = &bp->vnic_info[0];
 713
 714         vnic->flags &= ~BNXT_VNIC_INFO_PROMISC;
 715         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic);
 716 }
 717
 718 static void bnxt_allmulticast_enable_op(struct rte_eth_dev *eth_dev)
 719 {
 720         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 721         struct bnxt_vnic_info *vnic;
 722
 723         if (bp->vnic_info == NULL)
 724                 return;
 725
 726         vnic = &bp->vnic_info[0];
 727
 728         vnic->flags |= BNXT_VNIC_INFO_ALLMULTI;
 729         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic);
 730 }
 731
 732 static void bnxt_allmulticast_disable_op(struct rte_eth_dev *eth_dev)
 733 {
 734         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 735         struct bnxt_vnic_info *vnic;
 736
 737         if (bp->vnic_info == NULL)
 738                 return;
 739
 740         vnic = &bp->vnic_info[0];
 741
 742         vnic->flags &= ~BNXT_VNIC_INFO_ALLMULTI;
 743         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic);
 744 }
 745
 746 static int bnxt_reta_update_op(struct rte_eth_dev *eth_dev,
 747                             struct rte_eth_rss_reta_entry64 *reta_conf,
 748                             uint16_t reta_size)
 749 {
 750         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 751         struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
 752         struct bnxt_vnic_info *vnic;
 753         int i;
 754
 755         if (!(dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG))
 756                 return -EINVAL;
 757
 758         if (reta_size != HW_HASH_INDEX_SIZE) {
 759                 RTE_LOG(ERR, PMD, "The configured hash table lookup size "
 760                         "(%d) must equal the size supported by the hardware "
 761                         "(%d)\n", reta_size, HW_HASH_INDEX_SIZE);
 762                 return -EINVAL;
 763         }
 764         /* Update the RSS VNIC(s) */
 765         for (i = 0; i < MAX_FF_POOLS; i++) {
 766                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
 767                         memcpy(vnic->rss_table, reta_conf, reta_size);
 768
 769                         bnxt_hwrm_vnic_rss_cfg(bp, vnic);
 770                 }
 771         }
 772         return 0;
 773 }
 774
 775 static int bnxt_reta_query_op(struct rte_eth_dev *eth_dev,
 776                               struct rte_eth_rss_reta_entry64 *reta_conf,
 777                               uint16_t reta_size)
 778 {
 779         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 780         struct bnxt_vnic_info *vnic = &bp->vnic_info[0];
 781
 782         /* Retrieve from the default VNIC */
 783         if (!vnic)
 784                 return -EINVAL;
 785         if (!vnic->rss_table)
 786                 return -EINVAL;
 787
 788         if (reta_size != HW_HASH_INDEX_SIZE) {
 789                 RTE_LOG(ERR, PMD, "The configured hash table lookup size "
 790                         "(%d) must equal the size supported by the hardware "
 791                         "(%d)\n", reta_size, HW_HASH_INDEX_SIZE);
 792                 return -EINVAL;
 793         }
 794         /* EW - need to revisit here copying from u64 to u16 */
 795         memcpy(reta_conf, vnic->rss_table, reta_size);
 796
 797         if (rte_intr_allow_others(&eth_dev->pci_dev->intr_handle)) {
 798                 if (eth_dev->data->dev_conf.intr_conf.lsc != 0)
 799                         bnxt_dev_lsc_intr_setup(eth_dev);
 800         }
 801
 802         return 0;
 803 }
 804
 805 static int bnxt_rss_hash_update_op(struct rte_eth_dev *eth_dev,
 806                                    struct rte_eth_rss_conf *rss_conf)
 807 {
 808         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 809         struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
 810         struct bnxt_vnic_info *vnic;
 811         uint16_t hash_type = 0;
 812         int i;
 813
 814         /*
 815          * If RSS enablement were different than dev_configure,
 816          * then return -EINVAL
 817          */
 818         if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) {
 819                 if (!rss_conf->rss_hf)
 820                         return -EINVAL;
 821         } else {
 822                 if (rss_conf->rss_hf & BNXT_ETH_RSS_SUPPORT)
 823                         return -EINVAL;
 824         }
 825         if (rss_conf->rss_hf & ETH_RSS_IPV4)
 826                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4;
 827         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV4_TCP)
 828                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4;
 829         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV4_UDP)
 830                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4;
 831         if (rss_conf->rss_hf & ETH_RSS_IPV6)
 832                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6;
 833         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV6_TCP)
 834                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6;
 835         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV6_UDP)
 836                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6;
 837
 838         /* Update the RSS VNIC(s) */
 839         for (i = 0; i < MAX_FF_POOLS; i++) {
 840                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
 841                         vnic->hash_type = hash_type;
 842
 843                         /*
 844                          * Use the supplied key if the key length is
 845                          * acceptable and the rss_key is not NULL
 846                          */
 847                         if (rss_conf->rss_key &&
 848                             rss_conf->rss_key_len <= HW_HASH_KEY_SIZE)
 849                                 memcpy(vnic->rss_hash_key, rss_conf->rss_key,
 850                                        rss_conf->rss_key_len);
 851
 852                         bnxt_hwrm_vnic_rss_cfg(bp, vnic);
 853                 }
 854         }
 855         return 0;
 856 }
 857
 858 static int bnxt_rss_hash_conf_get_op(struct rte_eth_dev *eth_dev,
 859                                      struct rte_eth_rss_conf *rss_conf)
 860 {
 861         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 862         struct bnxt_vnic_info *vnic = &bp->vnic_info[0];
 863         int len;
 864         uint32_t hash_types;
 865
 866         /* RSS configuration is the same for all VNICs */
 867         if (vnic && vnic->rss_hash_key) {
 868                 if (rss_conf->rss_key) {
 869                         len = rss_conf->rss_key_len <= HW_HASH_KEY_SIZE ?
 870                               rss_conf->rss_key_len : HW_HASH_KEY_SIZE;
 871                         memcpy(rss_conf->rss_key, vnic->rss_hash_key, len);
 872                 }
 873
 874                 hash_types = vnic->hash_type;
 875                 rss_conf->rss_hf = 0;
 876                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4) {
 877                         rss_conf->rss_hf |= ETH_RSS_IPV4;
 878                         hash_types &= ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4;
 879                 }
 880                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4) {
 881                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV4_TCP;
 882                         hash_types &=
 883                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4;
 884                 }
 885                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4) {
 886                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV4_UDP;
 887                         hash_types &=
 888                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4;
 889                 }
 890                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6) {
 891                         rss_conf->rss_hf |= ETH_RSS_IPV6;
 892                         hash_types &= ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6;
 893                 }
 894                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6) {
 895                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV6_TCP;
 896                         hash_types &=
 897                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6;
 898                 }
 899                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6) {
 900                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV6_UDP;
 901                         hash_types &=
 902                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6;
 903                 }
 904                 if (hash_types) {
 905                         RTE_LOG(ERR, PMD,
 906                                 "Unknwon RSS config from firmware (%08x), RSS disabled",
 907                                 vnic->hash_type);
 908                         return -ENOTSUP;
 909                 }
 910         } else {
 911                 rss_conf->rss_hf = 0;
 912         }
 913         return 0;
 914 }
 915
 916 static int bnxt_flow_ctrl_get_op(struct rte_eth_dev *dev,
 917                                struct rte_eth_fc_conf *fc_conf __rte_unused)
 918 {
 919         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
 920         struct rte_eth_link link_info;
 921         int rc;
 922
 923         rc = bnxt_get_hwrm_link_config(bp, &link_info);
 924         if (rc)
 925                 return rc;
 926
 927         memset(fc_conf, 0, sizeof(*fc_conf));
 928         if (bp->link_info.auto_pause)
 929                 fc_conf->autoneg = 1;
 930         switch (bp->link_info.pause) {
 931         case 0:
 932                 fc_conf->mode = RTE_FC_NONE;
 933                 break;
 934         case HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_TX:
 935                 fc_conf->mode = RTE_FC_TX_PAUSE;
 936                 break;
 937         case HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_RX:
 938                 fc_conf->mode = RTE_FC_RX_PAUSE;
 939                 break;
 940         case (HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_TX |
 941                         HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_RX):
 942                 fc_conf->mode = RTE_FC_FULL;
 943                 break;
 944         }
 945         return 0;
 946 }
 947
 948 static int bnxt_flow_ctrl_set_op(struct rte_eth_dev *dev,
 949                                struct rte_eth_fc_conf *fc_conf)
 950 {
 951         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
 952
 953         if (BNXT_NPAR_PF(bp) || BNXT_VF(bp)) {
 954                 RTE_LOG(ERR, PMD, "Flow Control Settings cannot be modified\n");
 955                 return -ENOTSUP;
 956         }
 957
 958         switch (fc_conf->mode) {
 959         case RTE_FC_NONE:
 960                 bp->link_info.auto_pause = 0;
 961                 bp->link_info.force_pause = 0;
 962                 break;
 963         case RTE_FC_RX_PAUSE:
 964                 if (fc_conf->autoneg) {
 965                         bp->link_info.auto_pause =
 966                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_RX;
 967                         bp->link_info.force_pause = 0;
 968                 } else {
 969                         bp->link_info.auto_pause = 0;
 970                         bp->link_info.force_pause =
 971                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_RX;
 972                 }
 973                 break;
 974         case RTE_FC_TX_PAUSE:
 975                 if (fc_conf->autoneg) {
 976                         bp->link_info.auto_pause =
 977                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_TX;
 978                         bp->link_info.force_pause = 0;
 979                 } else {
 980                         bp->link_info.auto_pause = 0;
 981                         bp->link_info.force_pause =
 982                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_TX;
 983                 }
 984                 break;
 985         case RTE_FC_FULL:
 986                 if (fc_conf->autoneg) {
 987                         bp->link_info.auto_pause =
 988                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_TX |
 989                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_RX;
 990                         bp->link_info.force_pause = 0;
 991                 } else {
 992                         bp->link_info.auto_pause = 0;
 993                         bp->link_info.force_pause =
 994                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_TX |
 995                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_RX;
 996                 }
 997                 break;
 998         }
 999         return bnxt_set_hwrm_link_config(bp, true);
1000 }
1001
1002 /*
1003  * Initialization
1004  */
1005
1006 static struct eth_dev_ops bnxt_dev_ops = {
1007         .dev_infos_get = bnxt_dev_info_get_op,
1008         .dev_close = bnxt_dev_close_op,
1009         .dev_configure = bnxt_dev_configure_op,
1010         .dev_start = bnxt_dev_start_op,
1011         .dev_stop = bnxt_dev_stop_op,
1012         .dev_set_link_up = bnxt_dev_set_link_up_op,
1013         .dev_set_link_down = bnxt_dev_set_link_down_op,
1014         .stats_get = bnxt_stats_get_op,
1015         .stats_reset = bnxt_stats_reset_op,
1016         .rx_queue_setup = bnxt_rx_queue_setup_op,
1017         .rx_queue_release = bnxt_rx_queue_release_op,
1018         .tx_queue_setup = bnxt_tx_queue_setup_op,
1019         .tx_queue_release = bnxt_tx_queue_release_op,
1020         .reta_update = bnxt_reta_update_op,
1021         .reta_query = bnxt_reta_query_op,
1022         .rss_hash_update = bnxt_rss_hash_update_op,
1023         .rss_hash_conf_get = bnxt_rss_hash_conf_get_op,
1024         .link_update = bnxt_link_update_op,
1025         .promiscuous_enable = bnxt_promiscuous_enable_op,
1026         .promiscuous_disable = bnxt_promiscuous_disable_op,
1027         .allmulticast_enable = bnxt_allmulticast_enable_op,
1028         .allmulticast_disable = bnxt_allmulticast_disable_op,
1029         .mac_addr_add = bnxt_mac_addr_add_op,
1030         .mac_addr_remove = bnxt_mac_addr_remove_op,
1031         .flow_ctrl_get = bnxt_flow_ctrl_get_op,
1032         .flow_ctrl_set = bnxt_flow_ctrl_set_op,
1033 };
1034
1035 static bool bnxt_vf_pciid(uint16_t id)
1036 {
1037         if (id == BROADCOM_DEV_ID_57304_VF ||
1038             id == BROADCOM_DEV_ID_57406_VF ||
1039             id == BROADCOM_DEV_ID_5731X_VF ||
1040             id == BROADCOM_DEV_ID_5741X_VF)
1041                 return true;
1042         return false;
1043 }
1044
1045 static int bnxt_init_board(struct rte_eth_dev *eth_dev)
1046 {
1047         int rc;
1048         struct bnxt *bp = eth_dev->data->dev_private;
1049
1050         /* enable device (incl. PCI PM wakeup), and bus-mastering */
1051         if (!eth_dev->pci_dev->mem_resource[0].addr) {
1052                 RTE_LOG(ERR, PMD,
1053                         "Cannot find PCI device base address, aborting\n");
1054                 rc = -ENODEV;
1055                 goto init_err_disable;
1056         }
1057
1058         bp->eth_dev = eth_dev;
1059         bp->pdev = eth_dev->pci_dev;
1060
1061         bp->bar0 = (void *)eth_dev->pci_dev->mem_resource[0].addr;
1062         if (!bp->bar0) {
1063                 RTE_LOG(ERR, PMD, "Cannot map device registers, aborting\n");
1064                 rc = -ENOMEM;
1065                 goto init_err_release;
1066         }
1067         return 0;
1068
1069 init_err_release:
1070         if (bp->bar0)
1071                 bp->bar0 = NULL;
1072
1073 init_err_disable:
1074
1075         return rc;
1076 }
1077
1078 static int
1079 bnxt_dev_init(struct rte_eth_dev *eth_dev)
1080 {
1081         static int version_printed;
1082         struct bnxt *bp;
1083         int rc;
1084
1085         if (version_printed++ == 0)
1086                 RTE_LOG(INFO, PMD, "%s", bnxt_version);
1087
1088         rte_eth_copy_pci_info(eth_dev, eth_dev->pci_dev);
1089         bp = eth_dev->data->dev_private;
1090
1091         if (bnxt_vf_pciid(eth_dev->pci_dev->id.device_id))
1092                 bp->flags |= BNXT_FLAG_VF;
1093
1094         rc = bnxt_init_board(eth_dev);
1095         if (rc) {
1096                 RTE_LOG(ERR, PMD,
1097                         "Board initialization failed rc: %x\n", rc);
1098                 goto error;
1099         }
1100         eth_dev->dev_ops = &bnxt_dev_ops;
1101         eth_dev->rx_pkt_burst = &bnxt_recv_pkts;
1102         eth_dev->tx_pkt_burst = &bnxt_xmit_pkts;
1103
1104         rc = bnxt_alloc_hwrm_resources(bp);
1105         if (rc) {
1106                 RTE_LOG(ERR, PMD,
1107                         "hwrm resource allocation failure rc: %x\n", rc);
1108                 goto error_free;
1109         }
1110         rc = bnxt_hwrm_ver_get(bp);
1111         if (rc)
1112                 goto error_free;
1113         bnxt_hwrm_queue_qportcfg(bp);
1114
1115         bnxt_hwrm_func_qcfg(bp);
1116
1117         /* Get the MAX capabilities for this function */
1118         rc = bnxt_hwrm_func_qcaps(bp);
1119         if (rc) {
1120                 RTE_LOG(ERR, PMD, "hwrm query capability failure rc: %x\n", rc);
1121                 goto error_free;
1122         }
1123         eth_dev->data->mac_addrs = rte_zmalloc("bnxt_mac_addr_tbl",
1124                                         ETHER_ADDR_LEN * MAX_NUM_MAC_ADDR, 0);
1125         if (eth_dev->data->mac_addrs == NULL) {
1126                 RTE_LOG(ERR, PMD,
1127                         "Failed to alloc %u bytes needed to store MAC addr tbl",
1128                         ETHER_ADDR_LEN * MAX_NUM_MAC_ADDR);
1129                 rc = -ENOMEM;
1130                 goto error_free;
1131         }
1132         /* Copy the permanent MAC from the qcap response address now. */
1133         if (BNXT_PF(bp))
1134                 memcpy(bp->mac_addr, bp->pf.mac_addr, sizeof(bp->mac_addr));
1135         else
1136                 memcpy(bp->mac_addr, bp->vf.mac_addr, sizeof(bp->mac_addr));
1137         memcpy(&eth_dev->data->mac_addrs[0], bp->mac_addr, ETHER_ADDR_LEN);
1138         bp->grp_info = rte_zmalloc("bnxt_grp_info",
1139                                 sizeof(*bp->grp_info) * bp->max_ring_grps, 0);
1140         if (!bp->grp_info) {
1141                 RTE_LOG(ERR, PMD,
1142                         "Failed to alloc %zu bytes needed to store group info table\n",
1143                         sizeof(*bp->grp_info) * bp->max_ring_grps);
1144                 rc = -ENOMEM;
1145                 goto error_free;
1146         }
1147
1148         rc = bnxt_hwrm_func_driver_register(bp, 0,
1149                                             bp->pf.vf_req_fwd);
1150         if (rc) {
1151                 RTE_LOG(ERR, PMD,
1152                         "Failed to register driver");
1153                 rc = -EBUSY;
1154                 goto error_free;
1155         }
1156
1157         RTE_LOG(INFO, PMD,
1158                 DRV_MODULE_NAME " found at mem %" PRIx64 ", node addr %pM\n",
1159                 eth_dev->pci_dev->mem_resource[0].phys_addr,
1160                 eth_dev->pci_dev->mem_resource[0].addr);
1161
1162         bp->dev_stopped = 0;
1163
1164         return 0;
1165
1166 error_free:
1167         eth_dev->driver->eth_dev_uninit(eth_dev);
1168 error:
1169         return rc;
1170 }
1171
1172 static int
1173 bnxt_dev_uninit(struct rte_eth_dev *eth_dev) {
1174         struct bnxt *bp = eth_dev->data->dev_private;
1175         int rc;
1176
1177         if (eth_dev->data->mac_addrs != NULL) {
1178                 rte_free(eth_dev->data->mac_addrs);
1179                 eth_dev->data->mac_addrs = NULL;
1180         }
1181         if (bp->grp_info != NULL) {
1182                 rte_free(bp->grp_info);
1183                 bp->grp_info = NULL;
1184         }
1185         rc = bnxt_hwrm_func_driver_unregister(bp, 0);
1186         bnxt_free_hwrm_resources(bp);
1187         if (bp->dev_stopped == 0)
1188                 bnxt_dev_close_op(eth_dev);
1189         eth_dev->dev_ops = NULL;
1190         eth_dev->rx_pkt_burst = NULL;
1191         eth_dev->tx_pkt_burst = NULL;
1192
1193         return rc;
1194 }
1195
1196 static struct eth_driver bnxt_rte_pmd = {
1197         .pci_drv = {
1198                     .id_table = bnxt_pci_id_map,
1199                     .drv_flags = RTE_PCI_DRV_NEED_MAPPING |
1200                             RTE_PCI_DRV_DETACHABLE | RTE_PCI_DRV_INTR_LSC,
1201                     .probe = rte_eth_dev_pci_probe,
1202                     .remove = rte_eth_dev_pci_remove
1203                     },
1204         .eth_dev_init = bnxt_dev_init,
1205         .eth_dev_uninit = bnxt_dev_uninit,
1206         .dev_private_size = sizeof(struct bnxt),
1207 };
1208
1209 RTE_PMD_REGISTER_PCI(net_bnxt, bnxt_rte_pmd.pci_drv);
1210 RTE_PMD_REGISTER_PCI_TABLE(net_bnxt, bnxt_pci_id_map);