drivers/net/bnxt/bnxt_ethdev.c

   1 /*-
   2  *   BSD LICENSE
   3  *
   4  *   Copyright(c) Broadcom Limited.
   5  *   All rights reserved.
   6  *
   7  *   Redistribution and use in source and binary forms, with or without
   8  *   modification, are permitted provided that the following conditions
   9  *   are met:
  10  *
  11  *     * Redistributions of source code must retain the above copyright
  12  *       notice, this list of conditions and the following disclaimer.
  13  *     * Redistributions in binary form must reproduce the above copyright
  14  *       notice, this list of conditions and the following disclaimer in
  15  *       the documentation and/or other materials provided with the
  16  *       distribution.
  17  *     * Neither the name of Broadcom Corporation nor the names of its
  18  *       contributors may be used to endorse or promote products derived
  19  *       from this software without specific prior written permission.
  20  *
  21  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  22  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  23  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  24  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  25  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  26  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  27  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  28  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  29  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32  */
  33
  34 #include <inttypes.h>
  35 #include <stdbool.h>
  36
  37 #include <rte_dev.h>
  38 #include <rte_ethdev.h>
  39 #include <rte_malloc.h>
  40 #include <rte_cycles.h>
  41
  42 #include "bnxt.h"
  43 #include "bnxt_cpr.h"
  44 #include "bnxt_filter.h"
  45 #include "bnxt_hwrm.h"
  46 #include "bnxt_irq.h"
  47 #include "bnxt_ring.h"
  48 #include "bnxt_rxq.h"
  49 #include "bnxt_rxr.h"
  50 #include "bnxt_stats.h"
  51 #include "bnxt_txq.h"
  52 #include "bnxt_txr.h"
  53 #include "bnxt_vnic.h"
  54 #include "hsi_struct_def_dpdk.h"
  55
  56 #define DRV_MODULE_NAME         "bnxt"
  57 static const char bnxt_version[] =
  58         "Broadcom Cumulus driver " DRV_MODULE_NAME "\n";
  59
  60 #define PCI_VENDOR_ID_BROADCOM 0x14E4
  61
  62 #define BROADCOM_DEV_ID_57301 0x16c8
  63 #define BROADCOM_DEV_ID_57302 0x16c9
  64 #define BROADCOM_DEV_ID_57304_PF 0x16ca
  65 #define BROADCOM_DEV_ID_57304_VF 0x16cb
  66 #define BROADCOM_DEV_ID_57417_MF 0x16cc
  67 #define BROADCOM_DEV_ID_NS2 0x16cd
  68 #define BROADCOM_DEV_ID_57311 0x16ce
  69 #define BROADCOM_DEV_ID_57312 0x16cf
  70 #define BROADCOM_DEV_ID_57402 0x16d0
  71 #define BROADCOM_DEV_ID_57404 0x16d1
  72 #define BROADCOM_DEV_ID_57406_PF 0x16d2
  73 #define BROADCOM_DEV_ID_57406_VF 0x16d3
  74 #define BROADCOM_DEV_ID_57402_MF 0x16d4
  75 #define BROADCOM_DEV_ID_57407_RJ45 0x16d5
  76 #define BROADCOM_DEV_ID_57412 0x16d6
  77 #define BROADCOM_DEV_ID_57414 0x16d7
  78 #define BROADCOM_DEV_ID_57416_RJ45 0x16d8
  79 #define BROADCOM_DEV_ID_57417_RJ45 0x16d9
  80 #define BROADCOM_DEV_ID_5741X_VF 0x16dc
  81 #define BROADCOM_DEV_ID_57412_MF 0x16de
  82 #define BROADCOM_DEV_ID_57314 0x16df
  83 #define BROADCOM_DEV_ID_57317_RJ45 0x16e0
  84 #define BROADCOM_DEV_ID_5731X_VF 0x16e1
  85 #define BROADCOM_DEV_ID_57417_SFP 0x16e2
  86 #define BROADCOM_DEV_ID_57416_SFP 0x16e3
  87 #define BROADCOM_DEV_ID_57317_SFP 0x16e4
  88 #define BROADCOM_DEV_ID_57404_MF 0x16e7
  89 #define BROADCOM_DEV_ID_57406_MF 0x16e8
  90 #define BROADCOM_DEV_ID_57407_SFP 0x16e9
  91 #define BROADCOM_DEV_ID_57407_MF 0x16ea
  92 #define BROADCOM_DEV_ID_57414_MF 0x16ec
  93 #define BROADCOM_DEV_ID_57416_MF 0x16ee
  94
  95 static struct rte_pci_id bnxt_pci_id_map[] = {
  96         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57301) },
  97         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57302) },
  98         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57304_PF) },
  99         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57304_VF) },
 100         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_NS2) },
 101         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57402) },
 102         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57404) },
 103         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57406_PF) },
 104         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57406_VF) },
 105         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57402_MF) },
 106         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57407_RJ45) },
 107         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57404_MF) },
 108         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57406_MF) },
 109         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57407_SFP) },
 110         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57407_MF) },
 111         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_5741X_VF) },
 112         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_5731X_VF) },
 113         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57314) },
 114         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57417_MF) },
 115         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57311) },
 116         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57312) },
 117         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57412) },
 118         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57414) },
 119         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57416_RJ45) },
 120         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57417_RJ45) },
 121         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57412_MF) },
 122         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57317_RJ45) },
 123         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57417_SFP) },
 124         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57416_SFP) },
 125         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57317_SFP) },
 126         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57414_MF) },
 127         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57416_MF) },
 128         { .vendor_id = 0, /* sentinel */ },
 129 };
 130
 131 #define BNXT_ETH_RSS_SUPPORT (  \
 132         ETH_RSS_IPV4 |          \
 133         ETH_RSS_NONFRAG_IPV4_TCP |      \
 134         ETH_RSS_NONFRAG_IPV4_UDP |      \
 135         ETH_RSS_IPV6 |          \
 136         ETH_RSS_NONFRAG_IPV6_TCP |      \
 137         ETH_RSS_NONFRAG_IPV6_UDP)
 138
 139 static void bnxt_print_link_info(struct rte_eth_dev *eth_dev);
 140
 141 /***********************/
 142
 143 /*
 144  * High level utility functions
 145  */
 146
 147 static void bnxt_free_mem(struct bnxt *bp)
 148 {
 149         bnxt_free_filter_mem(bp);
 150         bnxt_free_vnic_attributes(bp);
 151         bnxt_free_vnic_mem(bp);
 152
 153         bnxt_free_stats(bp);
 154         bnxt_free_tx_rings(bp);
 155         bnxt_free_rx_rings(bp);
 156         bnxt_free_def_cp_ring(bp);
 157 }
 158
 159 static int bnxt_alloc_mem(struct bnxt *bp)
 160 {
 161         int rc;
 162
 163         /* Default completion ring */
 164         rc = bnxt_init_def_ring_struct(bp, SOCKET_ID_ANY);
 165         if (rc)
 166                 goto alloc_mem_err;
 167
 168         rc = bnxt_alloc_rings(bp, 0, NULL, NULL,
 169                               bp->def_cp_ring, "def_cp");
 170         if (rc)
 171                 goto alloc_mem_err;
 172
 173         rc = bnxt_alloc_vnic_mem(bp);
 174         if (rc)
 175                 goto alloc_mem_err;
 176
 177         rc = bnxt_alloc_vnic_attributes(bp);
 178         if (rc)
 179                 goto alloc_mem_err;
 180
 181         rc = bnxt_alloc_filter_mem(bp);
 182         if (rc)
 183                 goto alloc_mem_err;
 184
 185         return 0;
 186
 187 alloc_mem_err:
 188         bnxt_free_mem(bp);
 189         return rc;
 190 }
 191
 192 static int bnxt_init_chip(struct bnxt *bp)
 193 {
 194         unsigned int i, rss_idx, fw_idx;
 195         struct rte_eth_link new;
 196         int rc;
 197
 198         rc = bnxt_alloc_all_hwrm_stat_ctxs(bp);
 199         if (rc) {
 200                 RTE_LOG(ERR, PMD, "HWRM stat ctx alloc failure rc: %x\n", rc);
 201                 goto err_out;
 202         }
 203
 204         rc = bnxt_alloc_hwrm_rings(bp);
 205         if (rc) {
 206                 RTE_LOG(ERR, PMD, "HWRM ring alloc failure rc: %x\n", rc);
 207                 goto err_out;
 208         }
 209
 210         rc = bnxt_alloc_all_hwrm_ring_grps(bp);
 211         if (rc) {
 212                 RTE_LOG(ERR, PMD, "HWRM ring grp alloc failure: %x\n", rc);
 213                 goto err_out;
 214         }
 215
 216         rc = bnxt_mq_rx_configure(bp);
 217         if (rc) {
 218                 RTE_LOG(ERR, PMD, "MQ mode configure failure rc: %x\n", rc);
 219                 goto err_out;
 220         }
 221
 222         /* VNIC configuration */
 223         for (i = 0; i < bp->nr_vnics; i++) {
 224                 struct bnxt_vnic_info *vnic = &bp->vnic_info[i];
 225
 226                 rc = bnxt_hwrm_vnic_alloc(bp, vnic);
 227                 if (rc) {
 228                         RTE_LOG(ERR, PMD, "HWRM vnic alloc failure rc: %x\n",
 229                                 rc);
 230                         goto err_out;
 231                 }
 232
 233                 rc = bnxt_hwrm_vnic_ctx_alloc(bp, vnic);
 234                 if (rc) {
 235                         RTE_LOG(ERR, PMD,
 236                                 "HWRM vnic ctx alloc failure rc: %x\n", rc);
 237                         goto err_out;
 238                 }
 239
 240                 rc = bnxt_hwrm_vnic_cfg(bp, vnic);
 241                 if (rc) {
 242                         RTE_LOG(ERR, PMD, "HWRM vnic cfg failure rc: %x\n", rc);
 243                         goto err_out;
 244                 }
 245
 246                 rc = bnxt_set_hwrm_vnic_filters(bp, vnic);
 247                 if (rc) {
 248                         RTE_LOG(ERR, PMD, "HWRM vnic filter failure rc: %x\n",
 249                                 rc);
 250                         goto err_out;
 251                 }
 252                 if (vnic->rss_table && vnic->hash_type) {
 253                         /*
 254                          * Fill the RSS hash & redirection table with
 255                          * ring group ids for all VNICs
 256                          */
 257                         for (rss_idx = 0, fw_idx = 0;
 258                              rss_idx < HW_HASH_INDEX_SIZE;
 259                              rss_idx++, fw_idx++) {
 260                                 if (vnic->fw_grp_ids[fw_idx] ==
 261                                     INVALID_HW_RING_ID)
 262                                         fw_idx = 0;
 263                                 vnic->rss_table[rss_idx] =
 264                                                 vnic->fw_grp_ids[fw_idx];
 265                         }
 266                         rc = bnxt_hwrm_vnic_rss_cfg(bp, vnic);
 267                         if (rc) {
 268                                 RTE_LOG(ERR, PMD,
 269                                         "HWRM vnic set RSS failure rc: %x\n",
 270                                         rc);
 271                                 goto err_out;
 272                         }
 273                 }
 274         }
 275         rc = bnxt_hwrm_cfa_l2_set_rx_mask(bp, &bp->vnic_info[0]);
 276         if (rc) {
 277                 RTE_LOG(ERR, PMD,
 278                         "HWRM cfa l2 rx mask failure rc: %x\n", rc);
 279                 goto err_out;
 280         }
 281
 282         rc = bnxt_get_hwrm_link_config(bp, &new);
 283         if (rc) {
 284                 RTE_LOG(ERR, PMD, "HWRM Get link config failure rc: %x\n", rc);
 285                 goto err_out;
 286         }
 287
 288         if (!bp->link_info.link_up) {
 289                 rc = bnxt_set_hwrm_link_config(bp, true);
 290                 if (rc) {
 291                         RTE_LOG(ERR, PMD,
 292                                 "HWRM link config failure rc: %x\n", rc);
 293                         goto err_out;
 294                 }
 295         }
 296         bnxt_print_link_info(bp->eth_dev);
 297
 298         return 0;
 299
 300 err_out:
 301         bnxt_free_all_hwrm_resources(bp);
 302
 303         return rc;
 304 }
 305
 306 static int bnxt_shutdown_nic(struct bnxt *bp)
 307 {
 308         bnxt_free_all_hwrm_resources(bp);
 309         bnxt_free_all_filters(bp);
 310         bnxt_free_all_vnics(bp);
 311         return 0;
 312 }
 313
 314 static int bnxt_init_nic(struct bnxt *bp)
 315 {
 316         int rc;
 317
 318         rc = bnxt_init_ring_grps(bp);
 319         if (rc)
 320                 return rc;
 321         bnxt_init_vnics(bp);
 322         bnxt_init_filters(bp);
 323
 324         rc = bnxt_init_chip(bp);
 325         if (rc)
 326                 return rc;
 327
 328         return 0;
 329 }
 330
 331 /*
 332  * Device configuration and status function
 333  */
 334
 335 static void bnxt_dev_info_get_op(struct rte_eth_dev *eth_dev,
 336                                   struct rte_eth_dev_info *dev_info)
 337 {
 338         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 339         uint16_t max_vnics, i, j, vpool, vrxq;
 340
 341         /* MAC Specifics */
 342         dev_info->max_mac_addrs = MAX_NUM_MAC_ADDR;
 343         dev_info->max_hash_mac_addrs = 0;
 344
 345         /* PF/VF specifics */
 346         if (BNXT_PF(bp)) {
 347                 dev_info->max_rx_queues = bp->pf.max_rx_rings;
 348                 dev_info->max_tx_queues = bp->pf.max_tx_rings;
 349                 dev_info->max_vfs = bp->pf.active_vfs;
 350                 dev_info->reta_size = bp->pf.max_rsscos_ctx;
 351                 max_vnics = bp->pf.max_vnics;
 352         } else {
 353                 dev_info->max_rx_queues = bp->vf.max_rx_rings;
 354                 dev_info->max_tx_queues = bp->vf.max_tx_rings;
 355                 dev_info->reta_size = bp->vf.max_rsscos_ctx;
 356                 max_vnics = bp->vf.max_vnics;
 357         }
 358
 359         /* Fast path specifics */
 360         dev_info->min_rx_bufsize = 1;
 361         dev_info->max_rx_pktlen = BNXT_MAX_MTU + ETHER_HDR_LEN + ETHER_CRC_LEN
 362                                   + VLAN_TAG_SIZE;
 363         dev_info->rx_offload_capa = DEV_RX_OFFLOAD_VLAN_STRIP |
 364                                         DEV_RX_OFFLOAD_IPV4_CKSUM |
 365                                         DEV_RX_OFFLOAD_UDP_CKSUM |
 366                                         DEV_RX_OFFLOAD_TCP_CKSUM |
 367                                         DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM;
 368         dev_info->tx_offload_capa = DEV_TX_OFFLOAD_VLAN_INSERT |
 369                                         DEV_TX_OFFLOAD_IPV4_CKSUM |
 370                                         DEV_TX_OFFLOAD_TCP_CKSUM |
 371                                         DEV_TX_OFFLOAD_UDP_CKSUM |
 372                                         DEV_TX_OFFLOAD_TCP_TSO;
 373
 374         /* *INDENT-OFF* */
 375         dev_info->default_rxconf = (struct rte_eth_rxconf) {
 376                 .rx_thresh = {
 377                         .pthresh = 8,
 378                         .hthresh = 8,
 379                         .wthresh = 0,
 380                 },
 381                 .rx_free_thresh = 32,
 382                 /* If no descriptors available, pkts are dropped by default */
 383                 .rx_drop_en = 1,
 384         };
 385
 386         dev_info->default_txconf = (struct rte_eth_txconf) {
 387                 .tx_thresh = {
 388                         .pthresh = 32,
 389                         .hthresh = 0,
 390                         .wthresh = 0,
 391                 },
 392                 .tx_free_thresh = 32,
 393                 .tx_rs_thresh = 32,
 394                 .txq_flags = ETH_TXQ_FLAGS_NOMULTSEGS |
 395                              ETH_TXQ_FLAGS_NOOFFLOADS,
 396         };
 397         eth_dev->data->dev_conf.intr_conf.lsc = 1;
 398
 399         /* *INDENT-ON* */
 400
 401         /*
 402          * TODO: default_rxconf, default_txconf, rx_desc_lim, and tx_desc_lim
 403          *       need further investigation.
 404          */
 405
 406         /* VMDq resources */
 407         vpool = 64; /* ETH_64_POOLS */
 408         vrxq = 128; /* ETH_VMDQ_DCB_NUM_QUEUES */
 409         for (i = 0; i < 4; vpool >>= 1, i++) {
 410                 if (max_vnics > vpool) {
 411                         for (j = 0; j < 5; vrxq >>= 1, j++) {
 412                                 if (dev_info->max_rx_queues > vrxq) {
 413                                         if (vpool > vrxq)
 414                                                 vpool = vrxq;
 415                                         goto found;
 416                                 }
 417                         }
 418                         /* Not enough resources to support VMDq */
 419                         break;
 420                 }
 421         }
 422         /* Not enough resources to support VMDq */
 423         vpool = 0;
 424         vrxq = 0;
 425 found:
 426         dev_info->max_vmdq_pools = vpool;
 427         dev_info->vmdq_queue_num = vrxq;
 428
 429         dev_info->vmdq_pool_base = 0;
 430         dev_info->vmdq_queue_base = 0;
 431 }
 432
 433 /* Configure the device based on the configuration provided */
 434 static int bnxt_dev_configure_op(struct rte_eth_dev *eth_dev)
 435 {
 436         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 437
 438         bp->rx_queues = (void *)eth_dev->data->rx_queues;
 439         bp->tx_queues = (void *)eth_dev->data->tx_queues;
 440
 441         /* Inherit new configurations */
 442         bp->rx_nr_rings = eth_dev->data->nb_rx_queues;
 443         bp->tx_nr_rings = eth_dev->data->nb_tx_queues;
 444         bp->rx_cp_nr_rings = bp->rx_nr_rings;
 445         bp->tx_cp_nr_rings = bp->tx_nr_rings;
 446
 447         if (eth_dev->data->dev_conf.rxmode.jumbo_frame)
 448                 eth_dev->data->mtu =
 449                                 eth_dev->data->dev_conf.rxmode.max_rx_pkt_len -
 450                                 ETHER_HDR_LEN - ETHER_CRC_LEN - VLAN_TAG_SIZE;
 451         return 0;
 452 }
 453
 454 static void bnxt_print_link_info(struct rte_eth_dev *eth_dev)
 455 {
 456         struct rte_eth_link *link = &eth_dev->data->dev_link;
 457
 458         if (link->link_status)
 459                 RTE_LOG(INFO, PMD, "Port %d Link Up - speed %u Mbps - %s\n",
 460                         (uint8_t)(eth_dev->data->port_id),
 461                         (uint32_t)link->link_speed,
 462                         (link->link_duplex == ETH_LINK_FULL_DUPLEX) ?
 463                         ("full-duplex") : ("half-duplex\n"));
 464         else
 465                 RTE_LOG(INFO, PMD, "Port %d Link Down\n",
 466                         (uint8_t)(eth_dev->data->port_id));
 467 }
 468
 469 static int bnxt_dev_lsc_intr_setup(struct rte_eth_dev *eth_dev)
 470 {
 471         bnxt_print_link_info(eth_dev);
 472         return 0;
 473 }
 474
 475 static int bnxt_dev_start_op(struct rte_eth_dev *eth_dev)
 476 {
 477         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 478         int rc;
 479
 480         bp->dev_stopped = 0;
 481         rc = bnxt_hwrm_func_reset(bp);
 482         if (rc) {
 483                 RTE_LOG(ERR, PMD, "hwrm chip reset failure rc: %x\n", rc);
 484                 rc = -1;
 485                 goto error;
 486         }
 487
 488         rc = bnxt_setup_int(bp);
 489         if (rc)
 490                 goto error;
 491
 492         rc = bnxt_alloc_mem(bp);
 493         if (rc)
 494                 goto error;
 495
 496         rc = bnxt_request_int(bp);
 497         if (rc)
 498                 goto error;
 499
 500         rc = bnxt_init_nic(bp);
 501         if (rc)
 502                 goto error;
 503
 504         bnxt_enable_int(bp);
 505
 506         bnxt_link_update_op(eth_dev, 1);
 507         return 0;
 508
 509 error:
 510         bnxt_shutdown_nic(bp);
 511         bnxt_disable_int(bp);
 512         bnxt_free_int(bp);
 513         bnxt_free_tx_mbufs(bp);
 514         bnxt_free_rx_mbufs(bp);
 515         bnxt_free_mem(bp);
 516         return rc;
 517 }
 518
 519 static int bnxt_dev_set_link_up_op(struct rte_eth_dev *eth_dev)
 520 {
 521         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 522         int rc = 0;
 523
 524         if (!bp->link_info.link_up)
 525                 rc = bnxt_set_hwrm_link_config(bp, true);
 526         if (!rc)
 527                 eth_dev->data->dev_link.link_status = 1;
 528
 529         bnxt_print_link_info(eth_dev);
 530         return 0;
 531 }
 532
 533 static int bnxt_dev_set_link_down_op(struct rte_eth_dev *eth_dev)
 534 {
 535         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 536
 537         eth_dev->data->dev_link.link_status = 0;
 538         bnxt_set_hwrm_link_config(bp, false);
 539         bp->link_info.link_up = 0;
 540
 541         return 0;
 542 }
 543
 544 /* Unload the driver, release resources */
 545 static void bnxt_dev_stop_op(struct rte_eth_dev *eth_dev)
 546 {
 547         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 548
 549         if (bp->eth_dev->data->dev_started) {
 550                 /* TBD: STOP HW queues DMA */
 551                 eth_dev->data->dev_link.link_status = 0;
 552         }
 553         bnxt_set_hwrm_link_config(bp, false);
 554         bnxt_disable_int(bp);
 555         bnxt_free_int(bp);
 556         bnxt_free_tx_mbufs(bp);
 557         bnxt_free_rx_mbufs(bp);
 558         bnxt_shutdown_nic(bp);
 559         bp->dev_stopped = 1;
 560 }
 561
 562 static void bnxt_dev_close_op(struct rte_eth_dev *eth_dev)
 563 {
 564         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 565
 566         if (bp->dev_stopped == 0)
 567                 bnxt_dev_stop_op(eth_dev);
 568
 569         bnxt_free_mem(bp);
 570         if (eth_dev->data->mac_addrs != NULL) {
 571                 rte_free(eth_dev->data->mac_addrs);
 572                 eth_dev->data->mac_addrs = NULL;
 573         }
 574         if (bp->grp_info != NULL) {
 575                 rte_free(bp->grp_info);
 576                 bp->grp_info = NULL;
 577         }
 578 }
 579
 580 static void bnxt_mac_addr_remove_op(struct rte_eth_dev *eth_dev,
 581                                     uint32_t index)
 582 {
 583         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 584         uint64_t pool_mask = eth_dev->data->mac_pool_sel[index];
 585         struct bnxt_vnic_info *vnic;
 586         struct bnxt_filter_info *filter, *temp_filter;
 587         uint32_t pool = RTE_MIN(MAX_FF_POOLS, ETH_64_POOLS);
 588         uint32_t i;
 589
 590         /*
 591          * Loop through all VNICs from the specified filter flow pools to
 592          * remove the corresponding MAC addr filter
 593          */
 594         for (i = 0; i < pool; i++) {
 595                 if (!(pool_mask & (1ULL << i)))
 596                         continue;
 597
 598                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
 599                         filter = STAILQ_FIRST(&vnic->filter);
 600                         while (filter) {
 601                                 temp_filter = STAILQ_NEXT(filter, next);
 602                                 if (filter->mac_index == index) {
 603                                         STAILQ_REMOVE(&vnic->filter, filter,
 604                                                       bnxt_filter_info, next);
 605                                         bnxt_hwrm_clear_filter(bp, filter);
 606                                         filter->mac_index = INVALID_MAC_INDEX;
 607                                         memset(&filter->l2_addr, 0,
 608                                                ETHER_ADDR_LEN);
 609                                         STAILQ_INSERT_TAIL(
 610                                                         &bp->free_filter_list,
 611                                                         filter, next);
 612                                 }
 613                                 filter = temp_filter;
 614                         }
 615                 }
 616         }
 617 }
 618
 619 static void bnxt_mac_addr_add_op(struct rte_eth_dev *eth_dev,
 620                                  struct ether_addr *mac_addr,
 621                                  uint32_t index, uint32_t pool)
 622 {
 623         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 624         struct bnxt_vnic_info *vnic = STAILQ_FIRST(&bp->ff_pool[pool]);
 625         struct bnxt_filter_info *filter;
 626
 627         if (BNXT_VF(bp)) {
 628                 RTE_LOG(ERR, PMD, "Cannot add MAC address to a VF interface\n");
 629                 return;
 630         }
 631
 632         if (!vnic) {
 633                 RTE_LOG(ERR, PMD, "VNIC not found for pool %d!\n", pool);
 634                 return;
 635         }
 636         /* Attach requested MAC address to the new l2_filter */
 637         STAILQ_FOREACH(filter, &vnic->filter, next) {
 638                 if (filter->mac_index == index) {
 639                         RTE_LOG(ERR, PMD,
 640                                 "MAC addr already existed for pool %d\n", pool);
 641                         return;
 642                 }
 643         }
 644         filter = bnxt_alloc_filter(bp);
 645         if (!filter) {
 646                 RTE_LOG(ERR, PMD, "L2 filter alloc failed\n");
 647                 return;
 648         }
 649         STAILQ_INSERT_TAIL(&vnic->filter, filter, next);
 650         filter->mac_index = index;
 651         memcpy(filter->l2_addr, mac_addr, ETHER_ADDR_LEN);
 652         bnxt_hwrm_set_filter(bp, vnic, filter);
 653 }
 654
 655 int bnxt_link_update_op(struct rte_eth_dev *eth_dev, int wait_to_complete)
 656 {
 657         int rc = 0;
 658         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 659         struct rte_eth_link new;
 660         unsigned int cnt = BNXT_LINK_WAIT_CNT;
 661
 662         memset(&new, 0, sizeof(new));
 663         do {
 664                 /* Retrieve link info from hardware */
 665                 rc = bnxt_get_hwrm_link_config(bp, &new);
 666                 if (rc) {
 667                         new.link_speed = ETH_LINK_SPEED_100M;
 668                         new.link_duplex = ETH_LINK_FULL_DUPLEX;
 669                         RTE_LOG(ERR, PMD,
 670                                 "Failed to retrieve link rc = 0x%x!", rc);
 671                         goto out;
 672                 }
 673                 rte_delay_ms(BNXT_LINK_WAIT_INTERVAL);
 674
 675                 if (!wait_to_complete)
 676                         break;
 677         } while (!new.link_status && cnt--);
 678
 679 out:
 680         /* Timed out or success */
 681         if (new.link_status != eth_dev->data->dev_link.link_status ||
 682         new.link_speed != eth_dev->data->dev_link.link_speed) {
 683                 memcpy(&eth_dev->data->dev_link, &new,
 684                         sizeof(struct rte_eth_link));
 685                 bnxt_print_link_info(eth_dev);
 686         }
 687
 688         return rc;
 689 }
 690
 691 static void bnxt_promiscuous_enable_op(struct rte_eth_dev *eth_dev)
 692 {
 693         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 694         struct bnxt_vnic_info *vnic;
 695
 696         if (bp->vnic_info == NULL)
 697                 return;
 698
 699         vnic = &bp->vnic_info[0];
 700
 701         vnic->flags |= BNXT_VNIC_INFO_PROMISC;
 702         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic);
 703 }
 704
 705 static void bnxt_promiscuous_disable_op(struct rte_eth_dev *eth_dev)
 706 {
 707         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 708         struct bnxt_vnic_info *vnic;
 709
 710         if (bp->vnic_info == NULL)
 711                 return;
 712
 713         vnic = &bp->vnic_info[0];
 714
 715         vnic->flags &= ~BNXT_VNIC_INFO_PROMISC;
 716         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic);
 717 }
 718
 719 static void bnxt_allmulticast_enable_op(struct rte_eth_dev *eth_dev)
 720 {
 721         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 722         struct bnxt_vnic_info *vnic;
 723
 724         if (bp->vnic_info == NULL)
 725                 return;
 726
 727         vnic = &bp->vnic_info[0];
 728
 729         vnic->flags |= BNXT_VNIC_INFO_ALLMULTI;
 730         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic);
 731 }
 732
 733 static void bnxt_allmulticast_disable_op(struct rte_eth_dev *eth_dev)
 734 {
 735         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 736         struct bnxt_vnic_info *vnic;
 737
 738         if (bp->vnic_info == NULL)
 739                 return;
 740
 741         vnic = &bp->vnic_info[0];
 742
 743         vnic->flags &= ~BNXT_VNIC_INFO_ALLMULTI;
 744         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic);
 745 }
 746
 747 static int bnxt_reta_update_op(struct rte_eth_dev *eth_dev,
 748                             struct rte_eth_rss_reta_entry64 *reta_conf,
 749                             uint16_t reta_size)
 750 {
 751         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 752         struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
 753         struct bnxt_vnic_info *vnic;
 754         int i;
 755
 756         if (!(dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG))
 757                 return -EINVAL;
 758
 759         if (reta_size != HW_HASH_INDEX_SIZE) {
 760                 RTE_LOG(ERR, PMD, "The configured hash table lookup size "
 761                         "(%d) must equal the size supported by the hardware "
 762                         "(%d)\n", reta_size, HW_HASH_INDEX_SIZE);
 763                 return -EINVAL;
 764         }
 765         /* Update the RSS VNIC(s) */
 766         for (i = 0; i < MAX_FF_POOLS; i++) {
 767                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
 768                         memcpy(vnic->rss_table, reta_conf, reta_size);
 769
 770                         bnxt_hwrm_vnic_rss_cfg(bp, vnic);
 771                 }
 772         }
 773         return 0;
 774 }
 775
 776 static int bnxt_reta_query_op(struct rte_eth_dev *eth_dev,
 777                               struct rte_eth_rss_reta_entry64 *reta_conf,
 778                               uint16_t reta_size)
 779 {
 780         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 781         struct bnxt_vnic_info *vnic = &bp->vnic_info[0];
 782
 783         /* Retrieve from the default VNIC */
 784         if (!vnic)
 785                 return -EINVAL;
 786         if (!vnic->rss_table)
 787                 return -EINVAL;
 788
 789         if (reta_size != HW_HASH_INDEX_SIZE) {
 790                 RTE_LOG(ERR, PMD, "The configured hash table lookup size "
 791                         "(%d) must equal the size supported by the hardware "
 792                         "(%d)\n", reta_size, HW_HASH_INDEX_SIZE);
 793                 return -EINVAL;
 794         }
 795         /* EW - need to revisit here copying from u64 to u16 */
 796         memcpy(reta_conf, vnic->rss_table, reta_size);
 797
 798         if (rte_intr_allow_others(&eth_dev->pci_dev->intr_handle)) {
 799                 if (eth_dev->data->dev_conf.intr_conf.lsc != 0)
 800                         bnxt_dev_lsc_intr_setup(eth_dev);
 801         }
 802
 803         return 0;
 804 }
 805
 806 static int bnxt_rss_hash_update_op(struct rte_eth_dev *eth_dev,
 807                                    struct rte_eth_rss_conf *rss_conf)
 808 {
 809         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 810         struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
 811         struct bnxt_vnic_info *vnic;
 812         uint16_t hash_type = 0;
 813         int i;
 814
 815         /*
 816          * If RSS enablement were different than dev_configure,
 817          * then return -EINVAL
 818          */
 819         if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) {
 820                 if (!rss_conf->rss_hf)
 821                         return -EINVAL;
 822         } else {
 823                 if (rss_conf->rss_hf & BNXT_ETH_RSS_SUPPORT)
 824                         return -EINVAL;
 825         }
 826         if (rss_conf->rss_hf & ETH_RSS_IPV4)
 827                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4;
 828         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV4_TCP)
 829                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4;
 830         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV4_UDP)
 831                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4;
 832         if (rss_conf->rss_hf & ETH_RSS_IPV6)
 833                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6;
 834         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV6_TCP)
 835                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6;
 836         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV6_UDP)
 837                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6;
 838
 839         /* Update the RSS VNIC(s) */
 840         for (i = 0; i < MAX_FF_POOLS; i++) {
 841                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
 842                         vnic->hash_type = hash_type;
 843
 844                         /*
 845                          * Use the supplied key if the key length is
 846                          * acceptable and the rss_key is not NULL
 847                          */
 848                         if (rss_conf->rss_key &&
 849                             rss_conf->rss_key_len <= HW_HASH_KEY_SIZE)
 850                                 memcpy(vnic->rss_hash_key, rss_conf->rss_key,
 851                                        rss_conf->rss_key_len);
 852
 853                         bnxt_hwrm_vnic_rss_cfg(bp, vnic);
 854                 }
 855         }
 856         return 0;
 857 }
 858
 859 static int bnxt_rss_hash_conf_get_op(struct rte_eth_dev *eth_dev,
 860                                      struct rte_eth_rss_conf *rss_conf)
 861 {
 862         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 863         struct bnxt_vnic_info *vnic = &bp->vnic_info[0];
 864         int len;
 865         uint32_t hash_types;
 866
 867         /* RSS configuration is the same for all VNICs */
 868         if (vnic && vnic->rss_hash_key) {
 869                 if (rss_conf->rss_key) {
 870                         len = rss_conf->rss_key_len <= HW_HASH_KEY_SIZE ?
 871                               rss_conf->rss_key_len : HW_HASH_KEY_SIZE;
 872                         memcpy(rss_conf->rss_key, vnic->rss_hash_key, len);
 873                 }
 874
 875                 hash_types = vnic->hash_type;
 876                 rss_conf->rss_hf = 0;
 877                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4) {
 878                         rss_conf->rss_hf |= ETH_RSS_IPV4;
 879                         hash_types &= ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4;
 880                 }
 881                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4) {
 882                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV4_TCP;
 883                         hash_types &=
 884                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4;
 885                 }
 886                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4) {
 887                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV4_UDP;
 888                         hash_types &=
 889                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4;
 890                 }
 891                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6) {
 892                         rss_conf->rss_hf |= ETH_RSS_IPV6;
 893                         hash_types &= ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6;
 894                 }
 895                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6) {
 896                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV6_TCP;
 897                         hash_types &=
 898                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6;
 899                 }
 900                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6) {
 901                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV6_UDP;
 902                         hash_types &=
 903                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6;
 904                 }
 905                 if (hash_types) {
 906                         RTE_LOG(ERR, PMD,
 907                                 "Unknwon RSS config from firmware (%08x), RSS disabled",
 908                                 vnic->hash_type);
 909                         return -ENOTSUP;
 910                 }
 911         } else {
 912                 rss_conf->rss_hf = 0;
 913         }
 914         return 0;
 915 }
 916
 917 static int bnxt_flow_ctrl_get_op(struct rte_eth_dev *dev,
 918                                struct rte_eth_fc_conf *fc_conf __rte_unused)
 919 {
 920         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
 921         struct rte_eth_link link_info;
 922         int rc;
 923
 924         rc = bnxt_get_hwrm_link_config(bp, &link_info);
 925         if (rc)
 926                 return rc;
 927
 928         memset(fc_conf, 0, sizeof(*fc_conf));
 929         if (bp->link_info.auto_pause)
 930                 fc_conf->autoneg = 1;
 931         switch (bp->link_info.pause) {
 932         case 0:
 933                 fc_conf->mode = RTE_FC_NONE;
 934                 break;
 935         case HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_TX:
 936                 fc_conf->mode = RTE_FC_TX_PAUSE;
 937                 break;
 938         case HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_RX:
 939                 fc_conf->mode = RTE_FC_RX_PAUSE;
 940                 break;
 941         case (HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_TX |
 942                         HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_RX):
 943                 fc_conf->mode = RTE_FC_FULL;
 944                 break;
 945         }
 946         return 0;
 947 }
 948
 949 static int bnxt_flow_ctrl_set_op(struct rte_eth_dev *dev,
 950                                struct rte_eth_fc_conf *fc_conf)
 951 {
 952         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
 953
 954         if (BNXT_NPAR_PF(bp) || BNXT_VF(bp)) {
 955                 RTE_LOG(ERR, PMD, "Flow Control Settings cannot be modified\n");
 956                 return -ENOTSUP;
 957         }
 958
 959         switch (fc_conf->mode) {
 960         case RTE_FC_NONE:
 961                 bp->link_info.auto_pause = 0;
 962                 bp->link_info.force_pause = 0;
 963                 break;
 964         case RTE_FC_RX_PAUSE:
 965                 if (fc_conf->autoneg) {
 966                         bp->link_info.auto_pause =
 967                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_RX;
 968                         bp->link_info.force_pause = 0;
 969                 } else {
 970                         bp->link_info.auto_pause = 0;
 971                         bp->link_info.force_pause =
 972                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_RX;
 973                 }
 974                 break;
 975         case RTE_FC_TX_PAUSE:
 976                 if (fc_conf->autoneg) {
 977                         bp->link_info.auto_pause =
 978                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_TX;
 979                         bp->link_info.force_pause = 0;
 980                 } else {
 981                         bp->link_info.auto_pause = 0;
 982                         bp->link_info.force_pause =
 983                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_TX;
 984                 }
 985                 break;
 986         case RTE_FC_FULL:
 987                 if (fc_conf->autoneg) {
 988                         bp->link_info.auto_pause =
 989                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_TX |
 990                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_RX;
 991                         bp->link_info.force_pause = 0;
 992                 } else {
 993                         bp->link_info.auto_pause = 0;
 994                         bp->link_info.force_pause =
 995                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_TX |
 996                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_RX;
 997                 }
 998                 break;
 999         }
1000         return bnxt_set_hwrm_link_config(bp, true);
1001 }
1002
1003 /*
1004  * Initialization
1005  */
1006
1007 static struct eth_dev_ops bnxt_dev_ops = {
1008         .dev_infos_get = bnxt_dev_info_get_op,
1009         .dev_close = bnxt_dev_close_op,
1010         .dev_configure = bnxt_dev_configure_op,
1011         .dev_start = bnxt_dev_start_op,
1012         .dev_stop = bnxt_dev_stop_op,
1013         .dev_set_link_up = bnxt_dev_set_link_up_op,
1014         .dev_set_link_down = bnxt_dev_set_link_down_op,
1015         .stats_get = bnxt_stats_get_op,
1016         .stats_reset = bnxt_stats_reset_op,
1017         .rx_queue_setup = bnxt_rx_queue_setup_op,
1018         .rx_queue_release = bnxt_rx_queue_release_op,
1019         .tx_queue_setup = bnxt_tx_queue_setup_op,
1020         .tx_queue_release = bnxt_tx_queue_release_op,
1021         .reta_update = bnxt_reta_update_op,
1022         .reta_query = bnxt_reta_query_op,
1023         .rss_hash_update = bnxt_rss_hash_update_op,
1024         .rss_hash_conf_get = bnxt_rss_hash_conf_get_op,
1025         .link_update = bnxt_link_update_op,
1026         .promiscuous_enable = bnxt_promiscuous_enable_op,
1027         .promiscuous_disable = bnxt_promiscuous_disable_op,
1028         .allmulticast_enable = bnxt_allmulticast_enable_op,
1029         .allmulticast_disable = bnxt_allmulticast_disable_op,
1030         .mac_addr_add = bnxt_mac_addr_add_op,
1031         .mac_addr_remove = bnxt_mac_addr_remove_op,
1032         .flow_ctrl_get = bnxt_flow_ctrl_get_op,
1033         .flow_ctrl_set = bnxt_flow_ctrl_set_op,
1034 };
1035
1036 static bool bnxt_vf_pciid(uint16_t id)
1037 {
1038         if (id == BROADCOM_DEV_ID_57304_VF ||
1039             id == BROADCOM_DEV_ID_57406_VF ||
1040             id == BROADCOM_DEV_ID_5731X_VF ||
1041             id == BROADCOM_DEV_ID_5741X_VF)
1042                 return true;
1043         return false;
1044 }
1045
1046 static int bnxt_init_board(struct rte_eth_dev *eth_dev)
1047 {
1048         int rc;
1049         struct bnxt *bp = eth_dev->data->dev_private;
1050
1051         /* enable device (incl. PCI PM wakeup), and bus-mastering */
1052         if (!eth_dev->pci_dev->mem_resource[0].addr) {
1053                 RTE_LOG(ERR, PMD,
1054                         "Cannot find PCI device base address, aborting\n");
1055                 rc = -ENODEV;
1056                 goto init_err_disable;
1057         }
1058
1059         bp->eth_dev = eth_dev;
1060         bp->pdev = eth_dev->pci_dev;
1061
1062         bp->bar0 = (void *)eth_dev->pci_dev->mem_resource[0].addr;
1063         if (!bp->bar0) {
1064                 RTE_LOG(ERR, PMD, "Cannot map device registers, aborting\n");
1065                 rc = -ENOMEM;
1066                 goto init_err_release;
1067         }
1068         return 0;
1069
1070 init_err_release:
1071         if (bp->bar0)
1072                 bp->bar0 = NULL;
1073
1074 init_err_disable:
1075
1076         return rc;
1077 }
1078
1079 static int
1080 bnxt_dev_init(struct rte_eth_dev *eth_dev)
1081 {
1082         static int version_printed;
1083         struct bnxt *bp;
1084         int rc;
1085
1086         if (version_printed++ == 0)
1087                 RTE_LOG(INFO, PMD, "%s", bnxt_version);
1088
1089         rte_eth_copy_pci_info(eth_dev, eth_dev->pci_dev);
1090         bp = eth_dev->data->dev_private;
1091
1092         if (bnxt_vf_pciid(eth_dev->pci_dev->id.device_id))
1093                 bp->flags |= BNXT_FLAG_VF;
1094
1095         rc = bnxt_init_board(eth_dev);
1096         if (rc) {
1097                 RTE_LOG(ERR, PMD,
1098                         "Board initialization failed rc: %x\n", rc);
1099                 goto error;
1100         }
1101         eth_dev->dev_ops = &bnxt_dev_ops;
1102         eth_dev->rx_pkt_burst = &bnxt_recv_pkts;
1103         eth_dev->tx_pkt_burst = &bnxt_xmit_pkts;
1104
1105         rc = bnxt_alloc_hwrm_resources(bp);
1106         if (rc) {
1107                 RTE_LOG(ERR, PMD,
1108                         "hwrm resource allocation failure rc: %x\n", rc);
1109                 goto error_free;
1110         }
1111         rc = bnxt_hwrm_ver_get(bp);
1112         if (rc)
1113                 goto error_free;
1114         bnxt_hwrm_queue_qportcfg(bp);
1115
1116         bnxt_hwrm_func_qcfg(bp);
1117
1118         /* Get the MAX capabilities for this function */
1119         rc = bnxt_hwrm_func_qcaps(bp);
1120         if (rc) {
1121                 RTE_LOG(ERR, PMD, "hwrm query capability failure rc: %x\n", rc);
1122                 goto error_free;
1123         }
1124         eth_dev->data->mac_addrs = rte_zmalloc("bnxt_mac_addr_tbl",
1125                                         ETHER_ADDR_LEN * MAX_NUM_MAC_ADDR, 0);
1126         if (eth_dev->data->mac_addrs == NULL) {
1127                 RTE_LOG(ERR, PMD,
1128                         "Failed to alloc %u bytes needed to store MAC addr tbl",
1129                         ETHER_ADDR_LEN * MAX_NUM_MAC_ADDR);
1130                 rc = -ENOMEM;
1131                 goto error_free;
1132         }
1133         /* Copy the permanent MAC from the qcap response address now. */
1134         if (BNXT_PF(bp))
1135                 memcpy(bp->mac_addr, bp->pf.mac_addr, sizeof(bp->mac_addr));
1136         else
1137                 memcpy(bp->mac_addr, bp->vf.mac_addr, sizeof(bp->mac_addr));
1138         memcpy(&eth_dev->data->mac_addrs[0], bp->mac_addr, ETHER_ADDR_LEN);
1139         bp->grp_info = rte_zmalloc("bnxt_grp_info",
1140                                 sizeof(*bp->grp_info) * bp->max_ring_grps, 0);
1141         if (!bp->grp_info) {
1142                 RTE_LOG(ERR, PMD,
1143                         "Failed to alloc %zu bytes needed to store group info table\n",
1144                         sizeof(*bp->grp_info) * bp->max_ring_grps);
1145                 rc = -ENOMEM;
1146                 goto error_free;
1147         }
1148
1149         rc = bnxt_hwrm_func_driver_register(bp, 0,
1150                                             bp->pf.vf_req_fwd);
1151         if (rc) {
1152                 RTE_LOG(ERR, PMD,
1153                         "Failed to register driver");
1154                 rc = -EBUSY;
1155                 goto error_free;
1156         }
1157
1158         RTE_LOG(INFO, PMD,
1159                 DRV_MODULE_NAME " found at mem %" PRIx64 ", node addr %pM\n",
1160                 eth_dev->pci_dev->mem_resource[0].phys_addr,
1161                 eth_dev->pci_dev->mem_resource[0].addr);
1162
1163         bp->dev_stopped = 0;
1164
1165         return 0;
1166
1167 error_free:
1168         eth_dev->driver->eth_dev_uninit(eth_dev);
1169 error:
1170         return rc;
1171 }
1172
1173 static int
1174 bnxt_dev_uninit(struct rte_eth_dev *eth_dev) {
1175         struct bnxt *bp = eth_dev->data->dev_private;
1176         int rc;
1177
1178         if (eth_dev->data->mac_addrs != NULL) {
1179                 rte_free(eth_dev->data->mac_addrs);
1180                 eth_dev->data->mac_addrs = NULL;
1181         }
1182         if (bp->grp_info != NULL) {
1183                 rte_free(bp->grp_info);
1184                 bp->grp_info = NULL;
1185         }
1186         rc = bnxt_hwrm_func_driver_unregister(bp, 0);
1187         bnxt_free_hwrm_resources(bp);
1188         if (bp->dev_stopped == 0)
1189                 bnxt_dev_close_op(eth_dev);
1190         eth_dev->dev_ops = NULL;
1191         eth_dev->rx_pkt_burst = NULL;
1192         eth_dev->tx_pkt_burst = NULL;
1193
1194         return rc;
1195 }
1196
1197 static struct eth_driver bnxt_rte_pmd = {
1198         .pci_drv = {
1199                     .id_table = bnxt_pci_id_map,
1200                     .drv_flags = RTE_PCI_DRV_NEED_MAPPING |
1201                             RTE_PCI_DRV_DETACHABLE | RTE_PCI_DRV_INTR_LSC,
1202                     .probe = rte_eth_dev_pci_probe,
1203                     .remove = rte_eth_dev_pci_remove
1204                     },
1205         .eth_dev_init = bnxt_dev_init,
1206         .eth_dev_uninit = bnxt_dev_uninit,
1207         .dev_private_size = sizeof(struct bnxt),
1208 };
1209
1210 RTE_PMD_REGISTER_PCI(net_bnxt, bnxt_rte_pmd.pci_drv);
1211 RTE_PMD_REGISTER_PCI_TABLE(net_bnxt, bnxt_pci_id_map);