drivers/net/bnxt/bnxt_ethdev.c

   1 /*-
   2  *   BSD LICENSE
   3  *
   4  *   Copyright(c) Broadcom Limited.
   5  *   All rights reserved.
   6  *
   7  *   Redistribution and use in source and binary forms, with or without
   8  *   modification, are permitted provided that the following conditions
   9  *   are met:
  10  *
  11  *     * Redistributions of source code must retain the above copyright
  12  *       notice, this list of conditions and the following disclaimer.
  13  *     * Redistributions in binary form must reproduce the above copyright
  14  *       notice, this list of conditions and the following disclaimer in
  15  *       the documentation and/or other materials provided with the
  16  *       distribution.
  17  *     * Neither the name of Broadcom Corporation nor the names of its
  18  *       contributors may be used to endorse or promote products derived
  19  *       from this software without specific prior written permission.
  20  *
  21  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  22  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  23  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  24  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  25  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  26  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  27  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  28  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  29  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32  */
  33
  34 #include <inttypes.h>
  35 #include <stdbool.h>
  36
  37 #include <rte_dev.h>
  38 #include <rte_ethdev.h>
  39 #include <rte_malloc.h>
  40 #include <rte_cycles.h>
  41
  42 #include "bnxt.h"
  43 #include "bnxt_cpr.h"
  44 #include "bnxt_filter.h"
  45 #include "bnxt_hwrm.h"
  46 #include "bnxt_ring.h"
  47 #include "bnxt_rxq.h"
  48 #include "bnxt_rxr.h"
  49 #include "bnxt_stats.h"
  50 #include "bnxt_txq.h"
  51 #include "bnxt_txr.h"
  52 #include "bnxt_vnic.h"
  53 #include "hsi_struct_def_dpdk.h"
  54
  55 #define DRV_MODULE_NAME         "bnxt"
  56 static const char bnxt_version[] =
  57         "Broadcom Cumulus driver " DRV_MODULE_NAME "\n";
  58
  59 static struct rte_pci_id bnxt_pci_id_map[] = {
  60 #define RTE_PCI_DEV_ID_DECL_BNXT(vend, dev) {RTE_PCI_DEVICE(vend, dev)},
  61 #include "rte_pci_dev_ids.h"
  62         {.device_id = 0},
  63 };
  64
  65 #define BNXT_ETH_RSS_SUPPORT (  \
  66         ETH_RSS_IPV4 |          \
  67         ETH_RSS_NONFRAG_IPV4_TCP |      \
  68         ETH_RSS_NONFRAG_IPV4_UDP |      \
  69         ETH_RSS_IPV6 |          \
  70         ETH_RSS_NONFRAG_IPV6_TCP |      \
  71         ETH_RSS_NONFRAG_IPV6_UDP)
  72
  73 /***********************/
  74
  75 /*
  76  * High level utility functions
  77  */
  78
  79 static void bnxt_free_mem(struct bnxt *bp)
  80 {
  81         bnxt_free_filter_mem(bp);
  82         bnxt_free_vnic_attributes(bp);
  83         bnxt_free_vnic_mem(bp);
  84
  85         bnxt_free_stats(bp);
  86         bnxt_free_tx_rings(bp);
  87         bnxt_free_rx_rings(bp);
  88         bnxt_free_def_cp_ring(bp);
  89 }
  90
  91 static int bnxt_alloc_mem(struct bnxt *bp)
  92 {
  93         int rc;
  94
  95         /* Default completion ring */
  96         rc = bnxt_init_def_ring_struct(bp, SOCKET_ID_ANY);
  97         if (rc)
  98                 goto alloc_mem_err;
  99
 100         rc = bnxt_alloc_rings(bp, 0, NULL, NULL,
 101                               bp->def_cp_ring, "def_cp");
 102         if (rc)
 103                 goto alloc_mem_err;
 104
 105         rc = bnxt_alloc_vnic_mem(bp);
 106         if (rc)
 107                 goto alloc_mem_err;
 108
 109         rc = bnxt_alloc_vnic_attributes(bp);
 110         if (rc)
 111                 goto alloc_mem_err;
 112
 113         rc = bnxt_alloc_filter_mem(bp);
 114         if (rc)
 115                 goto alloc_mem_err;
 116
 117         return 0;
 118
 119 alloc_mem_err:
 120         bnxt_free_mem(bp);
 121         return rc;
 122 }
 123
 124 static int bnxt_init_chip(struct bnxt *bp)
 125 {
 126         unsigned int i, rss_idx, fw_idx;
 127         int rc;
 128
 129         rc = bnxt_alloc_all_hwrm_stat_ctxs(bp);
 130         if (rc) {
 131                 RTE_LOG(ERR, PMD, "HWRM stat ctx alloc failure rc: %x\n", rc);
 132                 goto err_out;
 133         }
 134
 135         rc = bnxt_alloc_hwrm_rings(bp);
 136         if (rc) {
 137                 RTE_LOG(ERR, PMD, "HWRM ring alloc failure rc: %x\n", rc);
 138                 goto err_out;
 139         }
 140
 141         rc = bnxt_alloc_all_hwrm_ring_grps(bp);
 142         if (rc) {
 143                 RTE_LOG(ERR, PMD, "HWRM ring grp alloc failure: %x\n", rc);
 144                 goto err_out;
 145         }
 146
 147         rc = bnxt_mq_rx_configure(bp);
 148         if (rc) {
 149                 RTE_LOG(ERR, PMD, "MQ mode configure failure rc: %x\n", rc);
 150                 goto err_out;
 151         }
 152
 153         /* VNIC configuration */
 154         for (i = 0; i < bp->nr_vnics; i++) {
 155                 struct bnxt_vnic_info *vnic = &bp->vnic_info[i];
 156
 157                 rc = bnxt_hwrm_vnic_alloc(bp, vnic);
 158                 if (rc) {
 159                         RTE_LOG(ERR, PMD, "HWRM vnic alloc failure rc: %x\n",
 160                                 rc);
 161                         goto err_out;
 162                 }
 163
 164                 rc = bnxt_hwrm_vnic_ctx_alloc(bp, vnic);
 165                 if (rc) {
 166                         RTE_LOG(ERR, PMD,
 167                                 "HWRM vnic ctx alloc failure rc: %x\n", rc);
 168                         goto err_out;
 169                 }
 170
 171                 rc = bnxt_hwrm_vnic_cfg(bp, vnic);
 172                 if (rc) {
 173                         RTE_LOG(ERR, PMD, "HWRM vnic cfg failure rc: %x\n", rc);
 174                         goto err_out;
 175                 }
 176
 177                 rc = bnxt_set_hwrm_vnic_filters(bp, vnic);
 178                 if (rc) {
 179                         RTE_LOG(ERR, PMD, "HWRM vnic filter failure rc: %x\n",
 180                                 rc);
 181                         goto err_out;
 182                 }
 183                 if (vnic->rss_table && vnic->hash_type) {
 184                         /*
 185                          * Fill the RSS hash & redirection table with
 186                          * ring group ids for all VNICs
 187                          */
 188                         for (rss_idx = 0, fw_idx = 0;
 189                              rss_idx < HW_HASH_INDEX_SIZE;
 190                              rss_idx++, fw_idx++) {
 191                                 if (vnic->fw_grp_ids[fw_idx] ==
 192                                     INVALID_HW_RING_ID)
 193                                         fw_idx = 0;
 194                                 vnic->rss_table[rss_idx] =
 195                                                 vnic->fw_grp_ids[fw_idx];
 196                         }
 197                         rc = bnxt_hwrm_vnic_rss_cfg(bp, vnic);
 198                         if (rc) {
 199                                 RTE_LOG(ERR, PMD,
 200                                         "HWRM vnic set RSS failure rc: %x\n",
 201                                         rc);
 202                                 goto err_out;
 203                         }
 204                 }
 205         }
 206         rc = bnxt_hwrm_cfa_l2_set_rx_mask(bp, &bp->vnic_info[0]);
 207         if (rc) {
 208                 RTE_LOG(ERR, PMD,
 209                         "HWRM cfa l2 rx mask failure rc: %x\n", rc);
 210                 goto err_out;
 211         }
 212
 213         return 0;
 214
 215 err_out:
 216         bnxt_free_all_hwrm_resources(bp);
 217
 218         return rc;
 219 }
 220
 221 static int bnxt_shutdown_nic(struct bnxt *bp)
 222 {
 223         bnxt_free_all_hwrm_resources(bp);
 224         bnxt_free_all_filters(bp);
 225         bnxt_free_all_vnics(bp);
 226         return 0;
 227 }
 228
 229 static int bnxt_init_nic(struct bnxt *bp)
 230 {
 231         int rc;
 232
 233         bnxt_init_ring_grps(bp);
 234         bnxt_init_vnics(bp);
 235         bnxt_init_filters(bp);
 236
 237         rc = bnxt_init_chip(bp);
 238         if (rc)
 239                 return rc;
 240
 241         return 0;
 242 }
 243
 244 /*
 245  * Device configuration and status function
 246  */
 247
 248 static void bnxt_dev_info_get_op(struct rte_eth_dev *eth_dev,
 249                                   struct rte_eth_dev_info *dev_info)
 250 {
 251         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 252         uint16_t max_vnics, i, j, vpool, vrxq;
 253
 254         /* MAC Specifics */
 255         dev_info->max_mac_addrs = MAX_NUM_MAC_ADDR;
 256         dev_info->max_hash_mac_addrs = 0;
 257
 258         /* PF/VF specifics */
 259         if (BNXT_PF(bp)) {
 260                 dev_info->max_rx_queues = bp->pf.max_rx_rings;
 261                 dev_info->max_tx_queues = bp->pf.max_tx_rings;
 262                 dev_info->max_vfs = bp->pf.active_vfs;
 263                 dev_info->reta_size = bp->pf.max_rsscos_ctx;
 264                 max_vnics = bp->pf.max_vnics;
 265         } else {
 266                 dev_info->max_rx_queues = bp->vf.max_rx_rings;
 267                 dev_info->max_tx_queues = bp->vf.max_tx_rings;
 268                 dev_info->reta_size = bp->vf.max_rsscos_ctx;
 269                 max_vnics = bp->vf.max_vnics;
 270         }
 271
 272         /* Fast path specifics */
 273         dev_info->min_rx_bufsize = 1;
 274         dev_info->max_rx_pktlen = BNXT_MAX_MTU + ETHER_HDR_LEN + ETHER_CRC_LEN
 275                                   + VLAN_TAG_SIZE;
 276         dev_info->rx_offload_capa = 0;
 277         dev_info->tx_offload_capa = DEV_TX_OFFLOAD_IPV4_CKSUM |
 278                                         DEV_TX_OFFLOAD_TCP_CKSUM |
 279                                         DEV_TX_OFFLOAD_UDP_CKSUM |
 280                                         DEV_TX_OFFLOAD_TCP_TSO;
 281
 282         /* *INDENT-OFF* */
 283         dev_info->default_rxconf = (struct rte_eth_rxconf) {
 284                 .rx_thresh = {
 285                         .pthresh = 8,
 286                         .hthresh = 8,
 287                         .wthresh = 0,
 288                 },
 289                 .rx_free_thresh = 32,
 290                 .rx_drop_en = 0,
 291         };
 292
 293         dev_info->default_txconf = (struct rte_eth_txconf) {
 294                 .tx_thresh = {
 295                         .pthresh = 32,
 296                         .hthresh = 0,
 297                         .wthresh = 0,
 298                 },
 299                 .tx_free_thresh = 32,
 300                 .tx_rs_thresh = 32,
 301                 .txq_flags = ETH_TXQ_FLAGS_NOMULTSEGS |
 302                              ETH_TXQ_FLAGS_NOOFFLOADS,
 303         };
 304         /* *INDENT-ON* */
 305
 306         /*
 307          * TODO: default_rxconf, default_txconf, rx_desc_lim, and tx_desc_lim
 308          *       need further investigation.
 309          */
 310
 311         /* VMDq resources */
 312         vpool = 64; /* ETH_64_POOLS */
 313         vrxq = 128; /* ETH_VMDQ_DCB_NUM_QUEUES */
 314         for (i = 0; i < 4; vpool >>= 1, i++) {
 315                 if (max_vnics > vpool) {
 316                         for (j = 0; j < 5; vrxq >>= 1, j++) {
 317                                 if (dev_info->max_rx_queues > vrxq) {
 318                                         if (vpool > vrxq)
 319                                                 vpool = vrxq;
 320                                         goto found;
 321                                 }
 322                         }
 323                         /* Not enough resources to support VMDq */
 324                         break;
 325                 }
 326         }
 327         /* Not enough resources to support VMDq */
 328         vpool = 0;
 329         vrxq = 0;
 330 found:
 331         dev_info->max_vmdq_pools = vpool;
 332         dev_info->vmdq_queue_num = vrxq;
 333
 334         dev_info->vmdq_pool_base = 0;
 335         dev_info->vmdq_queue_base = 0;
 336 }
 337
 338 /* Configure the device based on the configuration provided */
 339 static int bnxt_dev_configure_op(struct rte_eth_dev *eth_dev)
 340 {
 341         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 342         int rc;
 343
 344         bp->rx_queues = (void *)eth_dev->data->rx_queues;
 345         bp->tx_queues = (void *)eth_dev->data->tx_queues;
 346
 347         /* Inherit new configurations */
 348         bp->rx_nr_rings = eth_dev->data->nb_rx_queues;
 349         bp->tx_nr_rings = eth_dev->data->nb_tx_queues;
 350         bp->rx_cp_nr_rings = bp->rx_nr_rings;
 351         bp->tx_cp_nr_rings = bp->tx_nr_rings;
 352
 353         if (eth_dev->data->dev_conf.rxmode.jumbo_frame)
 354                 eth_dev->data->mtu =
 355                                 eth_dev->data->dev_conf.rxmode.max_rx_pkt_len -
 356                                 ETHER_HDR_LEN - ETHER_CRC_LEN - VLAN_TAG_SIZE;
 357         rc = bnxt_set_hwrm_link_config(bp, true);
 358         return rc;
 359 }
 360
 361 static int bnxt_dev_start_op(struct rte_eth_dev *eth_dev)
 362 {
 363         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 364         int rc;
 365
 366         rc = bnxt_hwrm_func_reset(bp);
 367         if (rc) {
 368                 RTE_LOG(ERR, PMD, "hwrm chip reset failure rc: %x\n", rc);
 369                 rc = -1;
 370                 goto error;
 371         }
 372
 373         rc = bnxt_alloc_mem(bp);
 374         if (rc)
 375                 goto error;
 376
 377         rc = bnxt_init_nic(bp);
 378         if (rc)
 379                 goto error;
 380
 381         return 0;
 382
 383 error:
 384         bnxt_shutdown_nic(bp);
 385         bnxt_free_tx_mbufs(bp);
 386         bnxt_free_rx_mbufs(bp);
 387         bnxt_free_mem(bp);
 388         return rc;
 389 }
 390
 391 static int bnxt_dev_set_link_up_op(struct rte_eth_dev *eth_dev)
 392 {
 393         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 394
 395         eth_dev->data->dev_link.link_status = 1;
 396         bnxt_set_hwrm_link_config(bp, true);
 397         return 0;
 398 }
 399
 400 static int bnxt_dev_set_link_down_op(struct rte_eth_dev *eth_dev)
 401 {
 402         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 403
 404         eth_dev->data->dev_link.link_status = 0;
 405         bnxt_set_hwrm_link_config(bp, false);
 406         return 0;
 407 }
 408
 409 static void bnxt_dev_close_op(struct rte_eth_dev *eth_dev)
 410 {
 411         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 412
 413         bnxt_free_tx_mbufs(bp);
 414         bnxt_free_rx_mbufs(bp);
 415         bnxt_free_mem(bp);
 416         rte_free(eth_dev->data->mac_addrs);
 417 }
 418
 419 /* Unload the driver, release resources */
 420 static void bnxt_dev_stop_op(struct rte_eth_dev *eth_dev)
 421 {
 422         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 423
 424         if (bp->eth_dev->data->dev_started) {
 425                 /* TBD: STOP HW queues DMA */
 426                 eth_dev->data->dev_link.link_status = 0;
 427         }
 428         bnxt_shutdown_nic(bp);
 429 }
 430
 431 static void bnxt_mac_addr_remove_op(struct rte_eth_dev *eth_dev,
 432                                     uint32_t index)
 433 {
 434         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 435         uint64_t pool_mask = eth_dev->data->mac_pool_sel[index];
 436         struct bnxt_vnic_info *vnic;
 437         struct bnxt_filter_info *filter, *temp_filter;
 438         int i;
 439
 440         /*
 441          * Loop through all VNICs from the specified filter flow pools to
 442          * remove the corresponding MAC addr filter
 443          */
 444         for (i = 0; i < MAX_FF_POOLS; i++) {
 445                 if (!(pool_mask & (1 << i)))
 446                         continue;
 447
 448                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
 449                         filter = STAILQ_FIRST(&vnic->filter);
 450                         while (filter) {
 451                                 temp_filter = STAILQ_NEXT(filter, next);
 452                                 if (filter->mac_index == index) {
 453                                         STAILQ_REMOVE(&vnic->filter, filter,
 454                                                       bnxt_filter_info, next);
 455                                         bnxt_hwrm_clear_filter(bp, filter);
 456                                         filter->mac_index = INVALID_MAC_INDEX;
 457                                         memset(&filter->l2_addr, 0,
 458                                                ETHER_ADDR_LEN);
 459                                         STAILQ_INSERT_TAIL(
 460                                                         &bp->free_filter_list,
 461                                                         filter, next);
 462                                 }
 463                                 filter = temp_filter;
 464                         }
 465                 }
 466         }
 467 }
 468
 469 static void bnxt_mac_addr_add_op(struct rte_eth_dev *eth_dev,
 470                                  struct ether_addr *mac_addr,
 471                                  uint32_t index, uint32_t pool)
 472 {
 473         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 474         struct bnxt_vnic_info *vnic = STAILQ_FIRST(&bp->ff_pool[pool]);
 475         struct bnxt_filter_info *filter;
 476
 477         if (!vnic) {
 478                 RTE_LOG(ERR, PMD, "VNIC not found for pool %d!\n", pool);
 479                 return;
 480         }
 481         /* Attach requested MAC address to the new l2_filter */
 482         STAILQ_FOREACH(filter, &vnic->filter, next) {
 483                 if (filter->mac_index == index) {
 484                         RTE_LOG(ERR, PMD,
 485                                 "MAC addr already existed for pool %d\n", pool);
 486                         return;
 487                 }
 488         }
 489         filter = bnxt_alloc_filter(bp);
 490         if (!filter) {
 491                 RTE_LOG(ERR, PMD, "L2 filter alloc failed\n");
 492                 return;
 493         }
 494         STAILQ_INSERT_TAIL(&vnic->filter, filter, next);
 495         filter->mac_index = index;
 496         memcpy(filter->l2_addr, mac_addr, ETHER_ADDR_LEN);
 497         bnxt_hwrm_set_filter(bp, vnic, filter);
 498 }
 499
 500 static int bnxt_link_update_op(struct rte_eth_dev *eth_dev,
 501                                int wait_to_complete)
 502 {
 503         int rc = 0;
 504         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 505         struct rte_eth_link new;
 506         unsigned int cnt = BNXT_LINK_WAIT_CNT;
 507
 508         memset(&new, 0, sizeof(new));
 509         do {
 510                 /* Retrieve link info from hardware */
 511                 rc = bnxt_get_hwrm_link_config(bp, &new);
 512                 if (rc) {
 513                         new.link_speed = ETH_LINK_SPEED_100M;
 514                         new.link_duplex = ETH_LINK_FULL_DUPLEX;
 515                         RTE_LOG(ERR, PMD,
 516                                 "Failed to retrieve link rc = 0x%x!", rc);
 517                         goto out;
 518                 }
 519                 if (!wait_to_complete)
 520                         break;
 521
 522                 rte_delay_ms(BNXT_LINK_WAIT_INTERVAL);
 523
 524         } while (!new.link_status && cnt--);
 525
 526         /* Timed out or success */
 527         if (new.link_status) {
 528                 /* Update only if success */
 529                 eth_dev->data->dev_link.link_duplex = new.link_duplex;
 530                 eth_dev->data->dev_link.link_speed = new.link_speed;
 531         }
 532         eth_dev->data->dev_link.link_status = new.link_status;
 533 out:
 534         return rc;
 535 }
 536
 537 static void bnxt_promiscuous_enable_op(struct rte_eth_dev *eth_dev)
 538 {
 539         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 540         struct bnxt_vnic_info *vnic;
 541
 542         if (bp->vnic_info == NULL)
 543                 return;
 544
 545         vnic = &bp->vnic_info[0];
 546
 547         vnic->flags |= BNXT_VNIC_INFO_PROMISC;
 548         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic);
 549 }
 550
 551 static void bnxt_promiscuous_disable_op(struct rte_eth_dev *eth_dev)
 552 {
 553         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 554         struct bnxt_vnic_info *vnic;
 555
 556         if (bp->vnic_info == NULL)
 557                 return;
 558
 559         vnic = &bp->vnic_info[0];
 560
 561         vnic->flags &= ~BNXT_VNIC_INFO_PROMISC;
 562         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic);
 563 }
 564
 565 static void bnxt_allmulticast_enable_op(struct rte_eth_dev *eth_dev)
 566 {
 567         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 568         struct bnxt_vnic_info *vnic;
 569
 570         if (bp->vnic_info == NULL)
 571                 return;
 572
 573         vnic = &bp->vnic_info[0];
 574
 575         vnic->flags |= BNXT_VNIC_INFO_ALLMULTI;
 576         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic);
 577 }
 578
 579 static void bnxt_allmulticast_disable_op(struct rte_eth_dev *eth_dev)
 580 {
 581         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 582         struct bnxt_vnic_info *vnic;
 583
 584         if (bp->vnic_info == NULL)
 585                 return;
 586
 587         vnic = &bp->vnic_info[0];
 588
 589         vnic->flags &= ~BNXT_VNIC_INFO_ALLMULTI;
 590         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic);
 591 }
 592
 593 static int bnxt_reta_update_op(struct rte_eth_dev *eth_dev,
 594                             struct rte_eth_rss_reta_entry64 *reta_conf,
 595                             uint16_t reta_size)
 596 {
 597         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 598         struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
 599         struct bnxt_vnic_info *vnic;
 600         int i;
 601
 602         if (!(dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG))
 603                 return -EINVAL;
 604
 605         if (reta_size != HW_HASH_INDEX_SIZE) {
 606                 RTE_LOG(ERR, PMD, "The configured hash table lookup size "
 607                         "(%d) must equal the size supported by the hardware "
 608                         "(%d)\n", reta_size, HW_HASH_INDEX_SIZE);
 609                 return -EINVAL;
 610         }
 611         /* Update the RSS VNIC(s) */
 612         for (i = 0; i < MAX_FF_POOLS; i++) {
 613                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
 614                         memcpy(vnic->rss_table, reta_conf, reta_size);
 615
 616                         bnxt_hwrm_vnic_rss_cfg(bp, vnic);
 617                 }
 618         }
 619         return 0;
 620 }
 621
 622 static int bnxt_reta_query_op(struct rte_eth_dev *eth_dev,
 623                               struct rte_eth_rss_reta_entry64 *reta_conf,
 624                               uint16_t reta_size)
 625 {
 626         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 627         struct bnxt_vnic_info *vnic = &bp->vnic_info[0];
 628
 629         /* Retrieve from the default VNIC */
 630         if (!vnic)
 631                 return -EINVAL;
 632         if (!vnic->rss_table)
 633                 return -EINVAL;
 634
 635         if (reta_size != HW_HASH_INDEX_SIZE) {
 636                 RTE_LOG(ERR, PMD, "The configured hash table lookup size "
 637                         "(%d) must equal the size supported by the hardware "
 638                         "(%d)\n", reta_size, HW_HASH_INDEX_SIZE);
 639                 return -EINVAL;
 640         }
 641         /* EW - need to revisit here copying from u64 to u16 */
 642         memcpy(reta_conf, vnic->rss_table, reta_size);
 643
 644         return 0;
 645 }
 646
 647 static int bnxt_rss_hash_update_op(struct rte_eth_dev *eth_dev,
 648                                    struct rte_eth_rss_conf *rss_conf)
 649 {
 650         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 651         struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
 652         struct bnxt_vnic_info *vnic;
 653         uint16_t hash_type = 0;
 654         int i;
 655
 656         /*
 657          * If RSS enablement were different than dev_configure,
 658          * then return -EINVAL
 659          */
 660         if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) {
 661                 if (!rss_conf->rss_hf)
 662                         return -EINVAL;
 663         } else {
 664                 if (rss_conf->rss_hf & BNXT_ETH_RSS_SUPPORT)
 665                         return -EINVAL;
 666         }
 667         if (rss_conf->rss_hf & ETH_RSS_IPV4)
 668                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4;
 669         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV4_TCP)
 670                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4;
 671         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV4_UDP)
 672                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4;
 673         if (rss_conf->rss_hf & ETH_RSS_IPV6)
 674                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6;
 675         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV6_TCP)
 676                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6;
 677         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV6_UDP)
 678                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6;
 679
 680         /* Update the RSS VNIC(s) */
 681         for (i = 0; i < MAX_FF_POOLS; i++) {
 682                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
 683                         vnic->hash_type = hash_type;
 684
 685                         /*
 686                          * Use the supplied key if the key length is
 687                          * acceptable and the rss_key is not NULL
 688                          */
 689                         if (rss_conf->rss_key &&
 690                             rss_conf->rss_key_len <= HW_HASH_KEY_SIZE)
 691                                 memcpy(vnic->rss_hash_key, rss_conf->rss_key,
 692                                        rss_conf->rss_key_len);
 693
 694                         bnxt_hwrm_vnic_rss_cfg(bp, vnic);
 695                 }
 696         }
 697         return 0;
 698 }
 699
 700 static int bnxt_rss_hash_conf_get_op(struct rte_eth_dev *eth_dev,
 701                                      struct rte_eth_rss_conf *rss_conf)
 702 {
 703         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 704         struct bnxt_vnic_info *vnic = &bp->vnic_info[0];
 705         int len;
 706         uint32_t hash_types;
 707
 708         /* RSS configuration is the same for all VNICs */
 709         if (vnic && vnic->rss_hash_key) {
 710                 if (rss_conf->rss_key) {
 711                         len = rss_conf->rss_key_len <= HW_HASH_KEY_SIZE ?
 712                               rss_conf->rss_key_len : HW_HASH_KEY_SIZE;
 713                         memcpy(rss_conf->rss_key, vnic->rss_hash_key, len);
 714                 }
 715
 716                 hash_types = vnic->hash_type;
 717                 rss_conf->rss_hf = 0;
 718                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4) {
 719                         rss_conf->rss_hf |= ETH_RSS_IPV4;
 720                         hash_types &= ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4;
 721                 }
 722                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4) {
 723                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV4_TCP;
 724                         hash_types &=
 725                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4;
 726                 }
 727                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4) {
 728                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV4_UDP;
 729                         hash_types &=
 730                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4;
 731                 }
 732                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6) {
 733                         rss_conf->rss_hf |= ETH_RSS_IPV6;
 734                         hash_types &= ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6;
 735                 }
 736                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6) {
 737                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV6_TCP;
 738                         hash_types &=
 739                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6;
 740                 }
 741                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6) {
 742                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV6_UDP;
 743                         hash_types &=
 744                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6;
 745                 }
 746                 if (hash_types) {
 747                         RTE_LOG(ERR, PMD,
 748                                 "Unknwon RSS config from firmware (%08x), RSS disabled",
 749                                 vnic->hash_type);
 750                         return -ENOTSUP;
 751                 }
 752         } else {
 753                 rss_conf->rss_hf = 0;
 754         }
 755         return 0;
 756 }
 757
 758 static int bnxt_flow_ctrl_get_op(struct rte_eth_dev *dev,
 759                                struct rte_eth_fc_conf *fc_conf __rte_unused)
 760 {
 761         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
 762         struct rte_eth_link link_info;
 763         int rc;
 764
 765         rc = bnxt_get_hwrm_link_config(bp, &link_info);
 766         if (rc)
 767                 return rc;
 768
 769         memset(fc_conf, 0, sizeof(*fc_conf));
 770         if (bp->link_info.auto_pause)
 771                 fc_conf->autoneg = 1;
 772         switch (bp->link_info.pause) {
 773         case 0:
 774                 fc_conf->mode = RTE_FC_NONE;
 775                 break;
 776         case HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_TX:
 777                 fc_conf->mode = RTE_FC_TX_PAUSE;
 778                 break;
 779         case HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_RX:
 780                 fc_conf->mode = RTE_FC_RX_PAUSE;
 781                 break;
 782         case (HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_TX |
 783                         HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_RX):
 784                 fc_conf->mode = RTE_FC_FULL;
 785                 break;
 786         }
 787         return 0;
 788 }
 789
 790 static int bnxt_flow_ctrl_set_op(struct rte_eth_dev *dev,
 791                                struct rte_eth_fc_conf *fc_conf)
 792 {
 793         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
 794
 795         switch (fc_conf->mode) {
 796         case RTE_FC_NONE:
 797                 bp->link_info.auto_pause = 0;
 798                 bp->link_info.force_pause = 0;
 799                 break;
 800         case RTE_FC_RX_PAUSE:
 801                 if (fc_conf->autoneg) {
 802                         bp->link_info.auto_pause =
 803                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_RX;
 804                         bp->link_info.force_pause = 0;
 805                 } else {
 806                         bp->link_info.auto_pause = 0;
 807                         bp->link_info.force_pause =
 808                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_RX;
 809                 }
 810                 break;
 811         case RTE_FC_TX_PAUSE:
 812                 if (fc_conf->autoneg) {
 813                         bp->link_info.auto_pause =
 814                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_TX;
 815                         bp->link_info.force_pause = 0;
 816                 } else {
 817                         bp->link_info.auto_pause = 0;
 818                         bp->link_info.force_pause =
 819                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_TX;
 820                 }
 821                 break;
 822         case RTE_FC_FULL:
 823                 if (fc_conf->autoneg) {
 824                         bp->link_info.auto_pause =
 825                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_TX |
 826                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_RX;
 827                         bp->link_info.force_pause = 0;
 828                 } else {
 829                         bp->link_info.auto_pause = 0;
 830                         bp->link_info.force_pause =
 831                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_TX |
 832                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_RX;
 833                 }
 834                 break;
 835         }
 836         return bnxt_set_hwrm_link_config(bp, true);
 837 }
 838
 839 /*
 840  * Initialization
 841  */
 842
 843 static struct eth_dev_ops bnxt_dev_ops = {
 844         .dev_infos_get = bnxt_dev_info_get_op,
 845         .dev_close = bnxt_dev_close_op,
 846         .dev_configure = bnxt_dev_configure_op,
 847         .dev_start = bnxt_dev_start_op,
 848         .dev_stop = bnxt_dev_stop_op,
 849         .dev_set_link_up = bnxt_dev_set_link_up_op,
 850         .dev_set_link_down = bnxt_dev_set_link_down_op,
 851         .stats_get = bnxt_stats_get_op,
 852         .stats_reset = bnxt_stats_reset_op,
 853         .rx_queue_setup = bnxt_rx_queue_setup_op,
 854         .rx_queue_release = bnxt_rx_queue_release_op,
 855         .tx_queue_setup = bnxt_tx_queue_setup_op,
 856         .tx_queue_release = bnxt_tx_queue_release_op,
 857         .reta_update = bnxt_reta_update_op,
 858         .reta_query = bnxt_reta_query_op,
 859         .rss_hash_update = bnxt_rss_hash_update_op,
 860         .rss_hash_conf_get = bnxt_rss_hash_conf_get_op,
 861         .link_update = bnxt_link_update_op,
 862         .promiscuous_enable = bnxt_promiscuous_enable_op,
 863         .promiscuous_disable = bnxt_promiscuous_disable_op,
 864         .allmulticast_enable = bnxt_allmulticast_enable_op,
 865         .allmulticast_disable = bnxt_allmulticast_disable_op,
 866         .mac_addr_add = bnxt_mac_addr_add_op,
 867         .mac_addr_remove = bnxt_mac_addr_remove_op,
 868         .flow_ctrl_get = bnxt_flow_ctrl_get_op,
 869         .flow_ctrl_set = bnxt_flow_ctrl_set_op,
 870 };
 871
 872 static bool bnxt_vf_pciid(uint16_t id)
 873 {
 874         if (id == BROADCOM_DEV_ID_57304_VF ||
 875             id == BROADCOM_DEV_ID_57406_VF)
 876                 return true;
 877         return false;
 878 }
 879
 880 static int bnxt_init_board(struct rte_eth_dev *eth_dev)
 881 {
 882         int rc;
 883         struct bnxt *bp = eth_dev->data->dev_private;
 884
 885         /* enable device (incl. PCI PM wakeup), and bus-mastering */
 886         if (!eth_dev->pci_dev->mem_resource[0].addr) {
 887                 RTE_LOG(ERR, PMD,
 888                         "Cannot find PCI device base address, aborting\n");
 889                 rc = -ENODEV;
 890                 goto init_err_disable;
 891         }
 892
 893         bp->eth_dev = eth_dev;
 894         bp->pdev = eth_dev->pci_dev;
 895
 896         bp->bar0 = (void *)eth_dev->pci_dev->mem_resource[0].addr;
 897         if (!bp->bar0) {
 898                 RTE_LOG(ERR, PMD, "Cannot map device registers, aborting\n");
 899                 rc = -ENOMEM;
 900                 goto init_err_release;
 901         }
 902         return 0;
 903
 904 init_err_release:
 905         if (bp->bar0)
 906                 bp->bar0 = NULL;
 907
 908 init_err_disable:
 909
 910         return rc;
 911 }
 912
 913 static int
 914 bnxt_dev_init(struct rte_eth_dev *eth_dev)
 915 {
 916         static int version_printed;
 917         struct bnxt *bp;
 918         int rc;
 919
 920         if (version_printed++ == 0)
 921                 RTE_LOG(INFO, PMD, "%s", bnxt_version);
 922
 923         if (eth_dev->pci_dev->addr.function >= 2 &&
 924                         eth_dev->pci_dev->addr.function < 4) {
 925                 RTE_LOG(ERR, PMD, "Function not enabled %x:\n",
 926                         eth_dev->pci_dev->addr.function);
 927                 rc = -ENOMEM;
 928                 goto error;
 929         }
 930
 931         rte_eth_copy_pci_info(eth_dev, eth_dev->pci_dev);
 932         bp = eth_dev->data->dev_private;
 933
 934         if (bnxt_vf_pciid(eth_dev->pci_dev->id.device_id))
 935                 bp->flags |= BNXT_FLAG_VF;
 936
 937         rc = bnxt_init_board(eth_dev);
 938         if (rc) {
 939                 RTE_LOG(ERR, PMD,
 940                         "Board initialization failed rc: %x\n", rc);
 941                 goto error;
 942         }
 943         eth_dev->dev_ops = &bnxt_dev_ops;
 944         eth_dev->rx_pkt_burst = &bnxt_recv_pkts;
 945         eth_dev->tx_pkt_burst = &bnxt_xmit_pkts;
 946
 947         rc = bnxt_alloc_hwrm_resources(bp);
 948         if (rc) {
 949                 RTE_LOG(ERR, PMD,
 950                         "hwrm resource allocation failure rc: %x\n", rc);
 951                 goto error_free;
 952         }
 953         rc = bnxt_hwrm_ver_get(bp);
 954         if (rc)
 955                 goto error_free;
 956         bnxt_hwrm_queue_qportcfg(bp);
 957
 958         /* Get the MAX capabilities for this function */
 959         rc = bnxt_hwrm_func_qcaps(bp);
 960         if (rc) {
 961                 RTE_LOG(ERR, PMD, "hwrm query capability failure rc: %x\n", rc);
 962                 goto error_free;
 963         }
 964         eth_dev->data->mac_addrs = rte_zmalloc("bnxt_mac_addr_tbl",
 965                                         ETHER_ADDR_LEN * MAX_NUM_MAC_ADDR, 0);
 966         if (eth_dev->data->mac_addrs == NULL) {
 967                 RTE_LOG(ERR, PMD,
 968                         "Failed to alloc %u bytes needed to store MAC addr tbl",
 969                         ETHER_ADDR_LEN * MAX_NUM_MAC_ADDR);
 970                 rc = -ENOMEM;
 971                 goto error_free;
 972         }
 973         /* Copy the permanent MAC from the qcap response address now. */
 974         if (BNXT_PF(bp))
 975                 memcpy(bp->mac_addr, bp->pf.mac_addr, sizeof(bp->mac_addr));
 976         else
 977                 memcpy(bp->mac_addr, bp->vf.mac_addr, sizeof(bp->mac_addr));
 978         memcpy(&eth_dev->data->mac_addrs[0], bp->mac_addr, ETHER_ADDR_LEN);
 979         bp->grp_info = rte_zmalloc("bnxt_grp_info",
 980                                 sizeof(*bp->grp_info) * bp->max_ring_grps, 0);
 981         if (!bp->grp_info) {
 982                 RTE_LOG(ERR, PMD,
 983                         "Failed to alloc %zu bytes needed to store group info table\n",
 984                         sizeof(*bp->grp_info) * bp->max_ring_grps);
 985                 rc = -ENOMEM;
 986                 goto error_free;
 987         }
 988
 989         rc = bnxt_hwrm_func_driver_register(bp, 0,
 990                                             bp->pf.vf_req_fwd);
 991         if (rc) {
 992                 RTE_LOG(ERR, PMD,
 993                         "Failed to register driver");
 994                 rc = -EBUSY;
 995                 goto error_free;
 996         }
 997
 998         RTE_LOG(INFO, PMD,
 999                 DRV_MODULE_NAME " found at mem %" PRIx64 ", node addr %pM\n",
1000                 eth_dev->pci_dev->mem_resource[0].phys_addr,
1001                 eth_dev->pci_dev->mem_resource[0].addr);
1002
1003         return 0;
1004
1005 error_free:
1006         eth_dev->driver->eth_dev_uninit(eth_dev);
1007 error:
1008         return rc;
1009 }
1010
1011 static int
1012 bnxt_dev_uninit(struct rte_eth_dev *eth_dev) {
1013         struct bnxt *bp = eth_dev->data->dev_private;
1014         int rc;
1015
1016         if (eth_dev->data->mac_addrs)
1017                 rte_free(eth_dev->data->mac_addrs);
1018         if (bp->grp_info)
1019                 rte_free(bp->grp_info);
1020         rc = bnxt_hwrm_func_driver_unregister(bp, 0);
1021         bnxt_free_hwrm_resources(bp);
1022         return rc;
1023 }
1024
1025 static struct eth_driver bnxt_rte_pmd = {
1026         .pci_drv = {
1027                     .name = "rte_" DRV_MODULE_NAME "_pmd",
1028                     .id_table = bnxt_pci_id_map,
1029                     .drv_flags = RTE_PCI_DRV_NEED_MAPPING,
1030                     },
1031         .eth_dev_init = bnxt_dev_init,
1032         .eth_dev_uninit = bnxt_dev_uninit,
1033         .dev_private_size = sizeof(struct bnxt),
1034 };
1035
1036 static int bnxt_rte_pmd_init(const char *name, const char *params __rte_unused)
1037 {
1038         RTE_LOG(INFO, PMD, "bnxt_rte_pmd_init() called for %s\n", name);
1039         rte_eth_driver_register(&bnxt_rte_pmd);
1040         return 0;
1041 }
1042
1043 static struct rte_driver bnxt_pmd_drv = {
1044         .name = "eth_bnxt",
1045         .type = PMD_PDEV,
1046         .init = bnxt_rte_pmd_init,
1047 };
1048
1049 PMD_REGISTER_DRIVER(bnxt_pmd_drv);